Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007-2008 |
Stelian Pop | 5ee0c7f | 2011-11-01 00:00:39 +0100 | [diff] [blame] | 4 | * Stelian Pop <stelian@popies.net> |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 5 | * Lead Tech Design <www.leadtechdesign.com> |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
Tom Rini | dec7ea0 | 2024-05-20 13:35:03 -0600 | [diff] [blame] | 8 | #include <config.h> |
Wenyou Yang | de5793e | 2017-04-18 15:28:29 +0800 | [diff] [blame] | 9 | #include <debug_uart.h> |
Simon Glass | 8e16b1e | 2019-12-28 10:45:05 -0700 | [diff] [blame] | 10 | #include <init.h> |
Simon Glass | f5c208d | 2019-11-14 12:57:20 -0700 | [diff] [blame] | 11 | #include <vsprintf.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 12 | #include <asm/global_data.h> |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 13 | #include <asm/io.h> |
Simon Glass | 0ffb9d6 | 2017-05-31 19:47:48 -0600 | [diff] [blame] | 14 | #include <asm/mach-types.h> |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 15 | #include <asm/arch/at91sam9rl.h> |
| 16 | #include <asm/arch/at91sam9rl_matrix.h> |
| 17 | #include <asm/arch/at91sam9_smc.h> |
Jean-Christophe PLAGNIOL-VILLARD | 6b0b3db | 2009-03-21 21:07:59 +0100 | [diff] [blame] | 18 | #include <asm/arch/at91_common.h> |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 19 | #include <asm/arch/at91_rstc.h> |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 20 | #include <asm/arch/clk.h> |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 21 | #include <asm/arch/gpio.h> |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 22 | |
Stelian Pop | cea5c53 | 2008-05-08 14:52:32 +0200 | [diff] [blame] | 23 | #include <atmel_lcdc.h> |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 24 | |
| 25 | DECLARE_GLOBAL_DATA_PTR; |
| 26 | |
| 27 | /* ------------------------------------------------------------------------- */ |
| 28 | /* |
| 29 | * Miscelaneous platform dependent initialisations |
| 30 | */ |
| 31 | |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 32 | #ifdef CONFIG_CMD_NAND |
| 33 | static void at91sam9rlek_nand_hw_init(void) |
| 34 | { |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 35 | struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
| 36 | struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 37 | unsigned long csa; |
| 38 | |
| 39 | /* Enable CS3 */ |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 40 | csa = readl(&matrix->ebicsa); |
| 41 | csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; |
| 42 | |
| 43 | writel(csa, &matrix->ebicsa); |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 44 | |
| 45 | /* Configure SMC CS3 for NAND/SmartMedia */ |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 46 | writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | |
| 47 | AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), |
| 48 | &smc->cs[3].setup); |
| 49 | writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | |
| 50 | AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), |
| 51 | &smc->cs[3].pulse); |
| 52 | writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), |
| 53 | &smc->cs[3].cycle); |
| 54 | writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
| 55 | AT91_SMC_MODE_EXNW_DISABLE | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 56 | #ifdef CONFIG_SYS_NAND_DBW_16 |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 57 | AT91_SMC_MODE_DBW_16 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 58 | #else /* CONFIG_SYS_NAND_DBW_8 */ |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 59 | AT91_SMC_MODE_DBW_8 | |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 60 | #endif |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 61 | AT91_SMC_MODE_TDF_CYCLE(2), |
| 62 | &smc->cs[3].mode); |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 63 | |
Wenyou Yang | 78f8976 | 2016-02-03 10:16:50 +0800 | [diff] [blame] | 64 | at91_periph_clk_enable(ATMEL_ID_PIOD); |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 65 | |
| 66 | /* Configure RDY/BSY */ |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 67 | at91_set_gpio_input(CFG_SYS_NAND_READY_PIN, 1); |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 68 | |
| 69 | /* Enable NandFlash */ |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 70 | at91_set_gpio_output(CFG_SYS_NAND_ENABLE_PIN, 1); |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 71 | |
| 72 | at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ |
| 73 | at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */ |
| 74 | } |
| 75 | #endif |
| 76 | |
Wenyou Yang | de5793e | 2017-04-18 15:28:29 +0800 | [diff] [blame] | 77 | #ifdef CONFIG_DEBUG_UART_BOARD_INIT |
| 78 | void board_debug_uart_init(void) |
| 79 | { |
| 80 | at91_seriald_hw_init(); |
| 81 | } |
| 82 | #endif |
| 83 | |
| 84 | #ifdef CONFIG_BOARD_EARLY_INIT_F |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 85 | int board_early_init_f(void) |
| 86 | { |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 87 | return 0; |
| 88 | } |
Wenyou Yang | de5793e | 2017-04-18 15:28:29 +0800 | [diff] [blame] | 89 | #endif |
Stelian Pop | cea5c53 | 2008-05-08 14:52:32 +0200 | [diff] [blame] | 90 | |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 91 | int board_init(void) |
| 92 | { |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 93 | /* arch number of AT91SAM9RLEK-Board */ |
| 94 | gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9RLEK; |
| 95 | /* adress of boot parameters */ |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 96 | gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 97 | |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 98 | #ifdef CONFIG_CMD_NAND |
| 99 | at91sam9rlek_nand_hw_init(); |
| 100 | #endif |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 101 | return 0; |
| 102 | } |
| 103 | |
| 104 | int dram_init(void) |
| 105 | { |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 106 | gd->ram_size = get_ram_size( |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 107 | (void *)CFG_SYS_SDRAM_BASE, |
| 108 | CFG_SYS_SDRAM_SIZE); |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 109 | return 0; |
| 110 | } |