Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2018 Marvell International Ltd. |
| 4 | * |
| 5 | * https://spdx.org/licenses |
| 6 | */ |
| 7 | |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 8 | #include <asm/io.h> |
| 9 | #include <asm/arch/board.h> |
| 10 | #include <asm/arch/clock.h> |
| 11 | |
| 12 | /** |
| 13 | * Returns the I/O clock speed in Hz |
| 14 | */ |
| 15 | u64 octeontx_get_io_clock(void) |
| 16 | { |
| 17 | union rst_boot rst_boot; |
| 18 | |
| 19 | rst_boot.u = readq(RST_BOOT); |
| 20 | |
| 21 | return rst_boot.s.pnr_mul * PLL_REF_CLK; |
| 22 | } |
| 23 | |
| 24 | /** |
| 25 | * Returns the core clock speed in Hz |
| 26 | */ |
| 27 | u64 octeontx_get_core_clock(void) |
| 28 | { |
| 29 | union rst_boot rst_boot; |
| 30 | |
| 31 | rst_boot.u = readq(RST_BOOT); |
| 32 | |
| 33 | return rst_boot.s.c_mul * PLL_REF_CLK; |
| 34 | } |