Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 Samsung Electronics |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #include <common.h> |
| 24 | #include <asm/io.h> |
| 25 | #include <asm/arch/cpu.h> |
| 26 | #include <asm/arch/gpio.h> |
| 27 | #include <asm/arch/mmc.h> |
Rajeshwari Shinde | 99ae9b8 | 2013-07-04 12:29:16 +0530 | [diff] [blame^] | 28 | #include <asm/arch/periph.h> |
| 29 | #include <asm/arch/pinmux.h> |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 30 | |
| 31 | DECLARE_GLOBAL_DATA_PTR; |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 32 | struct exynos4_gpio_part1 *gpio1; |
| 33 | struct exynos4_gpio_part2 *gpio2; |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 34 | |
| 35 | int board_init(void) |
| 36 | { |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 37 | gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE; |
| 38 | gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE; |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 39 | |
| 40 | gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); |
| 41 | return 0; |
| 42 | } |
| 43 | |
Rajeshwari Shinde | 99ae9b8 | 2013-07-04 12:29:16 +0530 | [diff] [blame^] | 44 | static int board_uart_init(void) |
| 45 | { |
| 46 | int err; |
| 47 | |
| 48 | err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE); |
| 49 | if (err) { |
| 50 | debug("UART0 not configured\n"); |
| 51 | return err; |
| 52 | } |
| 53 | |
| 54 | err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE); |
| 55 | if (err) { |
| 56 | debug("UART1 not configured\n"); |
| 57 | return err; |
| 58 | } |
| 59 | |
| 60 | err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE); |
| 61 | if (err) { |
| 62 | debug("UART2 not configured\n"); |
| 63 | return err; |
| 64 | } |
| 65 | |
| 66 | err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); |
| 67 | if (err) { |
| 68 | debug("UART3 not configured\n"); |
| 69 | return err; |
| 70 | } |
| 71 | |
| 72 | return 0; |
| 73 | } |
| 74 | |
| 75 | #ifdef CONFIG_BOARD_EARLY_INIT_F |
| 76 | int board_early_init_f(void) |
| 77 | { |
| 78 | int err; |
| 79 | err = board_uart_init(); |
| 80 | if (err) { |
| 81 | debug("UART init failed\n"); |
| 82 | return err; |
| 83 | } |
| 84 | return err; |
| 85 | } |
| 86 | #endif |
| 87 | |
Chander Kashyap | 0e7ab68 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 88 | int dram_init(void) |
| 89 | { |
| 90 | gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) |
| 91 | + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) |
| 92 | + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) |
| 93 | + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE); |
| 94 | |
| 95 | return 0; |
| 96 | } |
| 97 | |
| 98 | void dram_init_banksize(void) |
| 99 | { |
| 100 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 101 | gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \ |
| 102 | PHYS_SDRAM_1_SIZE); |
| 103 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; |
| 104 | gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \ |
| 105 | PHYS_SDRAM_2_SIZE); |
| 106 | gd->bd->bi_dram[2].start = PHYS_SDRAM_3; |
| 107 | gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \ |
| 108 | PHYS_SDRAM_3_SIZE); |
| 109 | gd->bd->bi_dram[3].start = PHYS_SDRAM_4; |
| 110 | gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \ |
| 111 | PHYS_SDRAM_4_SIZE); |
| 112 | } |
| 113 | |
| 114 | #ifdef CONFIG_DISPLAY_BOARDINFO |
| 115 | int checkboard(void) |
| 116 | { |
| 117 | printf("\nBoard: ORIGEN\n"); |
| 118 | return 0; |
| 119 | } |
| 120 | #endif |
| 121 | |
| 122 | #ifdef CONFIG_GENERIC_MMC |
| 123 | int board_mmc_init(bd_t *bis) |
| 124 | { |
| 125 | int i, err; |
| 126 | |
| 127 | /* |
| 128 | * MMC2 SD card GPIO: |
| 129 | * |
| 130 | * GPK2[0] SD_2_CLK(2) |
| 131 | * GPK2[1] SD_2_CMD(2) |
| 132 | * GPK2[2] SD_2_CDn |
| 133 | * GPK2[3:6] SD_2_DATA[0:3](2) |
| 134 | */ |
| 135 | for (i = 0; i < 7; i++) { |
| 136 | /* GPK2[0:6] special function 2 */ |
| 137 | s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2)); |
| 138 | |
| 139 | /* GPK2[0:6] drv 4x */ |
| 140 | s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X); |
| 141 | |
| 142 | /* GPK2[0:1] pull disable */ |
| 143 | if (i == 0 || i == 1) { |
| 144 | s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE); |
| 145 | continue; |
| 146 | } |
| 147 | |
| 148 | /* GPK2[2:6] pull up */ |
| 149 | s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP); |
| 150 | } |
| 151 | |
| 152 | err = s5p_mmc_init(2, 4); |
| 153 | return err; |
| 154 | } |
| 155 | #endif |