blob: 6d2327c8c06d037ada81dc84262c562750fede88 [file] [log] [blame]
Stefano Babic99a42ed2011-10-07 23:27:34 +00001/*
2 * Porting to u-boot:
3 *
4 * (C) Copyright 2011
5 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
6 *
7 * Copyright (C) 2008-2009 MontaVista Software Inc.
8 * Copyright (C) 2008-2009 Texas Instruments Inc
9 *
10 * Based on the LCD driver for TI Avalanche processors written by
11 * Ajay Singh and Shalom Hai.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option)any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 */
27
28#ifndef DA8XX_FB_H
29#define DA8XX_FB_H
30
31enum panel_type {
32 QVGA = 0
33};
34
35enum panel_shade {
36 MONOCHROME = 0,
37 COLOR_ACTIVE,
38 COLOR_PASSIVE,
39};
40
41enum raster_load_mode {
42 LOAD_DATA = 1,
43 LOAD_PALETTE,
44};
45
46struct display_panel {
47 enum panel_type panel_type; /* QVGA */
48 int max_bpp;
49 int min_bpp;
50 enum panel_shade panel_shade;
51};
52
53struct da8xx_panel {
54 const char name[25]; /* Full name <vendor>_<model> */
55 unsigned short width;
56 unsigned short height;
57 int hfp; /* Horizontal front porch */
58 int hbp; /* Horizontal back porch */
59 int hsw; /* Horizontal Sync Pulse Width */
60 int vfp; /* Vertical front porch */
61 int vbp; /* Vertical back porch */
62 int vsw; /* Vertical Sync Pulse Width */
63 unsigned int pxl_clk; /* Pixel clock */
64 unsigned char invert_pxl_clk; /* Invert Pixel clock */
65};
66
67struct da8xx_lcdc_platform_data {
68 const char manu_name[10];
69 void *controller_data;
70 const char type[25];
71 void (*panel_power_ctrl)(int);
72};
73
74struct lcd_ctrl_config {
75 const struct display_panel *p_disp_panel;
76
77 /* AC Bias Pin Frequency */
78 int ac_bias;
79
80 /* AC Bias Pin Transitions per Interrupt */
81 int ac_bias_intrpt;
82
83 /* DMA burst size */
84 int dma_burst_sz;
85
86 /* Bits per pixel */
87 int bpp;
88
89 /* FIFO DMA Request Delay */
90 int fdd;
91
92 /* TFT Alternative Signal Mapping (Only for active) */
93 unsigned char tft_alt_mode;
94
95 /* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */
96 unsigned char stn_565_mode;
97
98 /* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
99 unsigned char mono_8bit_mode;
100
101 /* Invert line clock */
102 unsigned char invert_line_clock;
103
104 /* Invert frame clock */
105 unsigned char invert_frm_clock;
106
107 /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
108 unsigned char sync_edge;
109
110 /* Horizontal and Vertical Sync: Control: 0=ignore */
111 unsigned char sync_ctrl;
112
113 /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
114 unsigned char raster_order;
115};
116
117struct lcd_sync_arg {
118 int back_porch;
119 int front_porch;
120 int pulse_width;
121};
122
123void da8xx_video_init(const struct da8xx_panel *panel, int bits_pixel);
124
125#endif /* ifndef DA8XX_FB_H */
126