blob: 710e821e3fc8977fdb46c87c740c8b7d07d8a8fd [file] [log] [blame]
Ian Campbellba8311f2014-05-05 11:52:28 +01001#include <netdev.h>
2#include <miiphy.h>
Ian Campbellba8311f2014-05-05 11:52:28 +01003#include <asm/io.h>
4#include <asm/arch/clock.h>
Ian Campbellba8311f2014-05-05 11:52:28 +01005
Hans de Goede42cbbe32016-03-17 13:53:03 +01006void eth_init_board(void)
Ian Campbellba8311f2014-05-05 11:52:28 +01007{
Ian Campbellba8311f2014-05-05 11:52:28 +01008 struct sunxi_ccm_reg *const ccm =
9 (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
10
Ian Campbellba8311f2014-05-05 11:52:28 +010011 /* Set MII clock */
Chen-Yu Tsaic1f6aa32014-06-09 11:37:01 +020012#ifdef CONFIG_RGMII
Ian Campbellba8311f2014-05-05 11:52:28 +010013 setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
14 CCM_GMAC_CTRL_GPIT_RGMII);
Hans de Goedebf880fe2015-01-25 12:10:48 +010015 setbits_le32(&ccm->gmac_clk_cfg,
16 CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY));
Chen-Yu Tsaic1f6aa32014-06-09 11:37:01 +020017#else
18 setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_MII |
19 CCM_GMAC_CTRL_GPIT_MII);
20#endif
Ian Campbellba8311f2014-05-05 11:52:28 +010021}