Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 1 | #include <netdev.h> |
| 2 | #include <miiphy.h> |
Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 3 | #include <asm/io.h> |
| 4 | #include <asm/arch/clock.h> |
Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 5 | |
Hans de Goede | 42cbbe3 | 2016-03-17 13:53:03 +0100 | [diff] [blame] | 6 | void eth_init_board(void) |
Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 7 | { |
Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 8 | struct sunxi_ccm_reg *const ccm = |
| 9 | (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; |
| 10 | |
Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 11 | /* Set MII clock */ |
Chen-Yu Tsai | c1f6aa3 | 2014-06-09 11:37:01 +0200 | [diff] [blame] | 12 | #ifdef CONFIG_RGMII |
Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 13 | setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII | |
| 14 | CCM_GMAC_CTRL_GPIT_RGMII); |
Hans de Goede | bf880fe | 2015-01-25 12:10:48 +0100 | [diff] [blame] | 15 | setbits_le32(&ccm->gmac_clk_cfg, |
| 16 | CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY)); |
Chen-Yu Tsai | c1f6aa3 | 2014-06-09 11:37:01 +0200 | [diff] [blame] | 17 | #else |
| 18 | setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_MII | |
| 19 | CCM_GMAC_CTRL_GPIT_MII); |
| 20 | #endif |
Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 21 | } |