blob: 6937a27176f956061751ad7ac095310eee97b8f9 [file] [log] [blame]
Suniel Maheshf1cd07b2020-02-03 19:20:04 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4 */
5
Suniel Maheshf1cd07b2020-02-03 19:20:04 +05306#include <dm.h>
Jagan Teki59691962020-07-21 20:36:04 +05307#include <env.h>
Simon Glass0f2af882020-05-10 11:40:05 -06008#include <log.h>
Suniel Maheshfe65e712020-02-03 19:20:05 +05309#include <spl_gpio.h>
10#include <asm/io.h>
Jagan Teki59691962020-07-21 20:36:04 +053011
12#include <asm/arch-rockchip/cru.h>
Suniel Maheshfe65e712020-02-03 19:20:05 +053013#include <asm/arch-rockchip/gpio.h>
Jagan Teki59691962020-07-21 20:36:04 +053014#include <asm/arch-rockchip/grf_rk3399.h>
Suniel Maheshf1cd07b2020-02-03 19:20:04 +053015
Simon Glass49c24a82024-09-29 19:49:47 -060016#ifdef CONFIG_XPL_BUILD
Suniel Maheshfe65e712020-02-03 19:20:05 +053017
Jagan Teki59691962020-07-21 20:36:04 +053018#define PMUGRF_BASE 0xff320000
Jagan Teki6df18262020-07-21 20:36:01 +053019#define GPIO0_BASE 0xff720000
Suniel Maheshfe65e712020-02-03 19:20:05 +053020
Jagan Teki59691962020-07-21 20:36:04 +053021/**
22 * LED setup for roc-rk3399-pc
23 *
24 * 1. Set the low power leds (only during POR, pwr_key env is 'y')
25 * glow yellow LED, termed as low power
26 * poll for on board power key press
27 * once powe key pressed, turn off yellow
28 * 2. Turn on red LED, indicating full power mode
29 */
Jagan Teki6df18262020-07-21 20:36:01 +053030void led_setup(void)
Suniel Maheshfe65e712020-02-03 19:20:05 +053031{
32 struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
Jagan Teki59691962020-07-21 20:36:04 +053033 struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
34 bool press_pwr_key = false;
35
36 if (IS_ENABLED(CONFIG_SPL_ENV_SUPPORT)) {
37 env_init();
38 env_load();
39 if (env_get_yesno("pwr_key") == 1)
40 press_pwr_key = true;
41 }
Suniel Maheshfe65e712020-02-03 19:20:05 +053042
Jagan Teki59691962020-07-21 20:36:04 +053043 if (press_pwr_key && !strcmp(get_reset_cause(), "POR")) {
44 spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
45
46 spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5),
47 GPIO_PULL_NORMAL);
48 while (readl(&gpio0->ext_port) & 0x20)
49 ;
50
51 spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
52 }
53
Suniel Maheshfe65e712020-02-03 19:20:05 +053054 spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
Suniel Maheshfe65e712020-02-03 19:20:05 +053055}
Jagan Teki59691962020-07-21 20:36:04 +053056
Suniel Maheshfe65e712020-02-03 19:20:05 +053057#endif