Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: BSD-3-Clause |
| 2 | /* |
| 3 | * sc7280 IDP board device tree source (common between SKU1 and SKU2) |
| 4 | * |
| 5 | * Copyright (c) 2021, The Linux Foundation. All rights reserved. |
| 6 | */ |
| 7 | |
| 8 | #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> |
| 9 | #include <dt-bindings/input/linux-event-codes.h> |
| 10 | #include "sc7280.dtsi" |
| 11 | #include "pm7325.dtsi" |
| 12 | #include "pm8350c.dtsi" |
| 13 | #include "pmk8350.dtsi" |
| 14 | |
| 15 | #include "sc7280-chrome-common.dtsi" |
| 16 | #include "sc7280-herobrine-lte-sku.dtsi" |
| 17 | |
| 18 | / { |
| 19 | aliases { |
| 20 | bluetooth0 = &bluetooth; |
| 21 | serial1 = &uart7; |
| 22 | wifi0 = &wifi; |
| 23 | }; |
| 24 | |
| 25 | max98360a: audio-codec-0 { |
| 26 | compatible = "maxim,max98360a"; |
| 27 | pinctrl-names = "default"; |
| 28 | pinctrl-0 = <&_en>; |
| 29 | sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; |
| 30 | #sound-dai-cells = <0>; |
| 31 | }; |
| 32 | |
| 33 | wcd9385: audio-codec-1 { |
| 34 | compatible = "qcom,wcd9385-codec"; |
| 35 | pinctrl-names = "default", "sleep"; |
| 36 | pinctrl-0 = <&wcd_reset_n>; |
| 37 | pinctrl-1 = <&wcd_reset_n_sleep>; |
| 38 | |
| 39 | reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>; |
| 40 | |
| 41 | qcom,rx-device = <&wcd_rx>; |
| 42 | qcom,tx-device = <&wcd_tx>; |
| 43 | |
| 44 | vdd-rxtx-supply = <&vreg_l18b_1p8>; |
| 45 | vdd-io-supply = <&vreg_l18b_1p8>; |
| 46 | vdd-buck-supply = <&vreg_l17b_1p8>; |
| 47 | vdd-mic-bias-supply = <&vreg_bob>; |
| 48 | |
| 49 | qcom,micbias1-microvolt = <1800000>; |
| 50 | qcom,micbias2-microvolt = <1800000>; |
| 51 | qcom,micbias3-microvolt = <1800000>; |
| 52 | qcom,micbias4-microvolt = <1800000>; |
| 53 | |
| 54 | qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 |
| 55 | 500000 500000 500000>; |
| 56 | qcom,mbhc-headset-vthreshold-microvolt = <1700000>; |
| 57 | qcom,mbhc-headphone-vthreshold-microvolt = <50000>; |
| 58 | #sound-dai-cells = <1>; |
| 59 | }; |
| 60 | |
| 61 | gpio-keys { |
| 62 | compatible = "gpio-keys"; |
| 63 | label = "gpio-keys"; |
| 64 | |
| 65 | pinctrl-names = "default"; |
| 66 | pinctrl-0 = <&key_vol_up_default>; |
| 67 | |
| 68 | key-volume-up { |
| 69 | label = "volume_up"; |
| 70 | gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; |
| 71 | linux,input-type = <1>; |
| 72 | linux,code = <KEY_VOLUMEUP>; |
| 73 | wakeup-source; |
| 74 | debounce-interval = <15>; |
| 75 | linux,can-disable; |
| 76 | }; |
| 77 | }; |
| 78 | |
| 79 | nvme_3v3_regulator: nvme-3v3-regulator { |
| 80 | compatible = "regulator-fixed"; |
| 81 | regulator-name = "VLDO_3V3"; |
| 82 | |
| 83 | regulator-min-microvolt = <3300000>; |
| 84 | regulator-max-microvolt = <3300000>; |
| 85 | |
| 86 | enable-active-high; |
| 87 | pinctrl-names = "default"; |
| 88 | pinctrl-0 = <&nvme_pwren>; |
| 89 | }; |
| 90 | |
| 91 | sound: sound { |
| 92 | compatible = "google,sc7280-herobrine"; |
| 93 | model = "sc7280-wcd938x-max98360a-1mic"; |
| 94 | |
| 95 | audio-routing = |
| 96 | "IN1_HPHL", "HPHL_OUT", |
| 97 | "IN2_HPHR", "HPHR_OUT", |
| 98 | "AMIC1", "MIC BIAS1", |
| 99 | "AMIC2", "MIC BIAS2", |
| 100 | "VA DMIC0", "MIC BIAS3", |
| 101 | "VA DMIC1", "MIC BIAS3", |
| 102 | "VA DMIC2", "MIC BIAS1", |
| 103 | "VA DMIC3", "MIC BIAS1", |
| 104 | "TX SWR_ADC0", "ADC1_OUTPUT", |
| 105 | "TX SWR_ADC1", "ADC2_OUTPUT", |
| 106 | "TX SWR_ADC2", "ADC3_OUTPUT", |
| 107 | "TX SWR_DMIC0", "DMIC1_OUTPUT", |
| 108 | "TX SWR_DMIC1", "DMIC2_OUTPUT", |
| 109 | "TX SWR_DMIC2", "DMIC3_OUTPUT", |
| 110 | "TX SWR_DMIC3", "DMIC4_OUTPUT", |
| 111 | "TX SWR_DMIC4", "DMIC5_OUTPUT", |
| 112 | "TX SWR_DMIC5", "DMIC6_OUTPUT", |
| 113 | "TX SWR_DMIC6", "DMIC7_OUTPUT", |
| 114 | "TX SWR_DMIC7", "DMIC8_OUTPUT"; |
| 115 | |
| 116 | #address-cells = <1>; |
| 117 | #size-cells = <0>; |
| 118 | |
| 119 | dai-link@0 { |
| 120 | link-name = "MAX98360A"; |
| 121 | reg = <0>; |
| 122 | |
| 123 | cpu { |
| 124 | sound-dai = <&lpass_cpu MI2S_SECONDARY>; |
| 125 | }; |
| 126 | |
| 127 | codec { |
| 128 | sound-dai = <&max98360a>; |
| 129 | }; |
| 130 | }; |
| 131 | |
| 132 | dai-link@1 { |
| 133 | link-name = "DisplayPort"; |
| 134 | reg = <1>; |
| 135 | |
| 136 | cpu { |
| 137 | sound-dai = <&lpass_cpu LPASS_DP_RX>; |
| 138 | }; |
| 139 | |
| 140 | codec { |
| 141 | sound-dai = <&mdss_dp>; |
| 142 | }; |
| 143 | }; |
| 144 | |
| 145 | dai-link@2 { |
| 146 | link-name = "WCD9385 Playback"; |
| 147 | reg = <2>; |
| 148 | |
| 149 | cpu { |
| 150 | sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>; |
| 151 | }; |
| 152 | |
| 153 | codec { |
| 154 | sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>; |
| 155 | }; |
| 156 | }; |
| 157 | |
| 158 | dai-link@3 { |
| 159 | link-name = "WCD9385 Capture"; |
| 160 | reg = <3>; |
| 161 | |
| 162 | cpu { |
| 163 | sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>; |
| 164 | }; |
| 165 | |
| 166 | codec { |
| 167 | sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>; |
| 168 | }; |
| 169 | }; |
| 170 | |
| 171 | dai-link@4 { |
| 172 | link-name = "DMIC"; |
| 173 | reg = <4>; |
| 174 | |
| 175 | cpu { |
| 176 | sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>; |
| 177 | }; |
| 178 | |
| 179 | codec { |
| 180 | sound-dai = <&lpass_va_macro 0>; |
| 181 | }; |
| 182 | }; |
| 183 | }; |
| 184 | }; |
| 185 | |
| 186 | &apps_rsc { |
| 187 | regulators-0 { |
| 188 | compatible = "qcom,pm7325-rpmh-regulators"; |
| 189 | qcom,pmic-id = "b"; |
| 190 | |
| 191 | vreg_s1b_1p8: smps1 { |
| 192 | regulator-min-microvolt = <1856000>; |
| 193 | regulator-max-microvolt = <2040000>; |
| 194 | }; |
| 195 | |
| 196 | vreg_s7b_0p9: smps7 { |
| 197 | regulator-min-microvolt = <535000>; |
| 198 | regulator-max-microvolt = <1120000>; |
| 199 | }; |
| 200 | |
| 201 | vreg_s8b_1p2: smps8 { |
| 202 | regulator-min-microvolt = <1256000>; |
| 203 | regulator-max-microvolt = <1500000>; |
| 204 | }; |
| 205 | |
| 206 | vreg_l1b_0p8: ldo1 { |
| 207 | regulator-min-microvolt = <825000>; |
| 208 | regulator-max-microvolt = <925000>; |
| 209 | }; |
| 210 | |
| 211 | vreg_l2b_3p0: ldo2 { |
| 212 | regulator-min-microvolt = <2700000>; |
| 213 | regulator-max-microvolt = <3544000>; |
| 214 | }; |
| 215 | |
| 216 | vreg_l6b_1p2: ldo6 { |
| 217 | regulator-min-microvolt = <1140000>; |
| 218 | regulator-max-microvolt = <1260000>; |
| 219 | }; |
| 220 | |
| 221 | vreg_l7b_2p9: ldo7 { |
| 222 | regulator-min-microvolt = <2960000>; |
| 223 | regulator-max-microvolt = <2960000>; |
| 224 | }; |
| 225 | |
| 226 | vreg_l8b_0p9: ldo8 { |
| 227 | regulator-min-microvolt = <870000>; |
| 228 | regulator-max-microvolt = <970000>; |
| 229 | }; |
| 230 | |
| 231 | vreg_l9b_1p2: ldo9 { |
| 232 | regulator-min-microvolt = <1080000>; |
| 233 | regulator-max-microvolt = <1304000>; |
| 234 | }; |
| 235 | |
| 236 | vreg_l11b_1p7: ldo11 { |
| 237 | regulator-min-microvolt = <1504000>; |
| 238 | regulator-max-microvolt = <2000000>; |
| 239 | }; |
| 240 | |
| 241 | vreg_l12b_0p8: ldo12 { |
| 242 | regulator-min-microvolt = <751000>; |
| 243 | regulator-max-microvolt = <824000>; |
| 244 | }; |
| 245 | |
| 246 | vreg_l13b_0p8: ldo13 { |
| 247 | regulator-min-microvolt = <530000>; |
| 248 | regulator-max-microvolt = <824000>; |
| 249 | }; |
| 250 | |
| 251 | vreg_l14b_1p2: ldo14 { |
| 252 | regulator-min-microvolt = <1080000>; |
| 253 | regulator-max-microvolt = <1304000>; |
| 254 | }; |
| 255 | |
| 256 | vreg_l15b_0p8: ldo15 { |
| 257 | regulator-min-microvolt = <765000>; |
| 258 | regulator-max-microvolt = <1020000>; |
| 259 | }; |
| 260 | |
| 261 | vreg_l16b_1p2: ldo16 { |
| 262 | regulator-min-microvolt = <1100000>; |
| 263 | regulator-max-microvolt = <1300000>; |
| 264 | }; |
| 265 | |
| 266 | vreg_l17b_1p8: ldo17 { |
| 267 | regulator-min-microvolt = <1700000>; |
| 268 | regulator-max-microvolt = <1900000>; |
| 269 | }; |
| 270 | |
| 271 | vreg_l18b_1p8: ldo18 { |
| 272 | regulator-min-microvolt = <1800000>; |
| 273 | regulator-max-microvolt = <2000000>; |
| 274 | }; |
| 275 | |
| 276 | vreg_l19b_1p8: ldo19 { |
| 277 | regulator-min-microvolt = <1800000>; |
| 278 | regulator-max-microvolt = <1800000>; |
| 279 | }; |
| 280 | }; |
| 281 | |
| 282 | regulators-1 { |
| 283 | compatible = "qcom,pm8350c-rpmh-regulators"; |
| 284 | qcom,pmic-id = "c"; |
| 285 | |
| 286 | vreg_s1c_2p2: smps1 { |
| 287 | regulator-min-microvolt = <2190000>; |
| 288 | regulator-max-microvolt = <2210000>; |
| 289 | }; |
| 290 | |
| 291 | vreg_s9c_1p0: smps9 { |
| 292 | regulator-min-microvolt = <1010000>; |
| 293 | regulator-max-microvolt = <1170000>; |
| 294 | }; |
| 295 | |
| 296 | vreg_l1c_1p8: ldo1 { |
| 297 | regulator-min-microvolt = <1800000>; |
| 298 | regulator-max-microvolt = <1980000>; |
| 299 | }; |
| 300 | |
| 301 | vreg_l2c_1p8: ldo2 { |
| 302 | regulator-min-microvolt = <1620000>; |
| 303 | regulator-max-microvolt = <1980000>; |
| 304 | }; |
| 305 | |
| 306 | vreg_l3c_3p0: ldo3 { |
| 307 | regulator-min-microvolt = <2800000>; |
| 308 | regulator-max-microvolt = <3540000>; |
| 309 | }; |
| 310 | |
| 311 | vreg_l4c_1p8: ldo4 { |
| 312 | regulator-min-microvolt = <1620000>; |
| 313 | regulator-max-microvolt = <3300000>; |
| 314 | }; |
| 315 | |
| 316 | vreg_l5c_1p8: ldo5 { |
| 317 | regulator-min-microvolt = <1620000>; |
| 318 | regulator-max-microvolt = <3300000>; |
| 319 | }; |
| 320 | |
| 321 | vreg_l6c_2p9: ldo6 { |
| 322 | regulator-min-microvolt = <1800000>; |
| 323 | regulator-max-microvolt = <2950000>; |
| 324 | }; |
| 325 | |
| 326 | vreg_l7c_3p0: ldo7 { |
| 327 | regulator-min-microvolt = <3000000>; |
| 328 | regulator-max-microvolt = <3544000>; |
| 329 | }; |
| 330 | |
| 331 | vreg_l8c_1p8: ldo8 { |
| 332 | regulator-min-microvolt = <1620000>; |
| 333 | regulator-max-microvolt = <2000000>; |
| 334 | }; |
| 335 | |
| 336 | vreg_l9c_2p9: ldo9 { |
| 337 | regulator-min-microvolt = <2960000>; |
| 338 | regulator-max-microvolt = <2960000>; |
| 339 | }; |
| 340 | |
| 341 | vreg_l10c_0p8: ldo10 { |
| 342 | regulator-min-microvolt = <720000>; |
| 343 | regulator-max-microvolt = <1050000>; |
| 344 | }; |
| 345 | |
| 346 | vreg_l11c_2p8: ldo11 { |
| 347 | regulator-min-microvolt = <2800000>; |
| 348 | regulator-max-microvolt = <3544000>; |
| 349 | }; |
| 350 | |
| 351 | vreg_l12c_1p8: ldo12 { |
| 352 | regulator-min-microvolt = <1650000>; |
| 353 | regulator-max-microvolt = <2000000>; |
| 354 | }; |
| 355 | |
| 356 | vreg_l13c_3p0: ldo13 { |
| 357 | regulator-min-microvolt = <2700000>; |
| 358 | regulator-max-microvolt = <3544000>; |
| 359 | }; |
| 360 | |
| 361 | vreg_bob: bob { |
| 362 | regulator-min-microvolt = <3008000>; |
| 363 | regulator-max-microvolt = <3960000>; |
| 364 | }; |
| 365 | }; |
| 366 | }; |
| 367 | |
| 368 | &gpi_dma0 { |
| 369 | status = "okay"; |
| 370 | }; |
| 371 | |
| 372 | &gpi_dma1 { |
| 373 | status = "okay"; |
| 374 | }; |
| 375 | |
| 376 | &lpass_cpu { |
| 377 | status = "okay"; |
| 378 | |
| 379 | pinctrl-names = "default"; |
| 380 | pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>; |
| 381 | |
| 382 | dai-link@1 { |
| 383 | reg = <MI2S_SECONDARY>; |
| 384 | qcom,playback-sd-lines = <0>; |
| 385 | }; |
| 386 | |
| 387 | dai-link@5 { |
| 388 | reg = <LPASS_DP_RX>; |
| 389 | }; |
| 390 | |
| 391 | dai-link@6 { |
| 392 | reg = <LPASS_CDC_DMA_RX0>; |
| 393 | }; |
| 394 | |
| 395 | dai-link@19 { |
| 396 | reg = <LPASS_CDC_DMA_TX3>; |
| 397 | }; |
| 398 | |
| 399 | dai-link@25 { |
| 400 | reg = <LPASS_CDC_DMA_VA_TX0>; |
| 401 | }; |
| 402 | }; |
| 403 | |
| 404 | &lpass_rx_macro { |
| 405 | status = "okay"; |
| 406 | }; |
| 407 | |
| 408 | &lpass_tx_macro { |
| 409 | status = "okay"; |
| 410 | }; |
| 411 | |
| 412 | &lpass_va_macro { |
| 413 | status = "okay"; |
| 414 | vdd-micb-supply = <&vreg_bob>; |
| 415 | }; |
| 416 | |
| 417 | &pcie1 { |
| 418 | status = "okay"; |
| 419 | perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; |
| 420 | |
| 421 | vddpe-3v3-supply = <&nvme_3v3_regulator>; |
| 422 | |
| 423 | pinctrl-names = "default"; |
| 424 | pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>; |
| 425 | }; |
| 426 | |
| 427 | &pcie1_phy { |
| 428 | status = "okay"; |
| 429 | |
| 430 | vdda-phy-supply = <&vreg_l10c_0p8>; |
| 431 | vdda-pll-supply = <&vreg_l6b_1p2>; |
| 432 | }; |
| 433 | |
| 434 | &pmk8350_vadc { |
| 435 | channel@3 { |
| 436 | reg = <PMK8350_ADC7_DIE_TEMP>; |
| 437 | label = "pmk8350_die_temp"; |
| 438 | qcom,pre-scaling = <1 1>; |
| 439 | }; |
| 440 | }; |
| 441 | |
| 442 | &qfprom { |
| 443 | vcc-supply = <&vreg_l1c_1p8>; |
| 444 | }; |
| 445 | |
| 446 | &qupv3_id_0 { |
| 447 | status = "okay"; |
| 448 | }; |
| 449 | |
| 450 | &qupv3_id_1 { |
| 451 | status = "okay"; |
| 452 | }; |
| 453 | |
| 454 | &sdhc_1 { |
| 455 | status = "okay"; |
| 456 | |
| 457 | non-removable; |
| 458 | no-sd; |
| 459 | no-sdio; |
| 460 | |
| 461 | vmmc-supply = <&vreg_l7b_2p9>; |
| 462 | vqmmc-supply = <&vreg_l19b_1p8>; |
| 463 | }; |
| 464 | |
| 465 | &sdhc_2 { |
| 466 | status = "okay"; |
| 467 | |
| 468 | pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>; |
| 469 | pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>; |
| 470 | |
| 471 | vmmc-supply = <&vreg_l9c_2p9>; |
| 472 | vqmmc-supply = <&vreg_l6c_2p9>; |
| 473 | |
| 474 | cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; |
| 475 | }; |
| 476 | |
| 477 | &swr0 { |
| 478 | status = "okay"; |
| 479 | |
| 480 | wcd_rx: codec@0,4 { |
| 481 | compatible = "sdw20217010d00"; |
| 482 | reg = <0 4>; |
| 483 | qcom,rx-port-mapping = <1 2 3 4 5>; |
| 484 | }; |
| 485 | }; |
| 486 | |
| 487 | &swr1 { |
| 488 | status = "okay"; |
| 489 | |
| 490 | wcd_tx: codec@0,3 { |
| 491 | compatible = "sdw20217010d00"; |
| 492 | reg = <0 3>; |
| 493 | qcom,tx-port-mapping = <1 2 3 4>; |
| 494 | }; |
| 495 | }; |
| 496 | |
| 497 | &uart5 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 498 | status = "okay"; |
| 499 | }; |
| 500 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 501 | &ufs_mem_hc { |
| 502 | reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; |
| 503 | vcc-supply = <&vreg_l7b_2p9>; |
| 504 | vcc-max-microamp = <800000>; |
| 505 | vccq-supply = <&vreg_l9b_1p2>; |
| 506 | vccq-max-microamp = <900000>; |
| 507 | vccq2-supply = <&vreg_l9b_1p2>; |
| 508 | vccq2-max-microamp = <900000>; |
| 509 | |
| 510 | status = "okay"; |
| 511 | }; |
| 512 | |
| 513 | &ufs_mem_phy { |
| 514 | vdda-phy-supply = <&vreg_l10c_0p8>; |
| 515 | vdda-pll-supply = <&vreg_l6b_1p2>; |
| 516 | |
| 517 | status = "okay"; |
| 518 | }; |
| 519 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 520 | &usb_1 { |
| 521 | status = "okay"; |
| 522 | }; |
| 523 | |
| 524 | &usb_1_dwc3 { |
| 525 | dr_mode = "host"; |
| 526 | }; |
| 527 | |
| 528 | &usb_1_hsphy { |
| 529 | status = "okay"; |
| 530 | |
| 531 | vdda-pll-supply = <&vreg_l10c_0p8>; |
| 532 | vdda33-supply = <&vreg_l2b_3p0>; |
| 533 | vdda18-supply = <&vreg_l1c_1p8>; |
| 534 | qcom,hs-rise-fall-time-bp = <0>; |
| 535 | qcom,squelch-detector-bp = <(-2090)>; |
| 536 | qcom,hs-disconnect-bp = <1743>; |
| 537 | qcom,hs-amplitude-bp = <1780>; |
| 538 | qcom,hs-crossover-voltage-microvolt = <(-31000)>; |
| 539 | qcom,hs-output-impedance-micro-ohms = <2600000>; |
| 540 | }; |
| 541 | |
| 542 | &usb_1_qmpphy { |
| 543 | status = "okay"; |
| 544 | |
| 545 | vdda-phy-supply = <&vreg_l6b_1p2>; |
| 546 | vdda-pll-supply = <&vreg_l1b_0p8>; |
| 547 | }; |
| 548 | |
| 549 | &uart7 { |
| 550 | status = "okay"; |
| 551 | |
| 552 | /delete-property/interrupts; |
| 553 | interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, |
| 554 | <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; |
| 555 | pinctrl-names = "default", "sleep"; |
| 556 | pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; |
| 557 | |
| 558 | bluetooth: bluetooth { |
| 559 | compatible = "qcom,wcn6750-bt"; |
| 560 | pinctrl-names = "default"; |
| 561 | pinctrl-0 = <&bt_en>, <&sw_ctrl>; |
| 562 | enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; |
| 563 | swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; |
| 564 | vddaon-supply = <&vreg_s7b_0p9>; |
| 565 | vddbtcxmx-supply = <&vreg_s7b_0p9>; |
| 566 | vddrfacmn-supply = <&vreg_s7b_0p9>; |
| 567 | vddrfa0p8-supply = <&vreg_s7b_0p9>; |
| 568 | vddrfa1p7-supply = <&vreg_s1b_1p8>; |
| 569 | vddrfa1p2-supply = <&vreg_s8b_1p2>; |
| 570 | vddrfa2p2-supply = <&vreg_s1c_2p2>; |
| 571 | vddasd-supply = <&vreg_l11c_2p8>; |
| 572 | max-speed = <3200000>; |
| 573 | }; |
| 574 | }; |
| 575 | |
| 576 | /* PINCTRL - additions to nodes defined in sc7280.dtsi */ |
| 577 | |
| 578 | &dp_hot_plug_det { |
| 579 | bias-disable; |
| 580 | }; |
| 581 | |
| 582 | &lpass_dmic01_clk { |
| 583 | drive-strength = <8>; |
| 584 | bias-disable; |
| 585 | }; |
| 586 | |
| 587 | &lpass_dmic01_data { |
| 588 | bias-pull-down; |
| 589 | }; |
| 590 | |
| 591 | &lpass_dmic23_clk { |
| 592 | drive-strength = <8>; |
| 593 | bias-disable; |
| 594 | }; |
| 595 | |
| 596 | &lpass_dmic23_data { |
| 597 | bias-pull-down; |
| 598 | }; |
| 599 | |
| 600 | &lpass_rx_swr_clk { |
| 601 | drive-strength = <2>; |
| 602 | slew-rate = <1>; |
| 603 | bias-disable; |
| 604 | }; |
| 605 | |
| 606 | &lpass_rx_swr_data { |
| 607 | drive-strength = <2>; |
| 608 | slew-rate = <1>; |
| 609 | bias-bus-hold; |
| 610 | }; |
| 611 | |
| 612 | &lpass_tx_swr_clk { |
| 613 | drive-strength = <2>; |
| 614 | slew-rate = <1>; |
| 615 | bias-disable; |
| 616 | }; |
| 617 | |
| 618 | &lpass_tx_swr_data { |
| 619 | drive-strength = <2>; |
| 620 | slew-rate = <1>; |
| 621 | bias-bus-hold; |
| 622 | }; |
| 623 | |
| 624 | &mi2s1_data0 { |
| 625 | drive-strength = <6>; |
| 626 | bias-disable; |
| 627 | }; |
| 628 | |
| 629 | &mi2s1_sclk { |
| 630 | drive-strength = <6>; |
| 631 | bias-disable; |
| 632 | }; |
| 633 | |
| 634 | &mi2s1_ws { |
| 635 | drive-strength = <6>; |
| 636 | }; |
| 637 | |
| 638 | &pm7325_gpios { |
| 639 | key_vol_up_default: key-vol-up-state { |
| 640 | pins = "gpio6"; |
| 641 | function = "normal"; |
| 642 | input-enable; |
| 643 | bias-pull-up; |
| 644 | power-source = <0>; |
| 645 | qcom,drive-strength = <3>; |
| 646 | }; |
| 647 | }; |
| 648 | |
| 649 | &pcie1_clkreq_n { |
| 650 | bias-pull-up; |
| 651 | drive-strength = <2>; |
| 652 | }; |
| 653 | |
| 654 | &qspi_cs0 { |
| 655 | bias-disable; /* External pullup */ |
| 656 | }; |
| 657 | |
| 658 | &qspi_clk { |
| 659 | bias-pull-down; /* No external pulls or external pulldown */ |
| 660 | }; |
| 661 | |
| 662 | &qspi_data0 { |
| 663 | bias-pull-down; /* No external pulls or external pulldown */ |
| 664 | }; |
| 665 | |
| 666 | &qspi_data1 { |
| 667 | bias-pull-down; /* No external pulls or external pulldown */ |
| 668 | }; |
| 669 | |
| 670 | &qup_uart5_tx { |
| 671 | drive-strength = <2>; |
| 672 | bias-disable; |
| 673 | }; |
| 674 | |
| 675 | &qup_uart5_rx { |
| 676 | drive-strength = <2>; |
| 677 | bias-pull-up; |
| 678 | }; |
| 679 | |
| 680 | &qup_uart7_cts { |
| 681 | /* |
| 682 | * Configure a bias-bus-hold on CTS to lower power |
| 683 | * usage when Bluetooth is turned off. Bus hold will |
| 684 | * maintain a low power state regardless of whether |
| 685 | * the Bluetooth module drives the pin in either |
| 686 | * direction or leaves the pin fully unpowered. |
| 687 | */ |
| 688 | bias-bus-hold; |
| 689 | }; |
| 690 | |
| 691 | &qup_uart7_rts { |
| 692 | /* We'll drive RTS, so no pull */ |
| 693 | drive-strength = <2>; |
| 694 | bias-disable; |
| 695 | }; |
| 696 | |
| 697 | &qup_uart7_tx { |
| 698 | /* We'll drive TX, so no pull */ |
| 699 | drive-strength = <2>; |
| 700 | bias-disable; |
| 701 | }; |
| 702 | |
| 703 | &qup_uart7_rx { |
| 704 | /* |
| 705 | * Configure a pull-up on RX. This is needed to avoid |
| 706 | * garbage data when the TX pin of the Bluetooth module is |
| 707 | * in tri-state (module powered off or not driving the |
| 708 | * signal yet). |
| 709 | */ |
| 710 | bias-pull-up; |
| 711 | }; |
| 712 | |
| 713 | &sdc1_clk { |
| 714 | bias-disable; |
| 715 | drive-strength = <16>; |
| 716 | }; |
| 717 | |
| 718 | &sdc1_cmd { |
| 719 | bias-pull-up; |
| 720 | drive-strength = <10>; |
| 721 | }; |
| 722 | |
| 723 | &sdc1_data { |
| 724 | bias-pull-up; |
| 725 | drive-strength = <10>; |
| 726 | }; |
| 727 | |
| 728 | &sdc1_rclk { |
| 729 | bias-pull-down; |
| 730 | }; |
| 731 | |
| 732 | &sdc2_clk { |
| 733 | bias-disable; |
| 734 | drive-strength = <16>; |
| 735 | }; |
| 736 | |
| 737 | &sdc2_cmd { |
| 738 | bias-pull-up; |
| 739 | drive-strength = <10>; |
| 740 | }; |
| 741 | |
| 742 | &sdc2_data { |
| 743 | bias-pull-up; |
| 744 | drive-strength = <10>; |
| 745 | }; |
| 746 | |
| 747 | &tlmm { |
| 748 | amp_en: amp-en-state { |
| 749 | pins = "gpio63"; |
| 750 | function = "gpio"; |
| 751 | bias-pull-down; |
| 752 | drive-strength = <2>; |
| 753 | }; |
| 754 | |
| 755 | bt_en: bt-en-state { |
| 756 | pins = "gpio85"; |
| 757 | function = "gpio"; |
| 758 | output-low; |
| 759 | bias-disable; |
| 760 | }; |
| 761 | |
| 762 | nvme_pwren: nvme-pwren-state { |
| 763 | function = "gpio"; |
| 764 | }; |
| 765 | |
| 766 | pcie1_reset_n: pcie1-reset-n-state { |
| 767 | pins = "gpio2"; |
| 768 | function = "gpio"; |
| 769 | |
| 770 | drive-strength = <16>; |
| 771 | output-low; |
| 772 | bias-disable; |
| 773 | }; |
| 774 | |
| 775 | pcie1_wake_n: pcie1-wake-n-state { |
| 776 | pins = "gpio3"; |
| 777 | function = "gpio"; |
| 778 | |
| 779 | drive-strength = <2>; |
| 780 | bias-pull-up; |
| 781 | }; |
| 782 | |
| 783 | qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { |
| 784 | pins = "gpio28"; |
| 785 | function = "gpio"; |
| 786 | /* |
| 787 | * Configure a bias-bus-hold on CTS to lower power |
| 788 | * usage when Bluetooth is turned off. Bus hold will |
| 789 | * maintain a low power state regardless of whether |
| 790 | * the Bluetooth module drives the pin in either |
| 791 | * direction or leaves the pin fully unpowered. |
| 792 | */ |
| 793 | bias-bus-hold; |
| 794 | }; |
| 795 | |
| 796 | qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { |
| 797 | pins = "gpio29"; |
| 798 | function = "gpio"; |
| 799 | /* |
| 800 | * Configure pull-down on RTS. As RTS is active low |
| 801 | * signal, pull it low to indicate the BT SoC that it |
| 802 | * can wakeup the system anytime from suspend state by |
| 803 | * pulling RX low (by sending wakeup bytes). |
| 804 | */ |
| 805 | bias-pull-down; |
| 806 | }; |
| 807 | |
| 808 | qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { |
| 809 | pins = "gpio30"; |
| 810 | function = "gpio"; |
| 811 | /* |
| 812 | * Configure pull-up on TX when it isn't actively driven |
| 813 | * to prevent BT SoC from receiving garbage during sleep. |
| 814 | */ |
| 815 | bias-pull-up; |
| 816 | }; |
| 817 | |
| 818 | qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { |
| 819 | pins = "gpio31"; |
| 820 | function = "gpio"; |
| 821 | /* |
| 822 | * Configure a pull-up on RX. This is needed to avoid |
| 823 | * garbage data when the TX pin of the Bluetooth module |
| 824 | * is floating which may cause spurious wakeups. |
| 825 | */ |
| 826 | bias-pull-up; |
| 827 | }; |
| 828 | |
| 829 | sd_cd: sd-cd-state { |
| 830 | pins = "gpio91"; |
| 831 | function = "gpio"; |
| 832 | bias-pull-up; |
| 833 | }; |
| 834 | |
| 835 | sw_ctrl: sw-ctrl-state { |
| 836 | pins = "gpio86"; |
| 837 | function = "gpio"; |
| 838 | bias-pull-down; |
| 839 | }; |
| 840 | |
| 841 | wcd_reset_n: wcd-reset-n-state { |
| 842 | pins = "gpio83"; |
| 843 | function = "gpio"; |
| 844 | drive-strength = <8>; |
| 845 | }; |
| 846 | |
| 847 | wcd_reset_n_sleep: wcd-reset-n-sleep-state { |
| 848 | pins = "gpio83"; |
| 849 | function = "gpio"; |
| 850 | drive-strength = <8>; |
| 851 | bias-disable; |
| 852 | }; |
| 853 | }; |