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git01.mediatek.com / filogic / uboot / 99618ca8dbfd33c23bde38afc3b41dfbca30d80b / . / dts / upstream / src / arm64 / qcom / qcm6490-shift-otter.dts
blob: 4667e47a74bc5b0f01a53beb49993d238b13c4ea [file] [log] [blame]
Tom Rini6b642ac2024-10-01 12:20:28 -0600[diff] [blame]1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2023, Luca Weiss <luca.weiss@fairphone.com>
4 * Copyright (c) 2024, Caleb Connolly <caleb@postmarketos.org>
5 */
6
7/dts-v1/;
8
9#define PM7250B_SID 8
10#define PM7250B_SID1 9
11
12#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
13#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
14#include <dt-bindings/leds/common.h>
15#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17#include "sc7280.dtsi"
18#include "pm7250b.dtsi"
19#include "pm7325.dtsi"
20#include "pm8350c.dtsi" /* PM7350C */
21#include "pmk8350.dtsi" /* PMK7325 */
22
23/delete-node/ &rmtfs_mem;
24
25/ {
26 model = "SHIFT SHIFTphone 8";
27 compatible = "shift,otter", "qcom,qcm6490";
28 chassis-type = "handset";
29
30 aliases {
31 serial0 = &uart5;
32 serial1 = &uart7;
33 };
34
35 chosen {
36 #address-cells = <2>;
37 #size-cells = <2>;
38 ranges;
39
40 stdout-path = "serial0:115200n8";
41
42 framebuffer0: framebuffer@a000000 {
43 compatible = "simple-framebuffer";
44 reg = <0x0 0xe1000000 0x0 (2400 * 1080 * 4)>;
45 width = <1080>;
46 height = <2400>;
47 stride = <(1080 * 4)>;
48 format = "a8r8g8b8";
49 clocks = <&gcc GCC_DISP_HF_AXI_CLK>;
50 };
51 };
52
53 gpio-keys {
54 compatible = "gpio-keys";
55
56 pinctrl-0 = <&volume_down_default>;
57 pinctrl-names = "default";
58
59 key-volume-up {
60 label = "Volume up";
61 gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>;
62 linux,code = <KEY_VOLUMEUP>;
63 debounce-interval = <15>;
64 };
65 };
66
67 pmic-glink {
68 compatible = "qcom,qcm6490-pmic-glink", "qcom,pmic-glink";
69
70 #address-cells = <1>;
71 #size-cells = <0>;
72
73 connector@0 {
74 compatible = "usb-c-connector";
75 reg = <0>;
76 power-role = "dual";
77 data-role = "dual";
78
79 ports {
80 #address-cells = <1>;
81 #size-cells = <0>;
82
83 port@0 {
84 reg = <0>;
85
86 pmic_glink_hs_in: endpoint {
87 remote-endpoint = <&usb_1_dwc3_hs>;
88 };
89 };
90
91 port@1 {
92 reg = <1>;
93
94 pmic_glink_ss_in: endpoint {
95 remote-endpoint = <&usb_dp_qmpphy_out>;
96 };
97 };
98
99 port@2 {
100 reg = <2>;
101
102 pmic_glink_sbu: endpoint {
103 remote-endpoint = <&fsa4480_sbu_mux>;
104 };
105 };
106 };
107 };
108 };
109
110 reserved-memory {
111 cont_splash_mem: cont-splash@e1000000 {
112 reg = <0x0 0xe1000000 0x0 0x2300000>;
113 no-map;
114 };
115
116 cdsp_mem: cdsp@88f00000 {
117 reg = <0x0 0x88f00000 0x0 0x1e00000>;
118 no-map;
119 };
120
121 rmtfs_mem: rmtfs@f8500000 {
122 compatible = "qcom,rmtfs-mem";
123 reg = <0x0 0xf8500000 0x0 0x600000>;
124 no-map;
125
126 qcom,client-id = <1>;
127 qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>, <QCOM_SCM_VMID_NAV>;
128 };
129 };
130
131 thermal-zones {
132 camera-thermal {
133 polling-delay-passive = <0>;
134 polling-delay = <0>;
135 thermal-sensors = <&pmk8350_adc_tm 2>;
136
137 trips {
138 active-config0 {
139 temperature = <125000>;
140 hysteresis = <1000>;
141 type = "passive";
142 };
143 };
144 };
145
146 chg-skin-thermal {
147 polling-delay-passive = <0>;
148 polling-delay = <0>;
149 thermal-sensors = <&pm7250b_adc_tm 0>;
150
151 trips {
152 active-config0 {
153 temperature = <125000>;
154 hysteresis = <1000>;
155 type = "passive";
156 };
157 };
158 };
159
160 conn-thermal {
161 polling-delay-passive = <0>;
162 polling-delay = <0>;
163 thermal-sensors = <&pm7250b_adc_tm 1>;
164
165 trips {
166 active-config0 {
167 temperature = <125000>;
168 hysteresis = <1000>;
169 type = "passive";
170 };
171 };
172 };
173
174 quiet-thermal {
175 polling-delay-passive = <0>;
176 polling-delay = <0>;
177 thermal-sensors = <&pmk8350_adc_tm 1>;
178
179 trips {
180 active-config0 {
181 temperature = <125000>;
182 hysteresis = <1000>;
183 type = "passive";
184 };
185 };
186 };
187
188 rear-cam-thermal {
189 polling-delay-passive = <0>;
190 polling-delay = <0>;
191 thermal-sensors = <&pmk8350_adc_tm 4>;
192
193 trips {
194 active-config0 {
195 temperature = <125000>;
196 hysteresis = <1000>;
197 type = "passive";
198 };
199 };
200 };
201
202 sdm-skin-thermal {
203 polling-delay-passive = <0>;
204 polling-delay = <0>;
205 thermal-sensors = <&pmk8350_adc_tm 3>;
206
207 trips {
208 active-config0 {
209 temperature = <125000>;
210 hysteresis = <1000>;
211 type = "passive";
212 };
213 };
214 };
215
216 xo-thermal {
217 polling-delay-passive = <0>;
218 polling-delay = <0>;
219 thermal-sensors = <&pmk8350_adc_tm 0>;
220
221 trips {
222 active-config0 {
223 temperature = <125000>;
224 hysteresis = <1000>;
225 type = "passive";
226 };
227 };
228 };
229 };
230};
231
232&apps_rsc {
233 regulators-0 {
234 compatible = "qcom,pm7325-rpmh-regulators";
235 qcom,pmic-id = "b";
236
237 vreg_s1b: smps1 {
238 regulator-name = "vreg_s1b";
239 regulator-min-microvolt = <1840000>;
240 regulator-max-microvolt = <2040000>;
241 };
242
243 vreg_s7b: smps7 {
244 regulator-name = "vreg_s7b";
245 regulator-min-microvolt = <535000>;
246 regulator-max-microvolt = <1120000>;
247 };
248
249 vreg_s8b: smps8 {
250 regulator-name = "vreg_s8b";
251 regulator-min-microvolt = <1200000>;
252 regulator-max-microvolt = <1500000>;
253 regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>;
254 };
255
256 vreg_l1b: ldo1 {
257 regulator-name = "vreg_l1b";
258 regulator-min-microvolt = <825000>;
259 regulator-max-microvolt = <925000>;
260 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
261 };
262
263 vreg_l2b: ldo2 {
264 regulator-name = "vreg_l2b";
265 regulator-min-microvolt = <2700000>;
266 regulator-max-microvolt = <3544000>;
267 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
268 };
269
270 vreg_l3b: ldo3 {
271 regulator-name = "vreg_l3b";
272 regulator-min-microvolt = <312000>;
273 regulator-max-microvolt = <910000>;
274 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
275 };
276
277 vreg_l6b: ldo6 {
278 regulator-name = "vreg_l6b";
279 regulator-min-microvolt = <1140000>;
280 regulator-max-microvolt = <1260000>;
281 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
282 };
283
284 vreg_l7b: ldo7 {
285 regulator-name = "vreg_l7b";
286 /* Constrained for UFS VCC, at least until UFS driver scales voltage */
287 regulator-min-microvolt = <2952000>;
288 regulator-max-microvolt = <2952000>;
289 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
290 };
291
292 vreg_l8b: ldo8 {
293 regulator-name = "vreg_l8b";
294 regulator-min-microvolt = <870000>;
295 regulator-max-microvolt = <970000>;
296 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
297 };
298
299 vreg_l9b: ldo9 {
300 regulator-name = "vreg_l9b";
301 regulator-min-microvolt = <1200000>;
302 regulator-max-microvolt = <1304000>;
303 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
304 };
305
306 vreg_l11b: ldo11 {
307 regulator-name = "vreg_l11b";
308 regulator-min-microvolt = <1504000>;
309 regulator-max-microvolt = <2000000>;
310 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
311 };
312
313 vreg_l12b: ldo12 {
314 regulator-name = "vreg_l12b";
315 regulator-min-microvolt = <751000>;
316 regulator-max-microvolt = <824000>;
317 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
318 };
319
320 vreg_l13b: ldo13 {
321 regulator-name = "vreg_l13b";
322 regulator-min-microvolt = <530000>;
323 regulator-max-microvolt = <824000>;
324 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
325 };
326
327 vreg_l14b: ldo14 {
328 regulator-name = "vreg_l14b";
329 regulator-min-microvolt = <1080000>;
330 regulator-max-microvolt = <1304000>;
331 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332 };
333
334 vreg_l15b: ldo15 {
335 regulator-name = "vreg_l15b";
336 regulator-min-microvolt = <765000>;
337 regulator-max-microvolt = <1020000>;
338 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
339 };
340
341 vreg_l16b: ldo16 {
342 regulator-name = "vreg_l16b";
343 regulator-min-microvolt = <1100000>;
344 regulator-max-microvolt = <1300000>;
345 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
346 };
347
348 vreg_l17b: ldo17 {
349 regulator-name = "vreg_l17b";
350 regulator-min-microvolt = <1700000>;
351 regulator-max-microvolt = <1900000>;
352 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
353 };
354
355 vreg_l18b: ldo18 {
356 regulator-name = "vreg_l18b";
357 regulator-min-microvolt = <1800000>;
358 regulator-max-microvolt = <2000000>;
359 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
360 };
361
362 vreg_l19b: ldo19 {
363 regulator-name = "vreg_l19b";
364 regulator-min-microvolt = <1800000>;
365 regulator-max-microvolt = <2000000>;
366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 };
368 };
369
370 regulators-1 {
371 compatible = "qcom,pm8350c-rpmh-regulators";
372 qcom,pmic-id = "c";
373
374 vreg_s1c: smps1 {
375 regulator-name = "vreg_s1c";
376 regulator-min-microvolt = <2190000>;
377 regulator-max-microvolt = <2210000>;
378 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 };
380
381 vreg_s9c: smps9 {
382 regulator-name = "vreg_s9c";
383 regulator-min-microvolt = <1010000>;
384 regulator-max-microvolt = <1170000>;
385 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
386 };
387
388 vreg_l1c: ldo1 {
389 regulator-name = "vreg_l1c";
390 regulator-min-microvolt = <1800000>;
391 regulator-max-microvolt = <1980000>;
392 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
393 };
394
395 vreg_l2c: ldo2 {
396 regulator-name = "vreg_l2c";
397 regulator-min-microvolt = <1800000>;
398 regulator-max-microvolt = <1950000>;
399 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
400 };
401
402 vreg_l3c: ldo3 {
403 regulator-name = "vreg_l3c";
404 regulator-min-microvolt = <3000000>;
405 regulator-max-microvolt = <3400000>;
406 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
407 };
408
409 vreg_l4c: ldo4 {
410 regulator-name = "vreg_l4c";
411 regulator-min-microvolt = <1620000>;
412 regulator-max-microvolt = <3300000>;
413 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
414 };
415
416 vreg_l5c: ldo5 {
417 regulator-name = "vreg_l5c";
418 regulator-min-microvolt = <1620000>;
419 regulator-max-microvolt = <3300000>;
420 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
421 };
422
423 vreg_l6c: ldo6 {
424 regulator-name = "vreg_l6c";
425 regulator-min-microvolt = <1650000>;
426 regulator-max-microvolt = <3544000>;
427 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
428 };
429
430 vreg_l7c: ldo7 {
431 regulator-name = "vreg_l7c";
432 regulator-min-microvolt = <3000000>;
433 regulator-max-microvolt = <3544000>;
434 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
435 };
436
437 vreg_l8c: ldo8 {
438 regulator-name = "vreg_l8c";
439 regulator-min-microvolt = <1620000>;
440 regulator-max-microvolt = <2000000>;
441 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
442 };
443
444 vreg_l9c: ldo9 {
445 regulator-name = "vreg_l9c";
446 regulator-min-microvolt = <2700000>;
447 regulator-max-microvolt = <3544000>;
448 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
449 };
450
451 vreg_l10c: ldo10 {
452 regulator-name = "vreg_l10c";
453 regulator-min-microvolt = <720000>;
454 regulator-max-microvolt = <1050000>;
455 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
456 };
457
458 vreg_l11c: ldo11 {
459 regulator-name = "vreg_l11c";
460 regulator-min-microvolt = <2800000>;
461 regulator-max-microvolt = <3544000>;
462 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
463 };
464
465 vreg_l12c: ldo12 {
466 regulator-name = "vreg_l12c";
467 regulator-min-microvolt = <1650000>;
468 regulator-max-microvolt = <2000000>;
469 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
470 };
471
472 vreg_l13c: ldo13 {
473 regulator-name = "vreg_l13c";
474 regulator-min-microvolt = <2700000>;
475 regulator-max-microvolt = <3544000>;
476 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
477 };
478
479 vreg_bob: bob {
480 regulator-name = "vreg_bob";
481 regulator-min-microvolt = <3008000>;
482 regulator-max-microvolt = <3960000>;
483 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
484 };
485 };
486};
487
488&gcc {
489 protected-clocks = <GCC_CFG_NOC_LPASS_CLK>,
490 <GCC_EDP_CLKREF_EN>,
491 <GCC_MSS_CFG_AHB_CLK>,
492 <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>,
493 <GCC_MSS_OFFLINE_AXI_CLK>,
494 <GCC_MSS_Q6SS_BOOT_CLK_SRC>,
495 <GCC_MSS_Q6_MEMNOC_AXI_CLK>,
496 <GCC_MSS_SNOC_AXI_CLK>,
497 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
498 <GCC_QSPI_CORE_CLK>,
499 <GCC_QSPI_CORE_CLK_SRC>,
500 <GCC_SEC_CTRL_CLK_SRC>,
501 <GCC_WPSS_AHB_BDG_MST_CLK>,
502 <GCC_WPSS_AHB_CLK>,
503 <GCC_WPSS_RSCP_CLK>;
504};
505
506&gpi_dma0 {
507 status = "okay";
508};
509
510&gpi_dma1 {
511 status = "okay";
512};
513
514&gpu {
515 status = "okay";
516};
517
518&gpu_zap_shader {
519 firmware-name = "qcom/qcm6490/SHIFT/otter/a660_zap.mbn";
520};
521
522&i2c1 {
523 status = "okay";
524
525 /* PM8008 PMIC @ 8 and 9 */
526 /* rtc6226 FM receiver @ 64 */
527
528 typec-mux@42 {
529 compatible = "fcs,fsa4480";
530 reg = <0x42>;
531
532 vcc-supply = <&vreg_bob>;
533
534 mode-switch;
535 orientation-switch;
536
537 port {
538 fsa4480_sbu_mux: endpoint {
539 remote-endpoint = <&pmic_glink_sbu>;
540 };
541 };
542 };
543};
544
545&i2c4 {
546 status = "okay";
547
548 /* tas2563 audio codec @ 4d */
549};
550
551&i2c9 {
552 status = "okay";
553
554 /* TMS(?) NFC @ 28 */
555 /* Ti drv2624 haptics @ 5a */
556};
557
558&i2c13 {
559 status = "okay";
560
561 /* focaltech FT3658U @ 38 */
562};
563
564&ipa {
565 qcom,gsi-loader = "self";
566 memory-region = <&ipa_fw_mem>;
567 firmware-name = "qcom/qcm6490/SHIFT/otter/ipa_fws.mbn";
568 status = "okay";
569};
570
571&pm7250b_adc {
572 channel@4d {
573 reg = <ADC5_AMUX_THM1_100K_PU>;
574 qcom,ratiometric;
575 qcom,hw-settle-time = <200>;
576 qcom,pre-scaling = <1 1>;
577 label = "charger_skin_therm";
578 };
579
580 channel@4f {
581 reg = <ADC5_AMUX_THM3_100K_PU>;
582 qcom,ratiometric;
583 qcom,hw-settle-time = <200>;
584 qcom,pre-scaling = <1 1>;
585 label = "conn_therm";
586 };
587};
588
589&pm7250b_adc_tm {
590 status = "okay";
591
592 charger-skin-therm@0 {
593 reg = <0>;
594 io-channels = <&pm7250b_adc ADC5_AMUX_THM1_100K_PU>;
595 qcom,ratiometric;
596 qcom,hw-settle-time-us = <200>;
597 };
598
599 conn-therm@1 {
600 reg = <1>;
601 io-channels = <&pm7250b_adc ADC5_AMUX_THM3_100K_PU>;
602 qcom,ratiometric;
603 qcom,hw-settle-time-us = <200>;
604 };
605};
606
607&pm7325_gpios {
608 volume_down_default: volume-down-default-state {
609 pins = "gpio6";
610 function = PMIC_GPIO_FUNC_NORMAL;
611 power-source = <1>;
612 bias-pull-up;
613 input-enable;
614 };
615};
616
617&pmk8350_adc_tm {
618 status = "okay";
619
620 xo-therm@0 {
621 reg = <0>;
622 io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>;
623 qcom,ratiometric;
624 qcom,hw-settle-time-us = <200>;
625 };
626
627 quiet-therm@1 {
628 reg = <1>;
629 io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM1_100K_PU>;
630 qcom,ratiometric;
631 qcom,hw-settle-time-us = <200>;
632 };
633
634 cam-flash-therm@2 {
635 reg = <2>;
636 io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM2_100K_PU>;
637 qcom,ratiometric;
638 qcom,hw-settle-time-us = <200>;
639 };
640
641 sdm-skin-therm@3 {
642 reg = <3>;
643 io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM3_100K_PU>;
644 qcom,ratiometric;
645 qcom,hw-settle-time-us = <200>;
646 };
647
648 wide-rfc-therm@4 {
649 reg = <4>;
650 io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM4_100K_PU>;
651 qcom,ratiometric;
652 qcom,hw-settle-time-us = <200>;
653 };
654};
655
656&pmk8350_rtc {
657 status = "okay";
658};
659
660&pmk8350_vadc {
661 status = "okay";
662
663 channel@44 {
664 reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>;
665 qcom,ratiometric;
666 qcom,hw-settle-time = <200>;
667 qcom,pre-scaling = <1 1>;
668 label = "pmk8350_xo_therm";
669 };
670
671 channel@144 {
672 reg = <PM7325_ADC7_AMUX_THM1_100K_PU>;
673 qcom,ratiometric;
674 qcom,hw-settle-time = <200>;
675 qcom,pre-scaling = <1 1>;
676 label = "pm7325_quiet_therm";
677 };
678
679 channel@145 {
680 reg = <PM7325_ADC7_AMUX_THM2_100K_PU>;
681 qcom,ratiometric;
682 qcom,hw-settle-time = <200>;
683 qcom,pre-scaling = <1 1>;
684 label = "pm7325_cam_flash_therm";
685 };
686
687 channel@146 {
688 reg = <PM7325_ADC7_AMUX_THM3_100K_PU>;
689 qcom,ratiometric;
690 qcom,hw-settle-time = <200>;
691 qcom,pre-scaling = <1 1>;
692 label = "pm7325_sdm_skin_therm";
693 };
694
695 channel@147 {
696 reg = <PM7325_ADC7_AMUX_THM4_100K_PU>;
697 qcom,ratiometric;
698 qcom,hw-settle-time = <200>;
699 qcom,pre-scaling = <1 1>;
700 label = "pm7325_wide_rfc_therm";
701 };
702};
703
704&pon_pwrkey {
705 status = "okay";
706};
707
708&pon_resin {
709 linux,code = <KEY_VOLUMEDOWN>;
710 status = "okay";
711};
712
713&qup_spi13_cs {
714 drive-strength = <6>;
715 bias-disable;
716};
717
718&qup_spi13_data_clk {
719 drive-strength = <6>;
720 bias-disable;
721};
722
723&qup_uart5_rx {
724 drive-strength = <2>;
725 bias-disable;
726};
727
728&qup_uart5_tx {
729 drive-strength = <2>;
730 bias-disable;
731};
732
733&qupv3_id_0 {
734 status = "okay";
735};
736
737&qupv3_id_1 {
738 status = "okay";
739};
740
741&remoteproc_adsp {
742 firmware-name = "qcom/qcm6490/SHIFT/otter/adsp.mbn";
743 status = "okay";
744};
745
746&remoteproc_cdsp {
747 firmware-name = "qcom/qcm6490/SHIFT/otter/cdsp.mbn";
748 status = "okay";
749};
750
751&remoteproc_mpss {
752 firmware-name = "qcom/qcm6490/SHIFT/otter/modem.mbn";
753 status = "okay";
754};
755
756&remoteproc_wpss {
757 firmware-name = "qcom/qcm6490/SHIFT/otter/wpss.mbn";
758 status = "okay";
759};
760
761&sdc2_clk {
762 drive-strength = <16>;
763 bias-disable;
764};
765
766&sdc2_cmd {
767 drive-strength = <10>;
768 bias-pull-up;
769};
770
771&sdc2_data {
772 drive-strength = <10>;
773 bias-pull-up;
774};
775
776&sdhc_2 {
777 vmmc-supply = <&vreg_l9c>;
778 vqmmc-supply = <&vreg_l6c>;
779
780 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>;
781 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>;
782
783 status = "okay";
784};
785
786&tlmm {
787 /*
788 * 48-52: protected by XPU, not sure why.
789 */
790 gpio-reserved-ranges = <48 4>;
791
792 bluetooth_enable_default: bluetooth-enable-default-state {
793 pins = "gpio85";
794 function = "gpio";
795 output-low;
796 bias-disable;
797 };
798
799 qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {
800 pins = "gpio28";
801 function = "gpio";
802 /*
803 * Configure a bias-bus-hold on CTS to lower power
804 * usage when Bluetooth is turned off. Bus hold will
805 * maintain a low power state regardless of whether
806 * the Bluetooth module drives the pin in either
807 * direction or leaves the pin fully unpowered.
808 */
809 bias-bus-hold;
810 };
811
812 qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {
813 pins = "gpio29";
814 function = "gpio";
815 /*
816 * Configure pull-down on RTS. As RTS is active low
817 * signal, pull it low to indicate the BT SoC that it
818 * can wakeup the system anytime from suspend state by
819 * pulling RX low (by sending wakeup bytes).
820 */
821 bias-pull-down;
822 };
823
824 qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {
825 pins = "gpio30";
826 function = "gpio";
827 /*
828 * Configure pull-up on TX when it isn't actively driven
829 * to prevent BT SoC from receiving garbage during sleep.
830 */
831 bias-pull-up;
832 };
833
834 qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {
835 pins = "gpio31";
836 function = "gpio";
837 /*
838 * Configure a pull-up on RX. This is needed to avoid
839 * garbage data when the TX pin of the Bluetooth module
840 * is floating which may cause spurious wakeups.
841 */
842 bias-pull-up;
843 };
844
845 sw_ctrl_default: sw-ctrl-default-state {
846 pins = "gpio86";
847 function = "gpio";
848 bias-pull-down;
849 };
850};
851
852&uart5 {
853 compatible = "qcom,geni-debug-uart";
854 status = "okay";
855};
856
857&uart7 {
858 /delete-property/interrupts;
859 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
860 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
861
862 pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
863 pinctrl-names = "default", "sleep";
864
865 status = "okay";
866
867 bluetooth: bluetooth {
868 compatible = "qcom,wcn6750-bt";
869
870 pinctrl-0 = <&bluetooth_enable_default>, <&sw_ctrl_default>;
871 pinctrl-names = "default";
872
873 enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
874 swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
875
876 vddio-supply = <&vreg_l19b>;
877 vddaon-supply = <&vreg_s7b>;
878 vddbtcxmx-supply = <&vreg_s7b>;
879 vddrfacmn-supply = <&vreg_s7b>;
880 vddrfa0p8-supply = <&vreg_s7b>;
881 vddrfa1p7-supply = <&vreg_s1b>;
882 vddrfa1p2-supply = <&vreg_s8b>;
883 vddrfa2p2-supply = <&vreg_s1c>;
884 vddasd-supply = <&vreg_l11c>;
885
886 max-speed = <3200000>;
887 };
888};
889
890&ufs_mem_hc {
891 reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>;
892
893 vcc-supply = <&vreg_l7b>;
894 vcc-max-microamp = <800000>;
895 /*
896 * Technically l9b enables an eLDO (supplied by s1b) which then powers
897 * VCCQ2 of the UFS.
898 */
899 vccq-supply = <&vreg_l9b>;
900 vccq-max-microamp = <900000>;
901
902 status = "okay";
903};
904
905&ufs_mem_phy {
906 vdda-phy-supply = <&vreg_l10c>;
907 vdda-pll-supply = <&vreg_l6b>;
908
909 status = "okay";
910};
911
912&usb_1 {
913 status = "okay";
914};
915
916&usb_1_dwc3 {
917 dr_mode = "otg";
918 usb-role-switch;
919};
920
921&usb_1_dwc3_hs {
922 remote-endpoint = <&pmic_glink_hs_in>;
923};
924
925&usb_dp_qmpphy_out {
926 remote-endpoint = <&pmic_glink_ss_in>;
927};
928
929&usb_1_hsphy {
930 vdda-pll-supply = <&vreg_l10c>;
931 vdda18-supply = <&vreg_l1c>;
932 vdda33-supply = <&vreg_l2b>;
933
934 qcom,hs-crossover-voltage-microvolt = <28000>;
935 qcom,hs-output-impedance-micro-ohms = <2600000>;
936 qcom,hs-rise-fall-time-bp = <5430>;
937 qcom,hs-disconnect-bp = <1743>;
938 qcom,hs-amplitude-bp = <2430>;
939
940 qcom,pre-emphasis-amplitude-bp = <20000>;
941 qcom,pre-emphasis-duration-bp = <20000>;
942
943 qcom,squelch-detector-bp = <(-2090)>;
944
945 orientation-switch;
946
947 status = "okay";
948};
949
950&usb_1_qmpphy {
951 vdda-phy-supply = <&vreg_l6b>;
952 vdda-pll-supply = <&vreg_l1b>;
953
954 status = "okay";
955};
956
957&wifi {
958 qcom,ath11k-calibration-variant = "SHIFTphone_8";
959
960 status = "okay";
961};