Aneesh V | 3067942 | 2011-07-21 09:09:59 -0400 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010 |
| 3 | * Texas Instruments, <www.ti.com> |
| 4 | * |
| 5 | * Aneesh V <aneesh@ti.com> |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | #ifndef _OMAP_COMMON_H_ |
| 26 | #define _OMAP_COMMON_H_ |
| 27 | |
Aneesh V | 0d2628b | 2011-07-21 09:10:07 -0400 | [diff] [blame] | 28 | /* Max value for DPLL multiplier M */ |
| 29 | #define OMAP_DPLL_MAX_N 127 |
| 30 | |
Aneesh V | 3067942 | 2011-07-21 09:09:59 -0400 | [diff] [blame] | 31 | /* HW Init Context */ |
| 32 | #define OMAP_INIT_CONTEXT_SPL 0 |
| 33 | #define OMAP_INIT_CONTEXT_UBOOT_FROM_NOR 1 |
| 34 | #define OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL 2 |
| 35 | #define OMAP_INIT_CONTEXT_UBOOT_AFTER_CH 3 |
| 36 | |
Aneesh V | b8e60b9 | 2011-07-21 09:10:21 -0400 | [diff] [blame] | 37 | void preloader_console_init(void); |
| 38 | |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 39 | /* Boot device */ |
Simon Schwarz | 992dcf7 | 2011-09-14 15:29:26 -0400 | [diff] [blame^] | 40 | #ifdef CONFIG_OMAP44XX /* OMAP4 */ |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 41 | #define BOOT_DEVICE_NONE 0 |
| 42 | #define BOOT_DEVICE_XIP 1 |
| 43 | #define BOOT_DEVICE_XIPWAIT 2 |
| 44 | #define BOOT_DEVICE_NAND 3 |
| 45 | #define BOOT_DEVICE_ONE_NAND 4 |
| 46 | #define BOOT_DEVICE_MMC1 5 |
| 47 | #define BOOT_DEVICE_MMC2 6 |
Simon Schwarz | 992dcf7 | 2011-09-14 15:29:26 -0400 | [diff] [blame^] | 48 | #elif CONFIG_OMAP34XX /* OMAP3 */ |
| 49 | #define BOOT_DEVICE_NONE 0 |
| 50 | #define BOOT_DEVICE_XIP 1 |
| 51 | #define BOOT_DEVICE_NAND 2 |
| 52 | #define BOOT_DEVICE_ONE_NAND 3 |
| 53 | #define BOOT_DEVICE_MMC2 5 /*emmc*/ |
| 54 | #define BOOT_DEVICE_MMC1 6 |
| 55 | #define BOOT_DEVICE_XIPWAIT 7 |
| 56 | #endif |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 57 | |
| 58 | /* Boot type */ |
| 59 | #define MMCSD_MODE_UNDEFINED 0 |
| 60 | #define MMCSD_MODE_RAW 1 |
| 61 | #define MMCSD_MODE_FAT 2 |
Simon Schwarz | 992dcf7 | 2011-09-14 15:29:26 -0400 | [diff] [blame^] | 62 | #define NAND_MODE_HW_ECC 3 |
| 63 | |
| 64 | struct spl_image_info { |
| 65 | const char *name; |
| 66 | u8 os; |
| 67 | u32 load_addr; |
| 68 | u32 entry_point; |
| 69 | u32 size; |
| 70 | }; |
| 71 | |
| 72 | extern struct spl_image_info spl_image; |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 73 | |
| 74 | u32 omap_boot_device(void); |
| 75 | u32 omap_boot_mode(void); |
| 76 | |
Simon Schwarz | 992dcf7 | 2011-09-14 15:29:26 -0400 | [diff] [blame^] | 77 | |
| 78 | /* SPL common function s*/ |
| 79 | void spl_parse_image_header(const struct image_header *header); |
| 80 | |
| 81 | /* NAND SPL functions */ |
| 82 | void spl_nand_load_image(void); |
| 83 | |
| 84 | /* MMC SPL functions */ |
| 85 | void spl_mmc_load_image(void); |
| 86 | |
Aneesh V | 3067942 | 2011-07-21 09:09:59 -0400 | [diff] [blame] | 87 | #endif /* _OMAP_COMMON_H_ */ |