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git01.mediatek.com / filogic / uboot / 9924ca1eb2b560dcfa209071e39b8a18ec97b19c / . / configs / evb-rk3568_defconfig
blob: c7e0e5a796f4a918090a3c184a6402e4b96aa36d [file] [log] [blame]
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]5CONFIG_TEXT_BASE=0x00a00000
Nico Cheng00ceeb02021-10-26 10:42:19 +0800[diff] [blame]6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]8CONFIG_NR_DRAM_BANKS=2
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame^]9CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
10CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
Tom Rini5ca768d2022-01-24 21:08:41 +0000[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame^]12CONFIG_DM_RESET=y
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]13CONFIG_ROCKCHIP_RK3568=y
Nico Cheng00ceeb02021-10-26 10:42:19 +0800[diff] [blame]14CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
15CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
16CONFIG_SPL_MMC=y
17CONFIG_SPL_SERIAL=y
Nico Cheng00ceeb02021-10-26 10:42:19 +0800[diff] [blame]18CONFIG_SPL_STACK_R_ADDR=0x600000
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]19CONFIG_TARGET_EVB_RK3568=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame^]20CONFIG_SPL_STACK=0x400000
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]21CONFIG_DEBUG_UART_BASE=0xFE660000
22CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]23CONFIG_SYS_LOAD_ADDR=0xc00800
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]24CONFIG_DEBUG_UART=y
Nico Cheng00ceeb02021-10-26 10:42:19 +0800[diff] [blame]25CONFIG_FIT=y
26CONFIG_FIT_VERBOSE=y
27CONFIG_SPL_LOAD_FIT=y
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]28CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb"
29# CONFIG_DISPLAY_CPUINFO is not set
30CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]31CONFIG_SPL_MAX_SIZE=0x20000
32CONFIG_SPL_PAD_TO=0x7f8000
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]33CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
34CONFIG_SPL_BSS_START_ADDR=0x4000000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]35CONFIG_SPL_BSS_MAX_SIZE=0x4000
Nico Cheng00ceeb02021-10-26 10:42:19 +0800[diff] [blame]36# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]37# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Nico Cheng00ceeb02021-10-26 10:42:19 +0800[diff] [blame]38CONFIG_SPL_STACK_R=y
Nico Cheng00ceeb02021-10-26 10:42:19 +0800[diff] [blame]39CONFIG_SPL_ATF=y
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]40CONFIG_CMD_GPT=y
41CONFIG_CMD_MMC=y
42# CONFIG_CMD_SETEXPR is not set
Nico Cheng00ceeb02021-10-26 10:42:19 +0800[diff] [blame]43# CONFIG_SPL_DOS_PARTITION is not set
44CONFIG_SPL_OF_CONTROL=y
45CONFIG_OF_LIVE=y
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]46CONFIG_NET_RANDOM_ETHADDR=y
Nico Cheng00ceeb02021-10-26 10:42:19 +0800[diff] [blame]47CONFIG_SPL_REGMAP=y
48CONFIG_SPL_SYSCON=y
49CONFIG_SPL_CLK=y
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]50CONFIG_ROCKCHIP_GPIO=y
51CONFIG_SYS_I2C_ROCKCHIP=y
52CONFIG_MISC=y
Tom Rini5df873f2021-12-11 14:55:53 -0500[diff] [blame]53CONFIG_SUPPORT_EMMC_RPMB=y
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]54CONFIG_MMC_DW=y
55CONFIG_MMC_DW_ROCKCHIP=y
56CONFIG_MMC_SDHCI=y
57CONFIG_MMC_SDHCI_SDMA=y
58CONFIG_MMC_SDHCI_ROCKCHIP=y
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]59CONFIG_ETH_DESIGNWARE=y
60CONFIG_GMAC_ROCKCHIP=y
61CONFIG_REGULATOR_PWM=y
62CONFIG_PWM_ROCKCHIP=y
Nico Cheng00ceeb02021-10-26 10:42:19 +0800[diff] [blame]63CONFIG_SPL_RAM=y
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]64CONFIG_BAUDRATE=1500000
65CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]66CONFIG_SYS_NS16550_MEM32=y
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]67CONFIG_SYSRESET=y
Jagan Tekic5386942023-01-08 21:47:34 +0530[diff] [blame]68# CONFIG_BINMAN_FDT is not set
Joseph Chen16899892021-06-02 16:13:46 +0800[diff] [blame]69CONFIG_ERRNO_STR=y