Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 990e05729d0a61dd2f81888bf41727b99488e12e / . / configs / evb-rk3128_defconfig
blob: f15969546e29c7c68b5176a0035244301f86c973 [file] [log] [blame]
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]3CONFIG_SYS_ARCH_TIMER=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]5CONFIG_TEXT_BASE=0x60000000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=2
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]7CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
8CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]9CONFIG_SF_DEFAULT_SPEED=20000000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]10CONFIG_ENV_OFFSET=0x0
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb"
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]12CONFIG_DM_RESET=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]13CONFIG_ROCKCHIP_RK3128=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]14CONFIG_DEBUG_UART_BASE=0x20068000
15CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini7c027e02022-06-20 08:13:12 -0400[diff] [blame]16# CONFIG_DEBUG_UART_BOARD_INIT is not set
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]17CONFIG_SYS_LOAD_ADDR=0x60800800
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]18CONFIG_DEBUG_UART=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]19CONFIG_FIT=y
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]20CONFIG_SYS_BOOTM_LEN=0x4000000
Klaus Goger2b6b4f22018-05-25 23:45:05 +0200[diff] [blame]21CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb"
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]22# CONFIG_DISPLAY_CPUINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]23CONFIG_DISPLAY_BOARDINFO_LATE=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]24CONFIG_CMD_GPT=y
25CONFIG_CMD_MMC=y
26CONFIG_CMD_USB=y
27CONFIG_CMD_USB_MASS_STORAGE=y
28# CONFIG_CMD_SETEXPR is not set
29CONFIG_CMD_TIME=y
Tom Rini254f5782019-11-09 17:33:49 -0500[diff] [blame]30CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]31CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]32CONFIG_REGMAP=y
33CONFIG_SYSCON=y
34CONFIG_CLK=y
Alex Kiernane80d2942018-05-29 15:30:55 +0000[diff] [blame]35CONFIG_FASTBOOT_BUF_ADDR=0x60800800
36CONFIG_FASTBOOT_BUF_SIZE=0x04000000
Alex Kiernane80d2942018-05-29 15:30:55 +0000[diff] [blame]37CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]38CONFIG_ROCKCHIP_GPIO=y
39CONFIG_SYS_I2C_ROCKCHIP=y
40CONFIG_MMC_DW=y
41CONFIG_MMC_DW_ROCKCHIP=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]42CONFIG_MTD=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]43CONFIG_PHY=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]44CONFIG_PINCTRL=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]45CONFIG_REGULATOR_PWM=y
46CONFIG_DM_REGULATOR_FIXED=y
47CONFIG_RAM=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]48CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]49CONFIG_SYS_NS16550_MEM32=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]50CONFIG_SYSRESET=y
51CONFIG_USB=y
52CONFIG_USB_EHCI_HCD=y
53CONFIG_USB_EHCI_GENERIC=y
54CONFIG_USB_OHCI_HCD=y
55CONFIG_USB_OHCI_GENERIC=y
56CONFIG_USB_DWC2=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]57CONFIG_USB_GADGET=y
58CONFIG_USB_GADGET_DWC2_OTG=y
Kever Yangbe71f432017-11-28 16:04:20 +0800[diff] [blame]59CONFIG_ERRNO_STR=y