Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2011-2012 Freescale Semiconductor, Inc. |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /* |
| 7 | * Corenet DS style board configuration file |
| 8 | */ |
York Sun | 9b85a48 | 2013-06-27 10:48:29 -0700 | [diff] [blame] | 9 | #ifndef __T4QDS_H |
| 10 | #define __T4QDS_H |
Liu Gang | 50082f0 | 2013-05-07 16:30:50 +0800 | [diff] [blame] | 11 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 12 | /* High Level Configuration Options */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 13 | #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 14 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 15 | #ifndef CONFIG_RESET_VECTOR_ADDRESS |
| 16 | #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc |
| 17 | #endif |
| 18 | |
| 19 | #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ |
York Sun | fe84507 | 2016-12-28 08:43:45 -0800 | [diff] [blame] | 20 | #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS |
Robert P. J. Day | a809981 | 2016-05-03 19:52:49 -0400 | [diff] [blame] | 21 | #define CONFIG_PCIE1 /* PCIE controller 1 */ |
| 22 | #define CONFIG_PCIE2 /* PCIE controller 2 */ |
| 23 | #define CONFIG_PCIE3 /* PCIE controller 3 */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 24 | #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ |
| 25 | #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ |
| 26 | |
| 27 | #define CONFIG_SYS_SRIO |
| 28 | #define CONFIG_SRIO1 /* SRIO port 1 */ |
| 29 | #define CONFIG_SRIO2 /* SRIO port 2 */ |
| 30 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 31 | #define CONFIG_ENV_OVERWRITE |
| 32 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 33 | /* |
| 34 | * These can be toggled for performance analysis, otherwise use default. |
| 35 | */ |
| 36 | #define CONFIG_SYS_CACHE_STASHING |
| 37 | #define CONFIG_BTB /* toggle branch predition */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 38 | #ifdef CONFIG_DDR_ECC |
| 39 | #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER |
| 40 | #define CONFIG_MEM_INIT_VALUE 0xdeadbeef |
| 41 | #endif |
| 42 | |
| 43 | #define CONFIG_ENABLE_36BIT_PHYS |
| 44 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 45 | /* |
| 46 | * Config the L3 Cache as L3 SRAM |
| 47 | */ |
Shaohui Xie | 9ff72dc | 2014-04-22 15:10:44 +0800 | [diff] [blame] | 48 | #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 |
| 49 | #define CONFIG_SYS_L3_SIZE (512 << 10) |
| 50 | #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024) |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 51 | #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) |
Shaohui Xie | 9ff72dc | 2014-04-22 15:10:44 +0800 | [diff] [blame] | 52 | #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024) |
| 53 | #define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10) |
| 54 | #define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024) |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 55 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 56 | #define CONFIG_SYS_DCSRBAR 0xf0000000 |
| 57 | #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 58 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 59 | /* |
| 60 | * DDR Setup |
| 61 | */ |
| 62 | #define CONFIG_VERY_BIG_RAM |
| 63 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 |
| 64 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
| 65 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 66 | #define CONFIG_DIMM_SLOTS_PER_CTLR 2 |
| 67 | #define CONFIG_CHIP_SELECTS_PER_CTRL 4 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 68 | |
| 69 | #define CONFIG_DDR_SPD |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 70 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 71 | /* |
| 72 | * IFC Definitions |
| 73 | */ |
| 74 | #define CONFIG_SYS_FLASH_BASE 0xe0000000 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 75 | #define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 76 | |
Shaohui Xie | 9ff72dc | 2014-04-22 15:10:44 +0800 | [diff] [blame] | 77 | #ifdef CONFIG_SPL_BUILD |
| 78 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE |
| 79 | #else |
| 80 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ |
| 81 | #endif |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 82 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 83 | #define CONFIG_HWCONFIG |
| 84 | |
| 85 | /* define to use L1 as initial stack */ |
| 86 | #define CONFIG_L1_INIT_RAM |
| 87 | #define CONFIG_SYS_INIT_RAM_LOCK |
| 88 | #define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 89 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf |
York Sun | ee7b483 | 2015-08-17 13:31:51 -0700 | [diff] [blame] | 90 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 91 | /* The assembler doesn't like typecast */ |
| 92 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ |
| 93 | ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ |
| 94 | CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 95 | #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 |
| 96 | |
| 97 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ |
| 98 | GENERATED_GBL_DATA_SIZE) |
| 99 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
| 100 | |
Prabhakar Kushwaha | f402731 | 2014-03-31 15:31:48 +0530 | [diff] [blame] | 101 | #define CONFIG_SYS_MONITOR_LEN (768 * 1024) |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 102 | #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) |
| 103 | |
| 104 | /* Serial Port - controlled on board with jumper J8 |
| 105 | * open - index 2 |
| 106 | * shorted - index 1 |
| 107 | */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 108 | #define CONFIG_SYS_NS16550_SERIAL |
| 109 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| 110 | #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) |
| 111 | |
| 112 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
| 113 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} |
| 114 | |
| 115 | #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) |
| 116 | #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) |
| 117 | #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) |
| 118 | #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) |
| 119 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 120 | /* I2C */ |
Heiko Schocher | f285074 | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 121 | #define CONFIG_SYS_I2C |
| 122 | #define CONFIG_SYS_I2C_FSL |
Heiko Schocher | f285074 | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 123 | #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F |
| 124 | #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 |
Heiko Schocher | f285074 | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 125 | #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F |
| 126 | #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 |
| 127 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 128 | /* |
| 129 | * RapidIO |
| 130 | */ |
| 131 | #define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 132 | #define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 133 | #define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ |
| 134 | |
| 135 | #define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 136 | #define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 137 | #define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ |
| 138 | |
| 139 | /* |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 140 | * General PCI |
| 141 | * Memory space is mapped 1-1, but I/O space must start from 0. |
| 142 | */ |
| 143 | |
| 144 | /* controller 1, direct to uli, tgtid 3, Base address 20000 */ |
| 145 | #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 146 | #define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 |
| 147 | #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 148 | #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ |
| 149 | #define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 |
| 150 | #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 151 | #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 152 | #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ |
| 153 | |
| 154 | /* controller 2, Slot 2, tgtid 2, Base address 201000 */ |
| 155 | #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 156 | #define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 |
| 157 | #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 158 | #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ |
| 159 | #define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 |
| 160 | #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 161 | #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 162 | #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ |
| 163 | |
| 164 | /* controller 3, Slot 1, tgtid 1, Base address 202000 */ |
| 165 | #define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 166 | #define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 |
| 167 | #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 168 | #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ |
| 169 | #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 |
| 170 | #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 171 | #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 172 | #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ |
| 173 | |
| 174 | /* controller 4, Base address 203000 */ |
| 175 | #define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 |
| 176 | #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull |
| 177 | #define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */ |
| 178 | #define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 |
| 179 | #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull |
| 180 | #define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ |
| 181 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 182 | #ifdef CONFIG_PCI |
Gabor Juhos | b445873 | 2013-05-30 07:06:12 +0000 | [diff] [blame] | 183 | #define CONFIG_PCI_INDIRECT_BRIDGE |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 184 | |
| 185 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 186 | #endif /* CONFIG_PCI */ |
| 187 | |
| 188 | /* SATA */ |
| 189 | #ifdef CONFIG_FSL_SATA_V2 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 190 | #define CONFIG_SYS_SATA_MAX_DEVICE 2 |
| 191 | #define CONFIG_SATA1 |
| 192 | #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR |
| 193 | #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA |
| 194 | #define CONFIG_SATA2 |
| 195 | #define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR |
| 196 | #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA |
| 197 | |
| 198 | #define CONFIG_LBA48 |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 199 | #endif |
| 200 | |
| 201 | #ifdef CONFIG_FMAN_ENET |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 202 | #define CONFIG_ETHPRIME "FM1@DTSEC1" |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 203 | #endif |
| 204 | |
| 205 | /* |
| 206 | * Environment |
| 207 | */ |
| 208 | #define CONFIG_LOADS_ECHO /* echo on for serial download */ |
| 209 | #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ |
| 210 | |
| 211 | /* |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 212 | * Miscellaneous configurable options |
| 213 | */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 214 | #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 215 | |
| 216 | /* |
| 217 | * For booting Linux, the board info and command line data |
| 218 | * have to be in the first 64 MB of memory, since this is |
| 219 | * the maximum mapped by the Linux kernel during initialization. |
| 220 | */ |
| 221 | #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ |
| 222 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ |
| 223 | |
| 224 | #ifdef CONFIG_CMD_KGDB |
| 225 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 226 | #endif |
| 227 | |
| 228 | /* |
| 229 | * Environment Configuration |
| 230 | */ |
| 231 | #define CONFIG_ROOTPATH "/opt/nfsroot" |
| 232 | #define CONFIG_BOOTFILE "uImage" |
| 233 | #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ |
| 234 | |
| 235 | /* default location for tftp and bootm */ |
| 236 | #define CONFIG_LOADADDR 1000000 |
| 237 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 238 | #define CONFIG_HVBOOT \ |
| 239 | "setenv bootargs config-addr=0x60000000; " \ |
| 240 | "bootm 0x01000000 - 0x00f00000" |
| 241 | |
York Sun | 667ab1a | 2012-10-11 07:13:37 +0000 | [diff] [blame] | 242 | #endif /* __CONFIG_H */ |