blob: 24a0025eda3d953bb1a378928389b7bf5d213abc [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Eric Benard2e66f3b2014-04-04 19:05:55 +02002/*
3 * Copyright (C) 2014 Eukréa Electromatique
4 * Author: Eric Bénard <eric@eukrea.com>
5 *
6 * Configuration settings for the Embest RIoTboard
7 *
8 * based on mx6*sabre*.h which are :
9 * Copyright (C) 2012 Freescale Semiconductor, Inc.
Eric Benard2e66f3b2014-04-04 19:05:55 +020010 */
11
12#ifndef __RIOTBOARD_CONFIG_H
13#define __RIOTBOARD_CONFIG_H
14
Eric Benard2e66f3b2014-04-04 19:05:55 +020015#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -060016#define CONSOLE_DEV "ttymxc1"
Eric Benard2e66f3b2014-04-04 19:05:55 +020017
18#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
19
Adrian Alonsoce08c362015-09-02 13:54:13 -050020#define CONFIG_IMX_THERMAL
Eric Benard2e66f3b2014-04-04 19:05:55 +020021
22/* Size of malloc() pool */
23#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
24
Eric Benard2e66f3b2014-04-04 19:05:55 +020025#define CONFIG_MXC_UART
26
Eric Benard2e66f3b2014-04-04 19:05:55 +020027/* I2C Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020028#define CONFIG_SYS_I2C
29#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020030#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
31#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -070032#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Eric Benard2e66f3b2014-04-04 19:05:55 +020033#define CONFIG_SYS_I2C_SPEED 100000
34
35/* USB Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020036#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
37#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
38#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
39#define CONFIG_MXC_USB_FLAGS 0
40
41/* MMC Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020042#define CONFIG_SYS_FSL_ESDHC_ADDR 0
43
Eric Benard2e66f3b2014-04-04 19:05:55 +020044#define CONFIG_FEC_MXC
Eric Benard2e66f3b2014-04-04 19:05:55 +020045#define IMX_FEC_BASE ENET_BASE_ADDR
46#define CONFIG_FEC_XCV_TYPE RGMII
47#define CONFIG_ETHPRIME "FEC"
48#define CONFIG_FEC_MXC_PHYADDR 4
49
Eric Benard2e66f3b2014-04-04 19:05:55 +020050#define CONFIG_ARP_TIMEOUT 200UL
51
Eric Benard2e66f3b2014-04-04 19:05:55 +020052/* Physical Memory Map */
Eric Benard2e66f3b2014-04-04 19:05:55 +020053#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
54
55#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
56#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
57#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
58
59#define CONFIG_SYS_INIT_SP_OFFSET \
60 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
61#define CONFIG_SYS_INIT_SP_ADDR \
62 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
63
Peter Robinson4b671502015-05-22 17:30:45 +010064/* Environment organization */
Eric Benard2e66f3b2014-04-04 19:05:55 +020065
66#if defined(CONFIG_ENV_IS_IN_MMC)
67/* RiOTboard */
Iain Patone90c9ab2014-12-14 14:51:46 +000068#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
Eric Benard2e66f3b2014-04-04 19:05:55 +020069#define CONFIG_SYS_FSL_USDHC_NUM 3
70#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
Eric Benard2e66f3b2014-04-04 19:05:55 +020071#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
72/* MarSBoard */
Iain Patone90c9ab2014-12-14 14:51:46 +000073#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
Eric Benard2e66f3b2014-04-04 19:05:55 +020074#define CONFIG_SYS_FSL_USDHC_NUM 2
Eric Benard2e66f3b2014-04-04 19:05:55 +020075#endif
76
Eric Benard2e66f3b2014-04-04 19:05:55 +020077/* Framebuffer */
Eric Benard2e66f3b2014-04-04 19:05:55 +020078#define CONFIG_VIDEO_BMP_RLE8
79#define CONFIG_SPLASH_SCREEN
80#define CONFIG_SPLASH_SCREEN_ALIGN
81#define CONFIG_BMP_16BPP
82#define CONFIG_VIDEO_LOGO
83#define CONFIG_VIDEO_BMP_LOGO
Eric Benard2e66f3b2014-04-04 19:05:55 +020084#define CONFIG_IMX_HDMI
85#define CONFIG_IMX_VIDEO_SKIP
86
Peter Robinsonbe6c5f12015-05-22 17:30:52 +010087#include "mx6_common.h"
Iain Paton2e891152014-12-14 14:51:32 +000088
Fabien Lahouderea47a6a12018-11-08 11:28:05 +010089#ifdef CONFIG_SPL
90#include "imx6_spl.h"
91/* RiOTboard */
92#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
93#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
94#define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6dl-riotboard.dtb"
95
96#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* offset 69KB */
97#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */
98#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */
99
100#endif
101
Iain Patone90c9ab2014-12-14 14:51:46 +0000102/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
103 * 1M script, 1M pxe and the ramdisk at the end */
104#define MEM_LAYOUT_ENV_SETTINGS \
105 "bootm_size=0x10000000\0" \
106 "kernel_addr_r=0x12000000\0" \
107 "fdt_addr_r=0x13000000\0" \
108 "scriptaddr=0x13100000\0" \
109 "pxefile_addr_r=0x13200000\0" \
110 "ramdisk_addr_r=0x13300000\0"
111
112#define BOOT_TARGET_DEVICES(func) \
113 func(MMC, mmc, 0) \
114 func(MMC, mmc, 1) \
115 func(MMC, mmc, 2) \
116 func(USB, usb, 0) \
117 func(PXE, pxe, na) \
118 func(DHCP, dhcp, na)
119
120#include <config_distro_bootcmd.h>
121
122#define CONSOLE_STDIN_SETTINGS \
123 "stdin=serial\0"
124
125#define CONSOLE_STDOUT_SETTINGS \
126 "stdout=serial\0" \
127 "stderr=serial\0"
128
129#define CONSOLE_ENV_SETTINGS \
130 CONSOLE_STDIN_SETTINGS \
131 CONSOLE_STDOUT_SETTINGS
132
133#define CONFIG_EXTRA_ENV_SETTINGS \
134 CONSOLE_ENV_SETTINGS \
135 MEM_LAYOUT_ENV_SETTINGS \
136 "fdtfile=" CONFIG_FDTFILE "\0" \
Fabio Bertoncd681b22017-07-10 17:04:11 -0300137 "finduuid=part uuid mmc 0:1 uuid\0" \
Iain Patone90c9ab2014-12-14 14:51:46 +0000138 BOOTENV
139
Eric Benard2e66f3b2014-04-04 19:05:55 +0200140#endif /* __RIOTBOARD_CONFIG_H */