Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 2 | /** |
| 3 | * ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling |
| 4 | * |
Kishon Vijay Abraham I | d1e431a | 2015-02-23 18:39:52 +0530 | [diff] [blame] | 5 | * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 6 | * |
| 7 | * Authors: Felipe Balbi <balbi@ti.com>, |
| 8 | * Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
| 9 | * |
Kishon Vijay Abraham I | d1e431a | 2015-02-23 18:39:52 +0530 | [diff] [blame] | 10 | * Taken from Linux Kernel v3.19-rc1 (drivers/usb/dwc3/ep0.c) and ported |
| 11 | * to uboot. |
| 12 | * |
| 13 | * commit c00552ebaf : Merge 3.18-rc7 into usb-next |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 14 | */ |
Jean-Jacques Hiblot | 31da49d | 2018-11-29 10:52:50 +0100 | [diff] [blame] | 15 | #include <common.h> |
Simon Glass | 6333448 | 2019-11-14 12:57:39 -0700 | [diff] [blame] | 16 | #include <cpu_func.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 17 | #include <dm/device_compat.h> |
Simon Glass | c06c1be | 2020-05-10 11:40:08 -0600 | [diff] [blame] | 18 | #include <linux/bug.h> |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 19 | #include <linux/kernel.h> |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 20 | #include <linux/list.h> |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 21 | |
| 22 | #include <linux/usb/ch9.h> |
| 23 | #include <linux/usb/gadget.h> |
| 24 | #include <linux/usb/composite.h> |
| 25 | |
| 26 | #include "core.h" |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 27 | #include "gadget.h" |
| 28 | #include "io.h" |
| 29 | |
Kishon Vijay Abraham I | 9c38ca4 | 2015-02-23 18:40:00 +0530 | [diff] [blame] | 30 | #include "linux-compat.h" |
| 31 | |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 32 | static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep); |
| 33 | static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, |
| 34 | struct dwc3_ep *dep, struct dwc3_request *req); |
| 35 | |
| 36 | static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state) |
| 37 | { |
| 38 | switch (state) { |
| 39 | case EP0_UNCONNECTED: |
| 40 | return "Unconnected"; |
| 41 | case EP0_SETUP_PHASE: |
| 42 | return "Setup Phase"; |
| 43 | case EP0_DATA_PHASE: |
| 44 | return "Data Phase"; |
| 45 | case EP0_STATUS_PHASE: |
| 46 | return "Status Phase"; |
| 47 | default: |
| 48 | return "UNKNOWN"; |
| 49 | } |
| 50 | } |
| 51 | |
| 52 | static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma, |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 53 | u32 len, u32 type, unsigned chain) |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 54 | { |
| 55 | struct dwc3_gadget_ep_cmd_params params; |
| 56 | struct dwc3_trb *trb; |
| 57 | struct dwc3_ep *dep; |
| 58 | |
| 59 | int ret; |
| 60 | |
| 61 | dep = dwc->eps[epnum]; |
| 62 | if (dep->flags & DWC3_EP_BUSY) { |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 63 | dev_vdbg(dwc->dev, "%s still busy", dep->name); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 64 | return 0; |
| 65 | } |
| 66 | |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 67 | trb = &dwc->ep0_trb[dep->free_slot]; |
| 68 | |
| 69 | if (chain) |
| 70 | dep->free_slot++; |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 71 | |
| 72 | trb->bpl = lower_32_bits(buf_dma); |
| 73 | trb->bph = upper_32_bits(buf_dma); |
| 74 | trb->size = len; |
| 75 | trb->ctrl = type; |
| 76 | |
| 77 | trb->ctrl |= (DWC3_TRB_CTRL_HWO |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 78 | | DWC3_TRB_CTRL_ISP_IMI); |
| 79 | |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 80 | if (chain) |
| 81 | trb->ctrl |= DWC3_TRB_CTRL_CHN; |
| 82 | else |
| 83 | trb->ctrl |= (DWC3_TRB_CTRL_IOC |
| 84 | | DWC3_TRB_CTRL_LST); |
| 85 | |
Philipp Tomsich | ed12167 | 2017-04-06 16:58:52 +0200 | [diff] [blame] | 86 | dwc3_flush_cache((uintptr_t)buf_dma, len); |
| 87 | dwc3_flush_cache((uintptr_t)trb, sizeof(*trb)); |
Kishon Vijay Abraham I | c7bdfe3 | 2015-02-23 18:40:13 +0530 | [diff] [blame] | 88 | |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 89 | if (chain) |
| 90 | return 0; |
| 91 | |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 92 | memset(¶ms, 0, sizeof(params)); |
| 93 | params.param0 = upper_32_bits(dwc->ep0_trb_addr); |
| 94 | params.param1 = lower_32_bits(dwc->ep0_trb_addr); |
| 95 | |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 96 | ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, |
| 97 | DWC3_DEPCMD_STARTTRANSFER, ¶ms); |
| 98 | if (ret < 0) { |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 99 | dev_dbg(dwc->dev, "%s STARTTRANSFER failed", dep->name); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 100 | return ret; |
| 101 | } |
| 102 | |
| 103 | dep->flags |= DWC3_EP_BUSY; |
| 104 | dep->resource_index = dwc3_gadget_ep_get_transfer_index(dwc, |
| 105 | dep->number); |
| 106 | |
| 107 | dwc->ep0_next_event = DWC3_EP0_COMPLETE; |
| 108 | |
| 109 | return 0; |
| 110 | } |
| 111 | |
| 112 | static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep, |
| 113 | struct dwc3_request *req) |
| 114 | { |
| 115 | struct dwc3 *dwc = dep->dwc; |
| 116 | |
| 117 | req->request.actual = 0; |
| 118 | req->request.status = -EINPROGRESS; |
| 119 | req->epnum = dep->number; |
| 120 | |
| 121 | list_add_tail(&req->list, &dep->request_list); |
| 122 | |
| 123 | /* |
| 124 | * Gadget driver might not be quick enough to queue a request |
| 125 | * before we get a Transfer Not Ready event on this endpoint. |
| 126 | * |
| 127 | * In that case, we will set DWC3_EP_PENDING_REQUEST. When that |
| 128 | * flag is set, it's telling us that as soon as Gadget queues the |
| 129 | * required request, we should kick the transfer here because the |
| 130 | * IRQ we were waiting for is long gone. |
| 131 | */ |
| 132 | if (dep->flags & DWC3_EP_PENDING_REQUEST) { |
| 133 | unsigned direction; |
| 134 | |
| 135 | direction = !!(dep->flags & DWC3_EP0_DIR_IN); |
| 136 | |
| 137 | if (dwc->ep0state != EP0_DATA_PHASE) { |
| 138 | dev_WARN(dwc->dev, "Unexpected pending request\n"); |
| 139 | return 0; |
| 140 | } |
| 141 | |
| 142 | __dwc3_ep0_do_control_data(dwc, dwc->eps[direction], req); |
| 143 | |
| 144 | dep->flags &= ~(DWC3_EP_PENDING_REQUEST | |
| 145 | DWC3_EP0_DIR_IN); |
| 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | |
| 150 | /* |
| 151 | * In case gadget driver asked us to delay the STATUS phase, |
| 152 | * handle it here. |
| 153 | */ |
| 154 | if (dwc->delayed_status) { |
| 155 | unsigned direction; |
| 156 | |
| 157 | direction = !dwc->ep0_expect_in; |
| 158 | dwc->delayed_status = false; |
| 159 | usb_gadget_set_state(&dwc->gadget, USB_STATE_CONFIGURED); |
| 160 | |
| 161 | if (dwc->ep0state == EP0_STATUS_PHASE) |
| 162 | __dwc3_ep0_do_control_status(dwc, dwc->eps[direction]); |
| 163 | else |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 164 | dev_dbg(dwc->dev, "too early for delayed status"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 165 | |
| 166 | return 0; |
| 167 | } |
| 168 | |
| 169 | /* |
| 170 | * Unfortunately we have uncovered a limitation wrt the Data Phase. |
| 171 | * |
| 172 | * Section 9.4 says we can wait for the XferNotReady(DATA) event to |
| 173 | * come before issueing Start Transfer command, but if we do, we will |
| 174 | * miss situations where the host starts another SETUP phase instead of |
| 175 | * the DATA phase. Such cases happen at least on TD.7.6 of the Link |
| 176 | * Layer Compliance Suite. |
| 177 | * |
| 178 | * The problem surfaces due to the fact that in case of back-to-back |
| 179 | * SETUP packets there will be no XferNotReady(DATA) generated and we |
| 180 | * will be stuck waiting for XferNotReady(DATA) forever. |
| 181 | * |
| 182 | * By looking at tables 9-13 and 9-14 of the Databook, we can see that |
| 183 | * it tells us to start Data Phase right away. It also mentions that if |
| 184 | * we receive a SETUP phase instead of the DATA phase, core will issue |
| 185 | * XferComplete for the DATA phase, before actually initiating it in |
| 186 | * the wire, with the TRB's status set to "SETUP_PENDING". Such status |
| 187 | * can only be used to print some debugging logs, as the core expects |
| 188 | * us to go through to the STATUS phase and start a CONTROL_STATUS TRB, |
| 189 | * just so it completes right away, without transferring anything and, |
| 190 | * only then, we can go back to the SETUP phase. |
| 191 | * |
| 192 | * Because of this scenario, SNPS decided to change the programming |
| 193 | * model of control transfers and support on-demand transfers only for |
| 194 | * the STATUS phase. To fix the issue we have now, we will always wait |
| 195 | * for gadget driver to queue the DATA phase's struct usb_request, then |
| 196 | * start it right away. |
| 197 | * |
| 198 | * If we're actually in a 2-stage transfer, we will wait for |
| 199 | * XferNotReady(STATUS). |
| 200 | */ |
| 201 | if (dwc->three_stage_setup) { |
| 202 | unsigned direction; |
| 203 | |
| 204 | direction = dwc->ep0_expect_in; |
| 205 | dwc->ep0state = EP0_DATA_PHASE; |
| 206 | |
| 207 | __dwc3_ep0_do_control_data(dwc, dwc->eps[direction], req); |
| 208 | |
| 209 | dep->flags &= ~DWC3_EP0_DIR_IN; |
| 210 | } |
| 211 | |
| 212 | return 0; |
| 213 | } |
| 214 | |
| 215 | int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request, |
| 216 | gfp_t gfp_flags) |
| 217 | { |
| 218 | struct dwc3_request *req = to_dwc3_request(request); |
| 219 | struct dwc3_ep *dep = to_dwc3_ep(ep); |
| 220 | struct dwc3 *dwc = dep->dwc; |
| 221 | |
| 222 | unsigned long flags; |
| 223 | |
| 224 | int ret; |
| 225 | |
| 226 | spin_lock_irqsave(&dwc->lock, flags); |
| 227 | if (!dep->endpoint.desc) { |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 228 | dev_dbg(dwc->dev, "trying to queue request %p to disabled %s", |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 229 | request, dep->name); |
| 230 | ret = -ESHUTDOWN; |
| 231 | goto out; |
| 232 | } |
| 233 | |
| 234 | /* we share one TRB for ep0/1 */ |
| 235 | if (!list_empty(&dep->request_list)) { |
| 236 | ret = -EBUSY; |
| 237 | goto out; |
| 238 | } |
| 239 | |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 240 | dev_vdbg(dwc->dev, "queueing request %p to %s length %d state '%s'", |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 241 | request, dep->name, request->length, |
| 242 | dwc3_ep0_state_string(dwc->ep0state)); |
| 243 | |
| 244 | ret = __dwc3_gadget_ep0_queue(dep, req); |
| 245 | |
| 246 | out: |
| 247 | spin_unlock_irqrestore(&dwc->lock, flags); |
| 248 | |
| 249 | return ret; |
| 250 | } |
| 251 | |
| 252 | static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc) |
| 253 | { |
| 254 | struct dwc3_ep *dep; |
| 255 | |
| 256 | /* reinitialize physical ep1 */ |
| 257 | dep = dwc->eps[1]; |
| 258 | dep->flags = DWC3_EP_ENABLED; |
| 259 | |
| 260 | /* stall is always issued on EP0 */ |
| 261 | dep = dwc->eps[0]; |
| 262 | __dwc3_gadget_ep_set_halt(dep, 1, false); |
| 263 | dep->flags = DWC3_EP_ENABLED; |
| 264 | dwc->delayed_status = false; |
| 265 | |
| 266 | if (!list_empty(&dep->request_list)) { |
| 267 | struct dwc3_request *req; |
| 268 | |
| 269 | req = next_request(&dep->request_list); |
| 270 | dwc3_gadget_giveback(dep, req, -ECONNRESET); |
| 271 | } |
| 272 | |
| 273 | dwc->ep0state = EP0_SETUP_PHASE; |
| 274 | dwc3_ep0_out_start(dwc); |
| 275 | } |
| 276 | |
| 277 | int __dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value) |
| 278 | { |
| 279 | struct dwc3_ep *dep = to_dwc3_ep(ep); |
| 280 | struct dwc3 *dwc = dep->dwc; |
| 281 | |
| 282 | dwc3_ep0_stall_and_restart(dwc); |
| 283 | |
| 284 | return 0; |
| 285 | } |
| 286 | |
| 287 | int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value) |
| 288 | { |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 289 | unsigned long flags; |
| 290 | int ret; |
| 291 | |
| 292 | spin_lock_irqsave(&dwc->lock, flags); |
| 293 | ret = __dwc3_gadget_ep0_set_halt(ep, value); |
| 294 | spin_unlock_irqrestore(&dwc->lock, flags); |
| 295 | |
| 296 | return ret; |
| 297 | } |
| 298 | |
| 299 | void dwc3_ep0_out_start(struct dwc3 *dwc) |
| 300 | { |
| 301 | int ret; |
| 302 | |
| 303 | ret = dwc3_ep0_start_trans(dwc, 0, dwc->ctrl_req_addr, 8, |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 304 | DWC3_TRBCTL_CONTROL_SETUP, 0); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 305 | WARN_ON(ret < 0); |
| 306 | } |
| 307 | |
| 308 | static struct dwc3_ep *dwc3_wIndex_to_dep(struct dwc3 *dwc, __le16 wIndex_le) |
| 309 | { |
| 310 | struct dwc3_ep *dep; |
| 311 | u32 windex = le16_to_cpu(wIndex_le); |
| 312 | u32 epnum; |
| 313 | |
| 314 | epnum = (windex & USB_ENDPOINT_NUMBER_MASK) << 1; |
| 315 | if ((windex & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) |
| 316 | epnum |= 1; |
| 317 | |
| 318 | dep = dwc->eps[epnum]; |
| 319 | if (dep->flags & DWC3_EP_ENABLED) |
| 320 | return dep; |
| 321 | |
| 322 | return NULL; |
| 323 | } |
| 324 | |
| 325 | static void dwc3_ep0_status_cmpl(struct usb_ep *ep, struct usb_request *req) |
| 326 | { |
| 327 | } |
| 328 | /* |
| 329 | * ch 9.4.5 |
| 330 | */ |
| 331 | static int dwc3_ep0_handle_status(struct dwc3 *dwc, |
| 332 | struct usb_ctrlrequest *ctrl) |
| 333 | { |
| 334 | struct dwc3_ep *dep; |
| 335 | u32 recip; |
| 336 | u32 reg; |
| 337 | u16 usb_status = 0; |
| 338 | __le16 *response_pkt; |
| 339 | |
| 340 | recip = ctrl->bRequestType & USB_RECIP_MASK; |
| 341 | switch (recip) { |
| 342 | case USB_RECIP_DEVICE: |
| 343 | /* |
| 344 | * LTM will be set once we know how to set this in HW. |
| 345 | */ |
| 346 | usb_status |= dwc->is_selfpowered << USB_DEVICE_SELF_POWERED; |
| 347 | |
| 348 | if (dwc->speed == DWC3_DSTS_SUPERSPEED) { |
| 349 | reg = dwc3_readl(dwc->regs, DWC3_DCTL); |
| 350 | if (reg & DWC3_DCTL_INITU1ENA) |
| 351 | usb_status |= 1 << USB_DEV_STAT_U1_ENABLED; |
| 352 | if (reg & DWC3_DCTL_INITU2ENA) |
| 353 | usb_status |= 1 << USB_DEV_STAT_U2_ENABLED; |
| 354 | } |
| 355 | |
| 356 | break; |
| 357 | |
| 358 | case USB_RECIP_INTERFACE: |
| 359 | /* |
| 360 | * Function Remote Wake Capable D0 |
| 361 | * Function Remote Wakeup D1 |
| 362 | */ |
| 363 | break; |
| 364 | |
| 365 | case USB_RECIP_ENDPOINT: |
| 366 | dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex); |
| 367 | if (!dep) |
| 368 | return -EINVAL; |
| 369 | |
| 370 | if (dep->flags & DWC3_EP_STALL) |
| 371 | usb_status = 1 << USB_ENDPOINT_HALT; |
| 372 | break; |
| 373 | default: |
| 374 | return -EINVAL; |
| 375 | } |
| 376 | |
| 377 | response_pkt = (__le16 *) dwc->setup_buf; |
| 378 | *response_pkt = cpu_to_le16(usb_status); |
| 379 | |
| 380 | dep = dwc->eps[0]; |
| 381 | dwc->ep0_usb_req.dep = dep; |
| 382 | dwc->ep0_usb_req.request.length = sizeof(*response_pkt); |
| 383 | dwc->ep0_usb_req.request.buf = dwc->setup_buf; |
| 384 | dwc->ep0_usb_req.request.complete = dwc3_ep0_status_cmpl; |
| 385 | |
| 386 | return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req); |
| 387 | } |
| 388 | |
| 389 | static int dwc3_ep0_handle_feature(struct dwc3 *dwc, |
| 390 | struct usb_ctrlrequest *ctrl, int set) |
| 391 | { |
| 392 | struct dwc3_ep *dep; |
| 393 | u32 recip; |
| 394 | u32 wValue; |
| 395 | u32 wIndex; |
| 396 | u32 reg; |
| 397 | int ret; |
| 398 | enum usb_device_state state; |
| 399 | |
| 400 | wValue = le16_to_cpu(ctrl->wValue); |
| 401 | wIndex = le16_to_cpu(ctrl->wIndex); |
| 402 | recip = ctrl->bRequestType & USB_RECIP_MASK; |
| 403 | state = dwc->gadget.state; |
| 404 | |
| 405 | switch (recip) { |
| 406 | case USB_RECIP_DEVICE: |
| 407 | |
| 408 | switch (wValue) { |
| 409 | case USB_DEVICE_REMOTE_WAKEUP: |
| 410 | break; |
| 411 | /* |
| 412 | * 9.4.1 says only only for SS, in AddressState only for |
| 413 | * default control pipe |
| 414 | */ |
| 415 | case USB_DEVICE_U1_ENABLE: |
| 416 | if (state != USB_STATE_CONFIGURED) |
| 417 | return -EINVAL; |
| 418 | if (dwc->speed != DWC3_DSTS_SUPERSPEED) |
| 419 | return -EINVAL; |
| 420 | |
| 421 | reg = dwc3_readl(dwc->regs, DWC3_DCTL); |
| 422 | if (set) |
| 423 | reg |= DWC3_DCTL_INITU1ENA; |
| 424 | else |
| 425 | reg &= ~DWC3_DCTL_INITU1ENA; |
| 426 | dwc3_writel(dwc->regs, DWC3_DCTL, reg); |
| 427 | break; |
| 428 | |
| 429 | case USB_DEVICE_U2_ENABLE: |
| 430 | if (state != USB_STATE_CONFIGURED) |
| 431 | return -EINVAL; |
| 432 | if (dwc->speed != DWC3_DSTS_SUPERSPEED) |
| 433 | return -EINVAL; |
| 434 | |
| 435 | reg = dwc3_readl(dwc->regs, DWC3_DCTL); |
| 436 | if (set) |
| 437 | reg |= DWC3_DCTL_INITU2ENA; |
| 438 | else |
| 439 | reg &= ~DWC3_DCTL_INITU2ENA; |
| 440 | dwc3_writel(dwc->regs, DWC3_DCTL, reg); |
| 441 | break; |
| 442 | |
| 443 | case USB_DEVICE_LTM_ENABLE: |
| 444 | return -EINVAL; |
| 445 | |
| 446 | case USB_DEVICE_TEST_MODE: |
| 447 | if ((wIndex & 0xff) != 0) |
| 448 | return -EINVAL; |
| 449 | if (!set) |
| 450 | return -EINVAL; |
| 451 | |
| 452 | dwc->test_mode_nr = wIndex >> 8; |
| 453 | dwc->test_mode = true; |
| 454 | break; |
| 455 | default: |
| 456 | return -EINVAL; |
| 457 | } |
| 458 | break; |
| 459 | |
| 460 | case USB_RECIP_INTERFACE: |
| 461 | switch (wValue) { |
| 462 | case USB_INTRF_FUNC_SUSPEND: |
| 463 | if (wIndex & USB_INTRF_FUNC_SUSPEND_LP) |
| 464 | /* XXX enable Low power suspend */ |
| 465 | ; |
| 466 | if (wIndex & USB_INTRF_FUNC_SUSPEND_RW) |
| 467 | /* XXX enable remote wakeup */ |
| 468 | ; |
| 469 | break; |
| 470 | default: |
| 471 | return -EINVAL; |
| 472 | } |
| 473 | break; |
| 474 | |
| 475 | case USB_RECIP_ENDPOINT: |
| 476 | switch (wValue) { |
| 477 | case USB_ENDPOINT_HALT: |
| 478 | dep = dwc3_wIndex_to_dep(dwc, wIndex); |
| 479 | if (!dep) |
| 480 | return -EINVAL; |
| 481 | if (set == 0 && (dep->flags & DWC3_EP_WEDGE)) |
| 482 | break; |
| 483 | ret = __dwc3_gadget_ep_set_halt(dep, set, true); |
| 484 | if (ret) |
| 485 | return -EINVAL; |
| 486 | break; |
| 487 | default: |
| 488 | return -EINVAL; |
| 489 | } |
| 490 | break; |
| 491 | |
| 492 | default: |
| 493 | return -EINVAL; |
| 494 | } |
| 495 | |
| 496 | return 0; |
| 497 | } |
| 498 | |
| 499 | static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) |
| 500 | { |
| 501 | enum usb_device_state state = dwc->gadget.state; |
| 502 | u32 addr; |
| 503 | u32 reg; |
| 504 | |
| 505 | addr = le16_to_cpu(ctrl->wValue); |
| 506 | if (addr > 127) { |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 507 | dev_dbg(dwc->dev, "invalid device address %d", addr); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 508 | return -EINVAL; |
| 509 | } |
| 510 | |
| 511 | if (state == USB_STATE_CONFIGURED) { |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 512 | dev_dbg(dwc->dev, "trying to set address when configured"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 513 | return -EINVAL; |
| 514 | } |
| 515 | |
| 516 | reg = dwc3_readl(dwc->regs, DWC3_DCFG); |
| 517 | reg &= ~(DWC3_DCFG_DEVADDR_MASK); |
| 518 | reg |= DWC3_DCFG_DEVADDR(addr); |
| 519 | dwc3_writel(dwc->regs, DWC3_DCFG, reg); |
| 520 | |
| 521 | if (addr) |
| 522 | usb_gadget_set_state(&dwc->gadget, USB_STATE_ADDRESS); |
| 523 | else |
| 524 | usb_gadget_set_state(&dwc->gadget, USB_STATE_DEFAULT); |
| 525 | |
| 526 | return 0; |
| 527 | } |
| 528 | |
| 529 | static int dwc3_ep0_delegate_req(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) |
| 530 | { |
| 531 | int ret; |
| 532 | |
| 533 | spin_unlock(&dwc->lock); |
| 534 | ret = dwc->gadget_driver->setup(&dwc->gadget, ctrl); |
| 535 | spin_lock(&dwc->lock); |
| 536 | return ret; |
| 537 | } |
| 538 | |
| 539 | static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) |
| 540 | { |
| 541 | enum usb_device_state state = dwc->gadget.state; |
| 542 | u32 cfg; |
| 543 | int ret; |
| 544 | u32 reg; |
| 545 | |
| 546 | dwc->start_config_issued = false; |
| 547 | cfg = le16_to_cpu(ctrl->wValue); |
| 548 | |
| 549 | switch (state) { |
| 550 | case USB_STATE_DEFAULT: |
| 551 | return -EINVAL; |
| 552 | |
| 553 | case USB_STATE_ADDRESS: |
| 554 | ret = dwc3_ep0_delegate_req(dwc, ctrl); |
| 555 | /* if the cfg matches and the cfg is non zero */ |
| 556 | if (cfg && (!ret || (ret == USB_GADGET_DELAYED_STATUS))) { |
| 557 | |
| 558 | /* |
| 559 | * only change state if set_config has already |
| 560 | * been processed. If gadget driver returns |
| 561 | * USB_GADGET_DELAYED_STATUS, we will wait |
| 562 | * to change the state on the next usb_ep_queue() |
| 563 | */ |
| 564 | if (ret == 0) |
| 565 | usb_gadget_set_state(&dwc->gadget, |
| 566 | USB_STATE_CONFIGURED); |
| 567 | |
| 568 | /* |
| 569 | * Enable transition to U1/U2 state when |
| 570 | * nothing is pending from application. |
| 571 | */ |
| 572 | reg = dwc3_readl(dwc->regs, DWC3_DCTL); |
| 573 | reg |= (DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA); |
| 574 | dwc3_writel(dwc->regs, DWC3_DCTL, reg); |
| 575 | |
| 576 | dwc->resize_fifos = true; |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 577 | dev_dbg(dwc->dev, "resize FIFOs flag SET"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 578 | } |
| 579 | break; |
| 580 | |
| 581 | case USB_STATE_CONFIGURED: |
| 582 | ret = dwc3_ep0_delegate_req(dwc, ctrl); |
| 583 | if (!cfg && !ret) |
| 584 | usb_gadget_set_state(&dwc->gadget, |
| 585 | USB_STATE_ADDRESS); |
| 586 | break; |
| 587 | default: |
| 588 | ret = -EINVAL; |
| 589 | } |
| 590 | return ret; |
| 591 | } |
| 592 | |
| 593 | static void dwc3_ep0_set_sel_cmpl(struct usb_ep *ep, struct usb_request *req) |
| 594 | { |
| 595 | struct dwc3_ep *dep = to_dwc3_ep(ep); |
| 596 | struct dwc3 *dwc = dep->dwc; |
| 597 | |
| 598 | u32 param = 0; |
| 599 | u32 reg; |
| 600 | |
| 601 | struct timing { |
| 602 | u8 u1sel; |
| 603 | u8 u1pel; |
| 604 | u16 u2sel; |
| 605 | u16 u2pel; |
| 606 | } __packed timing; |
| 607 | |
| 608 | int ret; |
| 609 | |
| 610 | memcpy(&timing, req->buf, sizeof(timing)); |
| 611 | |
| 612 | dwc->u1sel = timing.u1sel; |
| 613 | dwc->u1pel = timing.u1pel; |
| 614 | dwc->u2sel = le16_to_cpu(timing.u2sel); |
| 615 | dwc->u2pel = le16_to_cpu(timing.u2pel); |
| 616 | |
| 617 | reg = dwc3_readl(dwc->regs, DWC3_DCTL); |
| 618 | if (reg & DWC3_DCTL_INITU2ENA) |
| 619 | param = dwc->u2pel; |
| 620 | if (reg & DWC3_DCTL_INITU1ENA) |
| 621 | param = dwc->u1pel; |
| 622 | |
| 623 | /* |
| 624 | * According to Synopsys Databook, if parameter is |
| 625 | * greater than 125, a value of zero should be |
| 626 | * programmed in the register. |
| 627 | */ |
| 628 | if (param > 125) |
| 629 | param = 0; |
| 630 | |
| 631 | /* now that we have the time, issue DGCMD Set Sel */ |
| 632 | ret = dwc3_send_gadget_generic_command(dwc, |
| 633 | DWC3_DGCMD_SET_PERIODIC_PAR, param); |
| 634 | WARN_ON(ret < 0); |
| 635 | } |
| 636 | |
| 637 | static int dwc3_ep0_set_sel(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) |
| 638 | { |
| 639 | struct dwc3_ep *dep; |
| 640 | enum usb_device_state state = dwc->gadget.state; |
| 641 | u16 wLength; |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 642 | |
| 643 | if (state == USB_STATE_DEFAULT) |
| 644 | return -EINVAL; |
| 645 | |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 646 | wLength = le16_to_cpu(ctrl->wLength); |
| 647 | |
| 648 | if (wLength != 6) { |
| 649 | dev_err(dwc->dev, "Set SEL should be 6 bytes, got %d\n", |
| 650 | wLength); |
| 651 | return -EINVAL; |
| 652 | } |
| 653 | |
| 654 | /* |
| 655 | * To handle Set SEL we need to receive 6 bytes from Host. So let's |
| 656 | * queue a usb_request for 6 bytes. |
| 657 | * |
| 658 | * Remember, though, this controller can't handle non-wMaxPacketSize |
| 659 | * aligned transfers on the OUT direction, so we queue a request for |
| 660 | * wMaxPacketSize instead. |
| 661 | */ |
| 662 | dep = dwc->eps[0]; |
| 663 | dwc->ep0_usb_req.dep = dep; |
| 664 | dwc->ep0_usb_req.request.length = dep->endpoint.maxpacket; |
| 665 | dwc->ep0_usb_req.request.buf = dwc->setup_buf; |
| 666 | dwc->ep0_usb_req.request.complete = dwc3_ep0_set_sel_cmpl; |
| 667 | |
| 668 | return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req); |
| 669 | } |
| 670 | |
| 671 | static int dwc3_ep0_set_isoch_delay(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) |
| 672 | { |
| 673 | u16 wLength; |
| 674 | u16 wValue; |
| 675 | u16 wIndex; |
| 676 | |
| 677 | wValue = le16_to_cpu(ctrl->wValue); |
| 678 | wLength = le16_to_cpu(ctrl->wLength); |
| 679 | wIndex = le16_to_cpu(ctrl->wIndex); |
| 680 | |
| 681 | if (wIndex || wLength) |
| 682 | return -EINVAL; |
| 683 | |
| 684 | /* |
| 685 | * REVISIT It's unclear from Databook what to do with this |
| 686 | * value. For now, just cache it. |
| 687 | */ |
| 688 | dwc->isoch_delay = wValue; |
| 689 | |
| 690 | return 0; |
| 691 | } |
| 692 | |
| 693 | static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) |
| 694 | { |
| 695 | int ret; |
| 696 | |
| 697 | switch (ctrl->bRequest) { |
| 698 | case USB_REQ_GET_STATUS: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 699 | dev_vdbg(dwc->dev, "USB_REQ_GET_STATUS"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 700 | ret = dwc3_ep0_handle_status(dwc, ctrl); |
| 701 | break; |
| 702 | case USB_REQ_CLEAR_FEATURE: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 703 | dev_vdbg(dwc->dev, "USB_REQ_CLEAR_FEATURE"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 704 | ret = dwc3_ep0_handle_feature(dwc, ctrl, 0); |
| 705 | break; |
| 706 | case USB_REQ_SET_FEATURE: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 707 | dev_vdbg(dwc->dev, "USB_REQ_SET_FEATURE"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 708 | ret = dwc3_ep0_handle_feature(dwc, ctrl, 1); |
| 709 | break; |
| 710 | case USB_REQ_SET_ADDRESS: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 711 | dev_vdbg(dwc->dev, "USB_REQ_SET_ADDRESS"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 712 | ret = dwc3_ep0_set_address(dwc, ctrl); |
| 713 | break; |
| 714 | case USB_REQ_SET_CONFIGURATION: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 715 | dev_vdbg(dwc->dev, "USB_REQ_SET_CONFIGURATION"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 716 | ret = dwc3_ep0_set_config(dwc, ctrl); |
| 717 | break; |
| 718 | case USB_REQ_SET_SEL: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 719 | dev_vdbg(dwc->dev, "USB_REQ_SET_SEL"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 720 | ret = dwc3_ep0_set_sel(dwc, ctrl); |
| 721 | break; |
| 722 | case USB_REQ_SET_ISOCH_DELAY: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 723 | dev_vdbg(dwc->dev, "USB_REQ_SET_ISOCH_DELAY"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 724 | ret = dwc3_ep0_set_isoch_delay(dwc, ctrl); |
| 725 | break; |
| 726 | default: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 727 | dev_vdbg(dwc->dev, "Forwarding to gadget driver"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 728 | ret = dwc3_ep0_delegate_req(dwc, ctrl); |
| 729 | break; |
| 730 | } |
| 731 | |
| 732 | return ret; |
| 733 | } |
| 734 | |
| 735 | static void dwc3_ep0_inspect_setup(struct dwc3 *dwc, |
| 736 | const struct dwc3_event_depevt *event) |
| 737 | { |
| 738 | struct usb_ctrlrequest *ctrl = dwc->ctrl_req; |
| 739 | int ret = -EINVAL; |
| 740 | u32 len; |
| 741 | |
| 742 | if (!dwc->gadget_driver) |
| 743 | goto out; |
| 744 | |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 745 | len = le16_to_cpu(ctrl->wLength); |
| 746 | if (!len) { |
| 747 | dwc->three_stage_setup = false; |
| 748 | dwc->ep0_expect_in = false; |
| 749 | dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS; |
| 750 | } else { |
| 751 | dwc->three_stage_setup = true; |
| 752 | dwc->ep0_expect_in = !!(ctrl->bRequestType & USB_DIR_IN); |
| 753 | dwc->ep0_next_event = DWC3_EP0_NRDY_DATA; |
| 754 | } |
| 755 | |
| 756 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) |
| 757 | ret = dwc3_ep0_std_request(dwc, ctrl); |
| 758 | else |
| 759 | ret = dwc3_ep0_delegate_req(dwc, ctrl); |
| 760 | |
| 761 | if (ret == USB_GADGET_DELAYED_STATUS) |
| 762 | dwc->delayed_status = true; |
| 763 | |
| 764 | out: |
| 765 | if (ret < 0) |
| 766 | dwc3_ep0_stall_and_restart(dwc); |
| 767 | } |
| 768 | |
| 769 | static void dwc3_ep0_complete_data(struct dwc3 *dwc, |
| 770 | const struct dwc3_event_depevt *event) |
| 771 | { |
| 772 | struct dwc3_request *r = NULL; |
| 773 | struct usb_request *ur; |
| 774 | struct dwc3_trb *trb; |
| 775 | struct dwc3_ep *ep0; |
Kishon Vijay Abraham I | e1d80c9 | 2015-02-23 18:40:14 +0530 | [diff] [blame] | 776 | unsigned transfer_size = 0; |
| 777 | unsigned maxp; |
| 778 | void *buf; |
| 779 | u32 transferred = 0; |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 780 | u32 status; |
| 781 | u32 length; |
| 782 | u8 epnum; |
| 783 | |
| 784 | epnum = event->endpoint_number; |
| 785 | ep0 = dwc->eps[0]; |
| 786 | |
| 787 | dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS; |
| 788 | |
| 789 | trb = dwc->ep0_trb; |
| 790 | |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 791 | r = next_request(&ep0->request_list); |
| 792 | if (!r) |
| 793 | return; |
| 794 | |
Philipp Tomsich | ed12167 | 2017-04-06 16:58:52 +0200 | [diff] [blame] | 795 | dwc3_flush_cache((uintptr_t)trb, sizeof(*trb)); |
Kishon Vijay Abraham I | c7bdfe3 | 2015-02-23 18:40:13 +0530 | [diff] [blame] | 796 | |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 797 | status = DWC3_TRB_SIZE_TRBSTS(trb->size); |
| 798 | if (status == DWC3_TRBSTS_SETUP_PENDING) { |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 799 | dev_dbg(dwc->dev, "Setup Pending received"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 800 | |
| 801 | if (r) |
| 802 | dwc3_gadget_giveback(ep0, r, -ECONNRESET); |
| 803 | |
| 804 | return; |
| 805 | } |
| 806 | |
| 807 | ur = &r->request; |
Kishon Vijay Abraham I | e1d80c9 | 2015-02-23 18:40:14 +0530 | [diff] [blame] | 808 | buf = ur->buf; |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 809 | |
| 810 | length = trb->size & DWC3_TRB_SIZE_MASK; |
| 811 | |
Kishon Vijay Abraham I | e1d80c9 | 2015-02-23 18:40:14 +0530 | [diff] [blame] | 812 | maxp = ep0->endpoint.maxpacket; |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 813 | |
Kishon Vijay Abraham I | e1d80c9 | 2015-02-23 18:40:14 +0530 | [diff] [blame] | 814 | if (dwc->ep0_bounced) { |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 815 | /* |
| 816 | * Handle the first TRB before handling the bounce buffer if |
| 817 | * the request length is greater than the bounce buffer size. |
| 818 | */ |
| 819 | if (ur->length > DWC3_EP0_BOUNCE_SIZE) { |
| 820 | transfer_size = (ur->length / maxp) * maxp; |
| 821 | transferred = transfer_size - length; |
| 822 | buf = (u8 *)buf + transferred; |
| 823 | ur->actual += transferred; |
| 824 | |
| 825 | trb++; |
Philipp Tomsich | ed12167 | 2017-04-06 16:58:52 +0200 | [diff] [blame] | 826 | dwc3_flush_cache((uintptr_t)trb, sizeof(*trb)); |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 827 | length = trb->size & DWC3_TRB_SIZE_MASK; |
| 828 | |
| 829 | ep0->free_slot = 0; |
| 830 | } |
| 831 | |
Kishon Vijay Abraham I | e1d80c9 | 2015-02-23 18:40:14 +0530 | [diff] [blame] | 832 | transfer_size = roundup((ur->length - transfer_size), |
| 833 | maxp); |
| 834 | transferred = min_t(u32, ur->length - transferred, |
| 835 | transfer_size - length); |
Philipp Tomsich | ed12167 | 2017-04-06 16:58:52 +0200 | [diff] [blame] | 836 | dwc3_flush_cache((uintptr_t)dwc->ep0_bounce, DWC3_EP0_BOUNCE_SIZE); |
Kishon Vijay Abraham I | e1d80c9 | 2015-02-23 18:40:14 +0530 | [diff] [blame] | 837 | memcpy(buf, dwc->ep0_bounce, transferred); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 838 | } else { |
| 839 | transferred = ur->length - length; |
| 840 | } |
| 841 | |
| 842 | ur->actual += transferred; |
| 843 | |
| 844 | if ((epnum & 1) && ur->actual < ur->length) { |
| 845 | /* for some reason we did not get everything out */ |
| 846 | |
| 847 | dwc3_ep0_stall_and_restart(dwc); |
| 848 | } else { |
| 849 | dwc3_gadget_giveback(ep0, r, 0); |
| 850 | |
| 851 | if (IS_ALIGNED(ur->length, ep0->endpoint.maxpacket) && |
| 852 | ur->length && ur->zero) { |
| 853 | int ret; |
| 854 | |
| 855 | dwc->ep0_next_event = DWC3_EP0_COMPLETE; |
| 856 | |
| 857 | ret = dwc3_ep0_start_trans(dwc, epnum, |
| 858 | dwc->ctrl_req_addr, 0, |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 859 | DWC3_TRBCTL_CONTROL_DATA, 0); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 860 | WARN_ON(ret < 0); |
| 861 | } |
| 862 | } |
| 863 | } |
| 864 | |
| 865 | static void dwc3_ep0_complete_status(struct dwc3 *dwc, |
| 866 | const struct dwc3_event_depevt *event) |
| 867 | { |
| 868 | struct dwc3_request *r; |
| 869 | struct dwc3_ep *dep; |
| 870 | struct dwc3_trb *trb; |
| 871 | u32 status; |
| 872 | |
| 873 | dep = dwc->eps[0]; |
| 874 | trb = dwc->ep0_trb; |
| 875 | |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 876 | if (!list_empty(&dep->request_list)) { |
| 877 | r = next_request(&dep->request_list); |
| 878 | |
| 879 | dwc3_gadget_giveback(dep, r, 0); |
| 880 | } |
| 881 | |
| 882 | if (dwc->test_mode) { |
| 883 | int ret; |
| 884 | |
| 885 | ret = dwc3_gadget_set_test_mode(dwc, dwc->test_mode_nr); |
| 886 | if (ret < 0) { |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 887 | dev_dbg(dwc->dev, "Invalid Test #%d", |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 888 | dwc->test_mode_nr); |
| 889 | dwc3_ep0_stall_and_restart(dwc); |
| 890 | return; |
| 891 | } |
| 892 | } |
| 893 | |
| 894 | status = DWC3_TRB_SIZE_TRBSTS(trb->size); |
| 895 | if (status == DWC3_TRBSTS_SETUP_PENDING) |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 896 | dev_dbg(dwc->dev, "Setup Pending received"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 897 | |
| 898 | dwc->ep0state = EP0_SETUP_PHASE; |
| 899 | dwc3_ep0_out_start(dwc); |
| 900 | } |
| 901 | |
| 902 | static void dwc3_ep0_xfer_complete(struct dwc3 *dwc, |
| 903 | const struct dwc3_event_depevt *event) |
| 904 | { |
| 905 | struct dwc3_ep *dep = dwc->eps[event->endpoint_number]; |
| 906 | |
| 907 | dep->flags &= ~DWC3_EP_BUSY; |
| 908 | dep->resource_index = 0; |
| 909 | dwc->setup_packet_pending = false; |
| 910 | |
| 911 | switch (dwc->ep0state) { |
| 912 | case EP0_SETUP_PHASE: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 913 | dev_vdbg(dwc->dev, "Setup Phase"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 914 | dwc3_ep0_inspect_setup(dwc, event); |
| 915 | break; |
| 916 | |
| 917 | case EP0_DATA_PHASE: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 918 | dev_vdbg(dwc->dev, "Data Phase"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 919 | dwc3_ep0_complete_data(dwc, event); |
| 920 | break; |
| 921 | |
| 922 | case EP0_STATUS_PHASE: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 923 | dev_vdbg(dwc->dev, "Status Phase"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 924 | dwc3_ep0_complete_status(dwc, event); |
| 925 | break; |
| 926 | default: |
| 927 | WARN(true, "UNKNOWN ep0state %d\n", dwc->ep0state); |
| 928 | } |
| 929 | } |
| 930 | |
| 931 | static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, |
| 932 | struct dwc3_ep *dep, struct dwc3_request *req) |
| 933 | { |
| 934 | int ret; |
| 935 | |
| 936 | req->direction = !!dep->number; |
| 937 | |
| 938 | if (req->request.length == 0) { |
| 939 | ret = dwc3_ep0_start_trans(dwc, dep->number, |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 940 | dwc->ctrl_req_addr, 0, |
| 941 | DWC3_TRBCTL_CONTROL_DATA, 0); |
| 942 | } else if (!IS_ALIGNED(req->request.length, dep->endpoint.maxpacket) && |
| 943 | (dep->number == 0)) { |
| 944 | u32 transfer_size = 0; |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 945 | u32 maxpacket; |
| 946 | |
| 947 | ret = usb_gadget_map_request(&dwc->gadget, &req->request, |
| 948 | dep->number); |
| 949 | if (ret) { |
| 950 | dev_dbg(dwc->dev, "failed to map request\n"); |
| 951 | return; |
| 952 | } |
| 953 | |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 954 | maxpacket = dep->endpoint.maxpacket; |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 955 | if (req->request.length > DWC3_EP0_BOUNCE_SIZE) { |
| 956 | transfer_size = (req->request.length / maxpacket) * |
| 957 | maxpacket; |
| 958 | ret = dwc3_ep0_start_trans(dwc, dep->number, |
| 959 | req->request.dma, |
| 960 | transfer_size, |
| 961 | DWC3_TRBCTL_CONTROL_DATA, 1); |
| 962 | } |
| 963 | |
| 964 | transfer_size = roundup((req->request.length - transfer_size), |
| 965 | maxpacket); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 966 | |
| 967 | dwc->ep0_bounced = true; |
| 968 | |
| 969 | /* |
| 970 | * REVISIT in case request length is bigger than |
| 971 | * DWC3_EP0_BOUNCE_SIZE we will need two chained |
| 972 | * TRBs to handle the transfer. |
| 973 | */ |
| 974 | ret = dwc3_ep0_start_trans(dwc, dep->number, |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 975 | dwc->ep0_bounce_addr, transfer_size, |
| 976 | DWC3_TRBCTL_CONTROL_DATA, 0); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 977 | } else { |
| 978 | ret = usb_gadget_map_request(&dwc->gadget, &req->request, |
| 979 | dep->number); |
| 980 | if (ret) { |
| 981 | dev_dbg(dwc->dev, "failed to map request\n"); |
| 982 | return; |
| 983 | } |
| 984 | |
| 985 | ret = dwc3_ep0_start_trans(dwc, dep->number, req->request.dma, |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 986 | req->request.length, |
| 987 | DWC3_TRBCTL_CONTROL_DATA, 0); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 988 | } |
| 989 | |
| 990 | WARN_ON(ret < 0); |
| 991 | } |
| 992 | |
| 993 | static int dwc3_ep0_start_control_status(struct dwc3_ep *dep) |
| 994 | { |
| 995 | struct dwc3 *dwc = dep->dwc; |
| 996 | u32 type; |
| 997 | |
| 998 | type = dwc->three_stage_setup ? DWC3_TRBCTL_CONTROL_STATUS3 |
| 999 | : DWC3_TRBCTL_CONTROL_STATUS2; |
| 1000 | |
| 1001 | return dwc3_ep0_start_trans(dwc, dep->number, |
Kishon Vijay Abraham I | f18ed9a | 2015-02-23 18:40:15 +0530 | [diff] [blame] | 1002 | dwc->ctrl_req_addr, 0, type, 0); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 1003 | } |
| 1004 | |
| 1005 | static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep) |
| 1006 | { |
| 1007 | if (dwc->resize_fifos) { |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 1008 | dev_dbg(dwc->dev, "Resizing FIFOs"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 1009 | dwc3_gadget_resize_tx_fifos(dwc); |
| 1010 | dwc->resize_fifos = 0; |
| 1011 | } |
| 1012 | |
| 1013 | WARN_ON(dwc3_ep0_start_control_status(dep)); |
| 1014 | } |
| 1015 | |
| 1016 | static void dwc3_ep0_do_control_status(struct dwc3 *dwc, |
| 1017 | const struct dwc3_event_depevt *event) |
| 1018 | { |
| 1019 | struct dwc3_ep *dep = dwc->eps[event->endpoint_number]; |
| 1020 | |
| 1021 | __dwc3_ep0_do_control_status(dwc, dep); |
| 1022 | } |
| 1023 | |
| 1024 | static void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep) |
| 1025 | { |
| 1026 | struct dwc3_gadget_ep_cmd_params params; |
| 1027 | u32 cmd; |
| 1028 | int ret; |
| 1029 | |
| 1030 | if (!dep->resource_index) |
| 1031 | return; |
| 1032 | |
| 1033 | cmd = DWC3_DEPCMD_ENDTRANSFER; |
| 1034 | cmd |= DWC3_DEPCMD_CMDIOC; |
| 1035 | cmd |= DWC3_DEPCMD_PARAM(dep->resource_index); |
| 1036 | memset(¶ms, 0, sizeof(params)); |
| 1037 | ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, ¶ms); |
| 1038 | WARN_ON_ONCE(ret); |
| 1039 | dep->resource_index = 0; |
| 1040 | } |
| 1041 | |
| 1042 | static void dwc3_ep0_xfernotready(struct dwc3 *dwc, |
| 1043 | const struct dwc3_event_depevt *event) |
| 1044 | { |
| 1045 | dwc->setup_packet_pending = true; |
| 1046 | |
| 1047 | switch (event->status) { |
| 1048 | case DEPEVT_STATUS_CONTROL_DATA: |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 1049 | dev_vdbg(dwc->dev, "Control Data"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 1050 | |
| 1051 | /* |
| 1052 | * We already have a DATA transfer in the controller's cache, |
| 1053 | * if we receive a XferNotReady(DATA) we will ignore it, unless |
| 1054 | * it's for the wrong direction. |
| 1055 | * |
| 1056 | * In that case, we must issue END_TRANSFER command to the Data |
| 1057 | * Phase we already have started and issue SetStall on the |
| 1058 | * control endpoint. |
| 1059 | */ |
| 1060 | if (dwc->ep0_expect_in != event->endpoint_number) { |
| 1061 | struct dwc3_ep *dep = dwc->eps[dwc->ep0_expect_in]; |
| 1062 | |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 1063 | dev_vdbg(dwc->dev, "Wrong direction for Data phase"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 1064 | dwc3_ep0_end_control_data(dwc, dep); |
| 1065 | dwc3_ep0_stall_and_restart(dwc); |
| 1066 | return; |
| 1067 | } |
| 1068 | |
| 1069 | break; |
| 1070 | |
| 1071 | case DEPEVT_STATUS_CONTROL_STATUS: |
| 1072 | if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) |
| 1073 | return; |
| 1074 | |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 1075 | dev_vdbg(dwc->dev, "Control Status"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 1076 | |
| 1077 | dwc->ep0state = EP0_STATUS_PHASE; |
| 1078 | |
| 1079 | if (dwc->delayed_status) { |
| 1080 | WARN_ON_ONCE(event->endpoint_number != 1); |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 1081 | dev_vdbg(dwc->dev, "Delayed Status"); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 1082 | return; |
| 1083 | } |
| 1084 | |
| 1085 | dwc3_ep0_do_control_status(dwc, event); |
| 1086 | } |
| 1087 | } |
| 1088 | |
| 1089 | void dwc3_ep0_interrupt(struct dwc3 *dwc, |
| 1090 | const struct dwc3_event_depevt *event) |
| 1091 | { |
| 1092 | u8 epnum = event->endpoint_number; |
| 1093 | |
Kishon Vijay Abraham I | 389f6d4 | 2015-02-23 18:39:53 +0530 | [diff] [blame] | 1094 | dev_dbg(dwc->dev, "%s while ep%d%s in state '%s'", |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 1095 | dwc3_ep_event_string(event->endpoint_event), |
| 1096 | epnum >> 1, (epnum & 1) ? "in" : "out", |
| 1097 | dwc3_ep0_state_string(dwc->ep0state)); |
| 1098 | |
| 1099 | switch (event->endpoint_event) { |
| 1100 | case DWC3_DEPEVT_XFERCOMPLETE: |
| 1101 | dwc3_ep0_xfer_complete(dwc, event); |
| 1102 | break; |
| 1103 | |
| 1104 | case DWC3_DEPEVT_XFERNOTREADY: |
| 1105 | dwc3_ep0_xfernotready(dwc, event); |
| 1106 | break; |
| 1107 | |
| 1108 | case DWC3_DEPEVT_XFERINPROGRESS: |
| 1109 | case DWC3_DEPEVT_RXTXFIFOEVT: |
| 1110 | case DWC3_DEPEVT_STREAMEVT: |
| 1111 | case DWC3_DEPEVT_EPCMDCMPLT: |
| 1112 | break; |
| 1113 | } |
| 1114 | } |