wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1 | /* |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 2 | * (C) Copyright 2009 |
| 3 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. |
| 4 | * Changes for multibus/multiadapter I2C support. |
| 5 | * |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 6 | * (C) Copyright 2001, 2002 |
| 7 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 8 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 9 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 10 | * |
| 11 | * This has been changed substantially by Gerald Van Baren, Custom IDEAS, |
| 12 | * vanbaren@cideas.com. It was heavily influenced by LiMon, written by |
| 13 | * Neil Russell. |
Simon Glass | cb052ff | 2016-11-23 06:34:44 -0700 | [diff] [blame] | 14 | * |
| 15 | * NOTE: This driver should be converted to driver model before June 2017. |
| 16 | * Please see doc/driver-model/i2c-howto.txt for instructions. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 17 | */ |
| 18 | |
| 19 | #include <common.h> |
Andy Shevchenko | 8cb5cdd | 2017-07-05 16:25:22 +0300 | [diff] [blame] | 20 | #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */ |
| 21 | #include <ioports.h> |
| 22 | #include <asm/io.h> |
Andreas Bießmann | 1f5e8b1 | 2011-02-10 00:30:04 +0000 | [diff] [blame] | 23 | #endif |
Ryan Mallon | 78d6691 | 2011-01-27 08:54:15 +1300 | [diff] [blame] | 24 | #if defined(CONFIG_AT91FAMILY) |
wdenk | 20dd2fa | 2004-11-21 00:06:33 +0000 | [diff] [blame] | 25 | #include <asm/io.h> |
| 26 | #include <asm/arch/hardware.h> |
Jens Scharsig | a4db1ca | 2010-02-03 22:46:58 +0100 | [diff] [blame] | 27 | #include <asm/arch/at91_pio.h> |
Andreas Bießmann | a864979 | 2013-10-30 15:18:18 +0100 | [diff] [blame] | 28 | #ifdef CONFIG_ATMEL_LEGACY |
Daniel Gorsulowski | 5a2d884 | 2009-05-18 13:20:54 +0200 | [diff] [blame] | 29 | #include <asm/arch/gpio.h> |
Jens Scharsig | a4db1ca | 2010-02-03 22:46:58 +0100 | [diff] [blame] | 30 | #endif |
Daniel Gorsulowski | 5a2d884 | 2009-05-18 13:20:54 +0200 | [diff] [blame] | 31 | #endif |
Christophe Leroy | 23da373 | 2017-07-06 10:33:21 +0200 | [diff] [blame] | 32 | #if defined(CONFIG_8xx) |
Heiko Schocher | 7f3afd6 | 2008-10-17 13:52:51 +0200 | [diff] [blame] | 33 | #include <asm/io.h> |
| 34 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 35 | #include <i2c.h> |
| 36 | |
Mike Frysinger | ee12d54 | 2010-07-21 13:38:02 -0400 | [diff] [blame] | 37 | #if defined(CONFIG_SOFT_I2C_GPIO_SCL) |
| 38 | # include <asm/gpio.h> |
| 39 | |
| 40 | # ifndef I2C_GPIO_SYNC |
| 41 | # define I2C_GPIO_SYNC |
| 42 | # endif |
| 43 | |
| 44 | # ifndef I2C_INIT |
| 45 | # define I2C_INIT \ |
| 46 | do { \ |
| 47 | gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \ |
| 48 | gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \ |
| 49 | } while (0) |
| 50 | # endif |
| 51 | |
| 52 | # ifndef I2C_ACTIVE |
| 53 | # define I2C_ACTIVE do { } while (0) |
| 54 | # endif |
| 55 | |
| 56 | # ifndef I2C_TRISTATE |
| 57 | # define I2C_TRISTATE do { } while (0) |
| 58 | # endif |
| 59 | |
| 60 | # ifndef I2C_READ |
| 61 | # define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA) |
| 62 | # endif |
| 63 | |
| 64 | # ifndef I2C_SDA |
| 65 | # define I2C_SDA(bit) \ |
| 66 | do { \ |
| 67 | if (bit) \ |
| 68 | gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \ |
| 69 | else \ |
| 70 | gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \ |
| 71 | I2C_GPIO_SYNC; \ |
| 72 | } while (0) |
| 73 | # endif |
| 74 | |
| 75 | # ifndef I2C_SCL |
| 76 | # define I2C_SCL(bit) \ |
| 77 | do { \ |
| 78 | gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \ |
| 79 | I2C_GPIO_SYNC; \ |
| 80 | } while (0) |
| 81 | # endif |
| 82 | |
| 83 | # ifndef I2C_DELAY |
| 84 | # define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ |
| 85 | # endif |
| 86 | |
| 87 | #endif |
| 88 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 89 | /* #define DEBUG_I2C */ |
| 90 | |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 91 | DECLARE_GLOBAL_DATA_PTR; |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 92 | |
| 93 | #ifndef I2C_SOFT_DECLARATIONS |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 94 | # define I2C_SOFT_DECLARATIONS |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 95 | #endif |
| 96 | |
Marek Vasut | a3c41ba | 2013-08-01 12:32:20 +0200 | [diff] [blame] | 97 | #if !defined(CONFIG_SYS_I2C_SOFT_SPEED) |
| 98 | #define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 99 | #endif |
Marek Vasut | a3c41ba | 2013-08-01 12:32:20 +0200 | [diff] [blame] | 100 | #if !defined(CONFIG_SYS_I2C_SOFT_SLAVE) |
| 101 | #define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 102 | #endif |
| 103 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 104 | /*----------------------------------------------------------------------- |
| 105 | * Definitions |
| 106 | */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 107 | #define RETRIES 0 |
| 108 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 109 | #define I2C_ACK 0 /* PD_SDA level to ack a byte */ |
| 110 | #define I2C_NOACK 1 /* PD_SDA level to noack a byte */ |
| 111 | |
| 112 | |
| 113 | #ifdef DEBUG_I2C |
| 114 | #define PRINTD(fmt,args...) do { \ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 115 | printf (fmt ,##args); \ |
| 116 | } while (0) |
| 117 | #else |
| 118 | #define PRINTD(fmt,args...) |
| 119 | #endif |
| 120 | |
| 121 | /*----------------------------------------------------------------------- |
| 122 | * Local functions |
| 123 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 124 | #if !defined(CONFIG_SYS_I2C_INIT_BOARD) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 125 | static void send_reset (void); |
Heiko Schocher | 0e2f2c5 | 2008-10-15 09:38:38 +0200 | [diff] [blame] | 126 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 127 | static void send_start (void); |
| 128 | static void send_stop (void); |
| 129 | static void send_ack (int); |
| 130 | static int write_byte (uchar byte); |
| 131 | static uchar read_byte (int); |
| 132 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 133 | #if !defined(CONFIG_SYS_I2C_INIT_BOARD) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 134 | /*----------------------------------------------------------------------- |
| 135 | * Send a reset sequence consisting of 9 clocks with the data signal high |
| 136 | * to clock any confused device back into an idle state. Also send a |
| 137 | * <stop> at the end of the sequence for belts & suspenders. |
| 138 | */ |
| 139 | static void send_reset(void) |
| 140 | { |
Heiko Schocher | dc7d22a | 2008-10-15 09:35:26 +0200 | [diff] [blame] | 141 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 142 | int j; |
| 143 | |
wdenk | a6db71d | 2003-04-08 23:25:21 +0000 | [diff] [blame] | 144 | I2C_SCL(1); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 145 | I2C_SDA(1); |
wdenk | a6db71d | 2003-04-08 23:25:21 +0000 | [diff] [blame] | 146 | #ifdef I2C_INIT |
| 147 | I2C_INIT; |
| 148 | #endif |
| 149 | I2C_TRISTATE; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 150 | for(j = 0; j < 9; j++) { |
| 151 | I2C_SCL(0); |
| 152 | I2C_DELAY; |
| 153 | I2C_DELAY; |
| 154 | I2C_SCL(1); |
| 155 | I2C_DELAY; |
| 156 | I2C_DELAY; |
| 157 | } |
| 158 | send_stop(); |
| 159 | I2C_TRISTATE; |
| 160 | } |
Heiko Schocher | 0e2f2c5 | 2008-10-15 09:38:38 +0200 | [diff] [blame] | 161 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 162 | |
| 163 | /*----------------------------------------------------------------------- |
| 164 | * START: High -> Low on SDA while SCL is High |
| 165 | */ |
| 166 | static void send_start(void) |
| 167 | { |
Heiko Schocher | dc7d22a | 2008-10-15 09:35:26 +0200 | [diff] [blame] | 168 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 169 | |
| 170 | I2C_DELAY; |
| 171 | I2C_SDA(1); |
| 172 | I2C_ACTIVE; |
| 173 | I2C_DELAY; |
| 174 | I2C_SCL(1); |
| 175 | I2C_DELAY; |
| 176 | I2C_SDA(0); |
| 177 | I2C_DELAY; |
| 178 | } |
| 179 | |
| 180 | /*----------------------------------------------------------------------- |
| 181 | * STOP: Low -> High on SDA while SCL is High |
| 182 | */ |
| 183 | static void send_stop(void) |
| 184 | { |
Heiko Schocher | dc7d22a | 2008-10-15 09:35:26 +0200 | [diff] [blame] | 185 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 186 | |
| 187 | I2C_SCL(0); |
| 188 | I2C_DELAY; |
| 189 | I2C_SDA(0); |
| 190 | I2C_ACTIVE; |
| 191 | I2C_DELAY; |
| 192 | I2C_SCL(1); |
| 193 | I2C_DELAY; |
| 194 | I2C_SDA(1); |
| 195 | I2C_DELAY; |
| 196 | I2C_TRISTATE; |
| 197 | } |
| 198 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 199 | /*----------------------------------------------------------------------- |
| 200 | * ack should be I2C_ACK or I2C_NOACK |
| 201 | */ |
| 202 | static void send_ack(int ack) |
| 203 | { |
Heiko Schocher | dc7d22a | 2008-10-15 09:35:26 +0200 | [diff] [blame] | 204 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 205 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 206 | I2C_SCL(0); |
| 207 | I2C_DELAY; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 208 | I2C_ACTIVE; |
Wolfgang Denk | d4a6110 | 2006-03-13 00:50:48 +0100 | [diff] [blame] | 209 | I2C_SDA(ack); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 210 | I2C_DELAY; |
| 211 | I2C_SCL(1); |
| 212 | I2C_DELAY; |
| 213 | I2C_DELAY; |
| 214 | I2C_SCL(0); |
| 215 | I2C_DELAY; |
| 216 | } |
| 217 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 218 | /*----------------------------------------------------------------------- |
| 219 | * Send 8 bits and look for an acknowledgement. |
| 220 | */ |
| 221 | static int write_byte(uchar data) |
| 222 | { |
Heiko Schocher | dc7d22a | 2008-10-15 09:35:26 +0200 | [diff] [blame] | 223 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 224 | int j; |
| 225 | int nack; |
| 226 | |
| 227 | I2C_ACTIVE; |
| 228 | for(j = 0; j < 8; j++) { |
| 229 | I2C_SCL(0); |
| 230 | I2C_DELAY; |
| 231 | I2C_SDA(data & 0x80); |
| 232 | I2C_DELAY; |
| 233 | I2C_SCL(1); |
| 234 | I2C_DELAY; |
| 235 | I2C_DELAY; |
| 236 | |
| 237 | data <<= 1; |
| 238 | } |
| 239 | |
| 240 | /* |
| 241 | * Look for an <ACK>(negative logic) and return it. |
| 242 | */ |
| 243 | I2C_SCL(0); |
| 244 | I2C_DELAY; |
| 245 | I2C_SDA(1); |
| 246 | I2C_TRISTATE; |
| 247 | I2C_DELAY; |
| 248 | I2C_SCL(1); |
| 249 | I2C_DELAY; |
| 250 | I2C_DELAY; |
| 251 | nack = I2C_READ; |
| 252 | I2C_SCL(0); |
| 253 | I2C_DELAY; |
| 254 | I2C_ACTIVE; |
| 255 | |
| 256 | return(nack); /* not a nack is an ack */ |
| 257 | } |
| 258 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 259 | /*----------------------------------------------------------------------- |
| 260 | * if ack == I2C_ACK, ACK the byte so can continue reading, else |
| 261 | * send I2C_NOACK to end the read. |
| 262 | */ |
| 263 | static uchar read_byte(int ack) |
| 264 | { |
Heiko Schocher | dc7d22a | 2008-10-15 09:35:26 +0200 | [diff] [blame] | 265 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 266 | int data; |
| 267 | int j; |
| 268 | |
| 269 | /* |
| 270 | * Read 8 bits, MSB first. |
| 271 | */ |
| 272 | I2C_TRISTATE; |
Haavard Skinnemoen | 15fb0a1 | 2008-05-16 11:08:11 +0200 | [diff] [blame] | 273 | I2C_SDA(1); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 274 | data = 0; |
| 275 | for(j = 0; j < 8; j++) { |
| 276 | I2C_SCL(0); |
| 277 | I2C_DELAY; |
| 278 | I2C_SCL(1); |
| 279 | I2C_DELAY; |
| 280 | data <<= 1; |
| 281 | data |= I2C_READ; |
| 282 | I2C_DELAY; |
| 283 | } |
| 284 | send_ack(ack); |
| 285 | |
| 286 | return(data); |
| 287 | } |
| 288 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 289 | /*----------------------------------------------------------------------- |
| 290 | * Initialization |
| 291 | */ |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 292 | static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 293 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 294 | #if defined(CONFIG_SYS_I2C_INIT_BOARD) |
Heiko Schocher | 0e2f2c5 | 2008-10-15 09:38:38 +0200 | [diff] [blame] | 295 | /* call board specific i2c bus reset routine before accessing the */ |
| 296 | /* environment, which might be in a chip on that bus. For details */ |
| 297 | /* about this problem see doc/I2C_Edge_Conditions. */ |
| 298 | i2c_init_board(); |
| 299 | #else |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 300 | /* |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 301 | * WARNING: Do NOT save speed in a static variable: if the |
| 302 | * I2C routines are called before RAM is initialized (to read |
| 303 | * the DIMM SPD, for instance), RAM won't be usable and your |
| 304 | * system will crash. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 305 | */ |
| 306 | send_reset (); |
Heiko Schocher | 0e2f2c5 | 2008-10-15 09:38:38 +0200 | [diff] [blame] | 307 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 308 | } |
| 309 | |
| 310 | /*----------------------------------------------------------------------- |
| 311 | * Probe to see if a chip is present. Also good for checking for the |
| 312 | * completion of EEPROM writes since the chip stops responding until |
| 313 | * the write completes (typically 10mSec). |
| 314 | */ |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 315 | static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 316 | { |
| 317 | int rc; |
| 318 | |
Wolfgang Denk | 0a8599f | 2006-03-12 01:30:45 +0100 | [diff] [blame] | 319 | /* |
Wolfgang Denk | 2bad868 | 2006-03-12 02:55:22 +0100 | [diff] [blame] | 320 | * perform 1 byte write transaction with just address byte |
Wolfgang Denk | 0a8599f | 2006-03-12 01:30:45 +0100 | [diff] [blame] | 321 | * (fake write) |
| 322 | */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 323 | send_start(); |
wdenk | 34b613e | 2002-12-17 01:51:00 +0000 | [diff] [blame] | 324 | rc = write_byte ((addr << 1) | 0); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 325 | send_stop(); |
| 326 | |
| 327 | return (rc ? 1 : 0); |
| 328 | } |
| 329 | |
| 330 | /*----------------------------------------------------------------------- |
| 331 | * Read bytes |
| 332 | */ |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 333 | static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr, |
| 334 | int alen, uchar *buffer, int len) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 335 | { |
| 336 | int shift; |
| 337 | PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n", |
| 338 | chip, addr, alen, buffer, len); |
| 339 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 340 | #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 341 | /* |
| 342 | * EEPROM chips that implement "address overflow" are ones |
| 343 | * like Catalyst 24WC04/08/16 which has 9/10/11 bits of |
| 344 | * address and the extra bits end up in the "chip address" |
| 345 | * bit slots. This makes a 24WC08 (1Kbyte) chip look like |
| 346 | * four 256 byte chips. |
| 347 | * |
| 348 | * Note that we consider the length of the address field to |
| 349 | * still be one byte because the extra address bits are |
| 350 | * hidden in the chip address. |
| 351 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 352 | chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 353 | |
| 354 | PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n", |
| 355 | chip, addr); |
| 356 | #endif |
| 357 | |
| 358 | /* |
| 359 | * Do the addressing portion of a write cycle to set the |
| 360 | * chip's address pointer. If the address length is zero, |
| 361 | * don't do the normal write cycle to set the address pointer, |
| 362 | * there is no address pointer in this chip. |
| 363 | */ |
| 364 | send_start(); |
| 365 | if(alen > 0) { |
| 366 | if(write_byte(chip << 1)) { /* write cycle */ |
| 367 | send_stop(); |
| 368 | PRINTD("i2c_read, no chip responded %02X\n", chip); |
| 369 | return(1); |
| 370 | } |
| 371 | shift = (alen-1) * 8; |
| 372 | while(alen-- > 0) { |
| 373 | if(write_byte(addr >> shift)) { |
| 374 | PRINTD("i2c_read, address not <ACK>ed\n"); |
| 375 | return(1); |
| 376 | } |
| 377 | shift -= 8; |
| 378 | } |
Andrew Dyer | 58c41f9 | 2008-12-29 17:36:01 -0600 | [diff] [blame] | 379 | |
| 380 | /* Some I2C chips need a stop/start sequence here, |
| 381 | * other chips don't work with a full stop and need |
| 382 | * only a start. Default behaviour is to send the |
| 383 | * stop/start sequence. |
| 384 | */ |
| 385 | #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START |
| 386 | send_start(); |
| 387 | #else |
| 388 | send_stop(); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 389 | send_start(); |
Andrew Dyer | 58c41f9 | 2008-12-29 17:36:01 -0600 | [diff] [blame] | 390 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 391 | } |
| 392 | /* |
| 393 | * Send the chip address again, this time for a read cycle. |
| 394 | * Then read the data. On the last byte, we do a NACK instead |
| 395 | * of an ACK(len == 0) to terminate the read. |
| 396 | */ |
| 397 | write_byte((chip << 1) | 1); /* read cycle */ |
| 398 | while(len-- > 0) { |
| 399 | *buffer++ = read_byte(len == 0); |
| 400 | } |
| 401 | send_stop(); |
| 402 | return(0); |
| 403 | } |
| 404 | |
| 405 | /*----------------------------------------------------------------------- |
| 406 | * Write bytes |
| 407 | */ |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 408 | static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr, |
| 409 | int alen, uchar *buffer, int len) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 410 | { |
| 411 | int shift, failures = 0; |
| 412 | |
| 413 | PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n", |
| 414 | chip, addr, alen, buffer, len); |
| 415 | |
| 416 | send_start(); |
| 417 | if(write_byte(chip << 1)) { /* write cycle */ |
| 418 | send_stop(); |
| 419 | PRINTD("i2c_write, no chip responded %02X\n", chip); |
| 420 | return(1); |
| 421 | } |
| 422 | shift = (alen-1) * 8; |
| 423 | while(alen-- > 0) { |
| 424 | if(write_byte(addr >> shift)) { |
| 425 | PRINTD("i2c_write, address not <ACK>ed\n"); |
| 426 | return(1); |
| 427 | } |
| 428 | shift -= 8; |
| 429 | } |
| 430 | |
| 431 | while(len-- > 0) { |
| 432 | if(write_byte(*buffer++)) { |
| 433 | failures++; |
| 434 | } |
| 435 | } |
| 436 | send_stop(); |
| 437 | return(failures); |
| 438 | } |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 439 | |
| 440 | /* |
| 441 | * Register soft i2c adapters |
| 442 | */ |
Dirk Eibach | e2493dd | 2015-10-28 11:46:39 +0100 | [diff] [blame] | 443 | U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe, |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 444 | soft_i2c_read, soft_i2c_write, NULL, |
| 445 | CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE, |
| 446 | 0) |
| 447 | #if defined(I2C_SOFT_DECLARATIONS2) |
Dirk Eibach | e2493dd | 2015-10-28 11:46:39 +0100 | [diff] [blame] | 448 | U_BOOT_I2C_ADAP_COMPLETE(soft01, soft_i2c_init, soft_i2c_probe, |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 449 | soft_i2c_read, soft_i2c_write, NULL, |
| 450 | CONFIG_SYS_I2C_SOFT_SPEED_2, |
| 451 | CONFIG_SYS_I2C_SOFT_SLAVE_2, |
| 452 | 1) |
| 453 | #endif |
| 454 | #if defined(I2C_SOFT_DECLARATIONS3) |
Dirk Eibach | e2493dd | 2015-10-28 11:46:39 +0100 | [diff] [blame] | 455 | U_BOOT_I2C_ADAP_COMPLETE(soft02, soft_i2c_init, soft_i2c_probe, |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 456 | soft_i2c_read, soft_i2c_write, NULL, |
| 457 | CONFIG_SYS_I2C_SOFT_SPEED_3, |
| 458 | CONFIG_SYS_I2C_SOFT_SLAVE_3, |
| 459 | 2) |
| 460 | #endif |
| 461 | #if defined(I2C_SOFT_DECLARATIONS4) |
Dirk Eibach | e2493dd | 2015-10-28 11:46:39 +0100 | [diff] [blame] | 462 | U_BOOT_I2C_ADAP_COMPLETE(soft03, soft_i2c_init, soft_i2c_probe, |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 463 | soft_i2c_read, soft_i2c_write, NULL, |
| 464 | CONFIG_SYS_I2C_SOFT_SPEED_4, |
| 465 | CONFIG_SYS_I2C_SOFT_SLAVE_4, |
| 466 | 3) |
| 467 | #endif |
Dirk Eibach | 981bacd | 2015-10-28 11:46:35 +0100 | [diff] [blame] | 468 | #if defined(I2C_SOFT_DECLARATIONS5) |
Dirk Eibach | e2493dd | 2015-10-28 11:46:39 +0100 | [diff] [blame] | 469 | U_BOOT_I2C_ADAP_COMPLETE(soft04, soft_i2c_init, soft_i2c_probe, |
Dirk Eibach | 981bacd | 2015-10-28 11:46:35 +0100 | [diff] [blame] | 470 | soft_i2c_read, soft_i2c_write, NULL, |
| 471 | CONFIG_SYS_I2C_SOFT_SPEED_5, |
| 472 | CONFIG_SYS_I2C_SOFT_SLAVE_5, |
| 473 | 4) |
| 474 | #endif |
| 475 | #if defined(I2C_SOFT_DECLARATIONS6) |
Dirk Eibach | e2493dd | 2015-10-28 11:46:39 +0100 | [diff] [blame] | 476 | U_BOOT_I2C_ADAP_COMPLETE(soft05, soft_i2c_init, soft_i2c_probe, |
Dirk Eibach | 981bacd | 2015-10-28 11:46:35 +0100 | [diff] [blame] | 477 | soft_i2c_read, soft_i2c_write, NULL, |
| 478 | CONFIG_SYS_I2C_SOFT_SPEED_6, |
| 479 | CONFIG_SYS_I2C_SOFT_SLAVE_6, |
| 480 | 5) |
| 481 | #endif |
| 482 | #if defined(I2C_SOFT_DECLARATIONS7) |
Dirk Eibach | e2493dd | 2015-10-28 11:46:39 +0100 | [diff] [blame] | 483 | U_BOOT_I2C_ADAP_COMPLETE(soft06, soft_i2c_init, soft_i2c_probe, |
Dirk Eibach | 981bacd | 2015-10-28 11:46:35 +0100 | [diff] [blame] | 484 | soft_i2c_read, soft_i2c_write, NULL, |
| 485 | CONFIG_SYS_I2C_SOFT_SPEED_7, |
| 486 | CONFIG_SYS_I2C_SOFT_SLAVE_7, |
| 487 | 6) |
| 488 | #endif |
| 489 | #if defined(I2C_SOFT_DECLARATIONS8) |
Dirk Eibach | e2493dd | 2015-10-28 11:46:39 +0100 | [diff] [blame] | 490 | U_BOOT_I2C_ADAP_COMPLETE(soft07, soft_i2c_init, soft_i2c_probe, |
Dirk Eibach | 981bacd | 2015-10-28 11:46:35 +0100 | [diff] [blame] | 491 | soft_i2c_read, soft_i2c_write, NULL, |
| 492 | CONFIG_SYS_I2C_SOFT_SPEED_8, |
| 493 | CONFIG_SYS_I2C_SOFT_SLAVE_8, |
| 494 | 7) |
| 495 | #endif |
Dirk Eibach | 9459433 | 2015-10-28 11:46:36 +0100 | [diff] [blame] | 496 | #if defined(I2C_SOFT_DECLARATIONS9) |
Dirk Eibach | e2493dd | 2015-10-28 11:46:39 +0100 | [diff] [blame] | 497 | U_BOOT_I2C_ADAP_COMPLETE(soft08, soft_i2c_init, soft_i2c_probe, |
Dirk Eibach | 9459433 | 2015-10-28 11:46:36 +0100 | [diff] [blame] | 498 | soft_i2c_read, soft_i2c_write, NULL, |
| 499 | CONFIG_SYS_I2C_SOFT_SPEED_9, |
| 500 | CONFIG_SYS_I2C_SOFT_SLAVE_9, |
| 501 | 8) |
| 502 | #endif |
| 503 | #if defined(I2C_SOFT_DECLARATIONS10) |
Dirk Eibach | e2493dd | 2015-10-28 11:46:39 +0100 | [diff] [blame] | 504 | U_BOOT_I2C_ADAP_COMPLETE(soft09, soft_i2c_init, soft_i2c_probe, |
Dirk Eibach | 9459433 | 2015-10-28 11:46:36 +0100 | [diff] [blame] | 505 | soft_i2c_read, soft_i2c_write, NULL, |
| 506 | CONFIG_SYS_I2C_SOFT_SPEED_10, |
| 507 | CONFIG_SYS_I2C_SOFT_SLAVE_10, |
| 508 | 9) |
| 509 | #endif |
| 510 | #if defined(I2C_SOFT_DECLARATIONS11) |
| 511 | U_BOOT_I2C_ADAP_COMPLETE(soft10, soft_i2c_init, soft_i2c_probe, |
| 512 | soft_i2c_read, soft_i2c_write, NULL, |
| 513 | CONFIG_SYS_I2C_SOFT_SPEED_11, |
| 514 | CONFIG_SYS_I2C_SOFT_SLAVE_11, |
| 515 | 10) |
| 516 | #endif |
| 517 | #if defined(I2C_SOFT_DECLARATIONS12) |
| 518 | U_BOOT_I2C_ADAP_COMPLETE(soft11, soft_i2c_init, soft_i2c_probe, |
| 519 | soft_i2c_read, soft_i2c_write, NULL, |
| 520 | CONFIG_SYS_I2C_SOFT_SPEED_12, |
| 521 | CONFIG_SYS_I2C_SOFT_SLAVE_12, |
| 522 | 11) |
| 523 | #endif |