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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Andy Fleminga1ca3682011-03-21 18:03:22 -05002/*
3 * (C) Copyright 2011 Freescale Semiconductor, Inc
4 * Andy Fleming
Andy Fleminga1ca3682011-03-21 18:03:22 -05005 */
6
7/*
8 * MDIO Commands
9 */
10
11#include <common.h>
12#include <command.h>
Simon Glass992b6032020-07-19 10:15:39 -060013#include <dm.h>
Andy Fleminga1ca3682011-03-21 18:03:22 -050014#include <miiphy.h>
15#include <phy.h>
16
Andy Fleminga1ca3682011-03-21 18:03:22 -050017static char last_op[2];
18static uint last_data;
19static uint last_addr_lo;
20static uint last_addr_hi;
21static uint last_devad_lo;
22static uint last_devad_hi;
23static uint last_reg_lo;
24static uint last_reg_hi;
25
26static int extract_range(char *input, int *plo, int *phi)
27{
28 char *end;
Michal Simekfca1e842016-11-16 08:41:01 +010029 *plo = simple_strtol(input, &end, 16);
Andy Fleminga1ca3682011-03-21 18:03:22 -050030 if (end == input)
31 return -1;
32
33 if ((*end == '-') && *(++end))
Michal Simekfca1e842016-11-16 08:41:01 +010034 *phi = simple_strtol(end, NULL, 16);
Andy Fleminga1ca3682011-03-21 18:03:22 -050035 else if (*end == '\0')
36 *phi = *plo;
37 else
38 return -1;
39
40 return 0;
41}
42
Carlo Caione1d70a3f2019-02-08 17:25:08 +000043static int mdio_write_ranges(struct mii_dev *bus,
Stefano Babic6894ea72013-09-02 15:42:32 +020044 int addrlo,
Kim Phillipsdc00a682012-10-29 13:34:31 +000045 int addrhi, int devadlo, int devadhi,
Stefano Babic6894ea72013-09-02 15:42:32 +020046 int reglo, int reghi, unsigned short data,
47 int extended)
Andy Fleminga1ca3682011-03-21 18:03:22 -050048{
Carlo Caione1d70a3f2019-02-08 17:25:08 +000049 struct phy_device *phydev;
Andy Fleminga1ca3682011-03-21 18:03:22 -050050 int addr, devad, reg;
51 int err = 0;
52
53 for (addr = addrlo; addr <= addrhi; addr++) {
Carlo Caione1d70a3f2019-02-08 17:25:08 +000054 phydev = bus->phymap[addr];
55
Andy Fleminga1ca3682011-03-21 18:03:22 -050056 for (devad = devadlo; devad <= devadhi; devad++) {
57 for (reg = reglo; reg <= reghi; reg++) {
Vladimir Oltean6572c102019-05-30 03:08:32 +030058 if (!phydev)
59 err = bus->write(bus, addr, devad,
60 reg, data);
61 else if (!extended)
Carlo Caione1d70a3f2019-02-08 17:25:08 +000062 err = phy_write_mmd(phydev, devad,
63 reg, data);
Stefano Babic6894ea72013-09-02 15:42:32 +020064 else
65 err = phydev->drv->writeext(phydev,
66 addr, devad, reg, data);
Andy Fleminga1ca3682011-03-21 18:03:22 -050067
68 if (err)
69 goto err_out;
70 }
71 }
72 }
73
74err_out:
75 return err;
76}
77
Carlo Caione1d70a3f2019-02-08 17:25:08 +000078static int mdio_read_ranges(struct mii_dev *bus,
Stefano Babic6894ea72013-09-02 15:42:32 +020079 int addrlo,
Kim Phillipsdc00a682012-10-29 13:34:31 +000080 int addrhi, int devadlo, int devadhi,
Stefano Babic6894ea72013-09-02 15:42:32 +020081 int reglo, int reghi, int extended)
Andy Fleminga1ca3682011-03-21 18:03:22 -050082{
83 int addr, devad, reg;
Carlo Caione1d70a3f2019-02-08 17:25:08 +000084 struct phy_device *phydev;
Andy Fleminga1ca3682011-03-21 18:03:22 -050085
86 printf("Reading from bus %s\n", bus->name);
87 for (addr = addrlo; addr <= addrhi; addr++) {
Carlo Caione1d70a3f2019-02-08 17:25:08 +000088 phydev = bus->phymap[addr];
Michal Simekfca1e842016-11-16 08:41:01 +010089 printf("PHY at address %x:\n", addr);
Andy Fleminga1ca3682011-03-21 18:03:22 -050090
91 for (devad = devadlo; devad <= devadhi; devad++) {
92 for (reg = reglo; reg <= reghi; reg++) {
Anatolij Gustschin9531b472011-04-30 02:39:29 +000093 int val;
Andy Fleminga1ca3682011-03-21 18:03:22 -050094
Vladimir Oltean6572c102019-05-30 03:08:32 +030095 if (!phydev)
96 val = bus->read(bus, addr, devad, reg);
97 else if (!extended)
Carlo Caione1d70a3f2019-02-08 17:25:08 +000098 val = phy_read_mmd(phydev, devad, reg);
Stefano Babic6894ea72013-09-02 15:42:32 +020099 else
100 val = phydev->drv->readext(phydev, addr,
101 devad, reg);
102
Andy Fleminga1ca3682011-03-21 18:03:22 -0500103 if (val < 0) {
104 printf("Error\n");
105
106 return val;
107 }
108
109 if (devad >= 0)
110 printf("%d.", devad);
111
112 printf("%d - 0x%x\n", reg, val & 0xffff);
113 }
114 }
115 }
116
117 return 0;
118}
119
120/* The register will be in the form [a[-b].]x[-y] */
Kim Phillipsdc00a682012-10-29 13:34:31 +0000121static int extract_reg_range(char *input, int *devadlo, int *devadhi,
122 int *reglo, int *reghi)
Andy Fleminga1ca3682011-03-21 18:03:22 -0500123{
124 char *regstr;
125
126 /* use strrchr to find the last string after a '.' */
127 regstr = strrchr(input, '.');
128
129 /* If it exists, extract the devad(s) */
130 if (regstr) {
131 char devadstr[32];
132
133 strncpy(devadstr, input, regstr - input);
134 devadstr[regstr - input] = '\0';
135
136 if (extract_range(devadstr, devadlo, devadhi))
137 return -1;
138
139 regstr++;
140 } else {
141 /* Otherwise, we have no devad, and we just got regs */
142 *devadlo = *devadhi = MDIO_DEVAD_NONE;
143
144 regstr = input;
145 }
146
147 return extract_range(regstr, reglo, reghi);
148}
149
Kim Phillipsdc00a682012-10-29 13:34:31 +0000150static int extract_phy_range(char *const argv[], int argc, struct mii_dev **bus,
Stefano Babic6894ea72013-09-02 15:42:32 +0200151 struct phy_device **phydev,
Kim Phillipsdc00a682012-10-29 13:34:31 +0000152 int *addrlo, int *addrhi)
Andy Fleminga1ca3682011-03-21 18:03:22 -0500153{
Stefano Babic6894ea72013-09-02 15:42:32 +0200154 struct phy_device *dev = *phydev;
Andy Fleminga1ca3682011-03-21 18:03:22 -0500155
156 if ((argc < 1) || (argc > 2))
157 return -1;
158
159 /* If there are two arguments, it's busname addr */
160 if (argc == 2) {
161 *bus = miiphy_get_dev_by_name(argv[0]);
162
163 if (!*bus)
164 return -1;
165
166 return extract_range(argv[1], addrlo, addrhi);
167 }
168
169 /* It must be one argument, here */
170
171 /*
172 * This argument can be one of two things:
173 * 1) Ethernet device name
174 * 2) Just an address (use the previously-used bus)
175 *
176 * We check all buses for a PHY which is connected to an ethernet
177 * device by the given name. If none are found, we call
178 * extract_range() on the string, and see if it's an address range.
179 */
Stefano Babic6894ea72013-09-02 15:42:32 +0200180 dev = mdio_phydev_for_ethname(argv[0]);
Andy Fleminga1ca3682011-03-21 18:03:22 -0500181
Stefano Babic6894ea72013-09-02 15:42:32 +0200182 if (dev) {
183 *addrlo = *addrhi = dev->addr;
184 *bus = dev->bus;
Andy Fleminga1ca3682011-03-21 18:03:22 -0500185
186 return 0;
187 }
188
189 /* It's an address or nothing useful */
190 return extract_range(argv[0], addrlo, addrhi);
191}
192
193/* ---------------------------------------------------------------- */
Simon Glassed38aef2020-05-10 11:40:03 -0600194static int do_mdio(struct cmd_tbl *cmdtp, int flag, int argc,
195 char *const argv[])
Andy Fleminga1ca3682011-03-21 18:03:22 -0500196{
197 char op[2];
198 int addrlo, addrhi, reglo, reghi, devadlo, devadhi;
199 unsigned short data;
200 int pos = argc - 1;
201 struct mii_dev *bus;
Stefano Babic6894ea72013-09-02 15:42:32 +0200202 struct phy_device *phydev = NULL;
203 int extended = 0;
Andy Fleminga1ca3682011-03-21 18:03:22 -0500204
205 if (argc < 2)
Simon Glassa06dfc72011-12-10 08:44:01 +0000206 return CMD_RET_USAGE;
Andy Fleminga1ca3682011-03-21 18:03:22 -0500207
Alex Marginean1a5b0982019-06-03 19:10:30 +0300208#ifdef CONFIG_DM_MDIO
209 /* probe DM MII device before any operation so they are all accesible */
210 dm_mdio_probe_devices();
211#endif
212
Andy Fleminga1ca3682011-03-21 18:03:22 -0500213 /*
214 * We use the last specified parameters, unless new ones are
215 * entered.
216 */
217 op[0] = argv[1][0];
218 addrlo = last_addr_lo;
219 addrhi = last_addr_hi;
220 devadlo = last_devad_lo;
221 devadhi = last_devad_hi;
222 reglo = last_reg_lo;
223 reghi = last_reg_hi;
224 data = last_data;
225
226 bus = mdio_get_current_dev();
227
228 if (flag & CMD_FLAG_REPEAT)
229 op[0] = last_op[0];
230
Stefano Babic6894ea72013-09-02 15:42:32 +0200231 if (strlen(argv[1]) > 1) {
232 op[1] = argv[1][1];
233 if (op[1] == 'x') {
234 phydev = mdio_phydev_for_ethname(argv[2]);
235
236 if (phydev) {
237 addrlo = phydev->addr;
238 addrhi = addrlo;
239 bus = phydev->bus;
240 extended = 1;
241 } else {
Carlo Caione1d70a3f2019-02-08 17:25:08 +0000242 return CMD_RET_FAILURE;
Stefano Babic6894ea72013-09-02 15:42:32 +0200243 }
244
245 if (!phydev->drv ||
246 (!phydev->drv->writeext && (op[0] == 'w')) ||
247 (!phydev->drv->readext && (op[0] == 'r'))) {
248 puts("PHY does not have extended functions\n");
Carlo Caione1d70a3f2019-02-08 17:25:08 +0000249 return CMD_RET_FAILURE;
Stefano Babic6894ea72013-09-02 15:42:32 +0200250 }
251 }
252 }
253
Andy Fleminga1ca3682011-03-21 18:03:22 -0500254 switch (op[0]) {
255 case 'w':
256 if (pos > 1)
Simon Glass3ff49ec2021-07-24 09:03:29 -0600257 data = hextoul(argv[pos--], NULL);
Joe Hershberger8a3968c2019-07-30 16:51:41 -0500258 /* Intentional fall-through - Get reg for read and write */
Andy Fleminga1ca3682011-03-21 18:03:22 -0500259 case 'r':
260 if (pos > 1)
261 if (extract_reg_range(argv[pos--], &devadlo, &devadhi,
Mario Sixd6808cf2018-01-15 11:08:26 +0100262 &reglo, &reghi))
Carlo Caione1d70a3f2019-02-08 17:25:08 +0000263 return CMD_RET_FAILURE;
Joe Hershberger8a3968c2019-07-30 16:51:41 -0500264 /* Intentional fall-through - Get phy for all commands */
Andy Fleminga1ca3682011-03-21 18:03:22 -0500265 default:
266 if (pos > 1)
Mario Sixd6808cf2018-01-15 11:08:26 +0100267 if (extract_phy_range(&argv[2], pos - 1, &bus,
268 &phydev, &addrlo, &addrhi))
Carlo Caione1d70a3f2019-02-08 17:25:08 +0000269 return CMD_RET_FAILURE;
Andy Fleminga1ca3682011-03-21 18:03:22 -0500270
271 break;
272 }
273
Simon Goldschmidt9fcced82019-07-12 20:58:18 +0200274 if (!bus) {
275 puts("No MDIO bus found\n");
276 return CMD_RET_FAILURE;
277 }
278
Andy Fleminga1ca3682011-03-21 18:03:22 -0500279 if (op[0] == 'l') {
280 mdio_list_devices();
281
282 return 0;
283 }
284
285 /* Save the chosen bus */
286 miiphy_set_current_dev(bus->name);
287
288 switch (op[0]) {
289 case 'w':
Carlo Caione1d70a3f2019-02-08 17:25:08 +0000290 mdio_write_ranges(bus, addrlo, addrhi, devadlo, devadhi,
Stefano Babic6894ea72013-09-02 15:42:32 +0200291 reglo, reghi, data, extended);
Andy Fleminga1ca3682011-03-21 18:03:22 -0500292 break;
293
294 case 'r':
Carlo Caione1d70a3f2019-02-08 17:25:08 +0000295 mdio_read_ranges(bus, addrlo, addrhi, devadlo, devadhi,
Stefano Babic6894ea72013-09-02 15:42:32 +0200296 reglo, reghi, extended);
Andy Fleminga1ca3682011-03-21 18:03:22 -0500297 break;
298 }
299
300 /*
301 * Save the parameters for repeats.
302 */
303 last_op[0] = op[0];
304 last_addr_lo = addrlo;
305 last_addr_hi = addrhi;
306 last_devad_lo = devadlo;
307 last_devad_hi = devadhi;
308 last_reg_lo = reglo;
309 last_reg_hi = reghi;
310 last_data = data;
311
312 return 0;
313}
314
315/***************************************************/
316
317U_BOOT_CMD(
318 mdio, 6, 1, do_mdio,
319 "MDIO utility commands",
320 "list - List MDIO buses\n"
321 "mdio read <phydev> [<devad>.]<reg> - "
322 "read PHY's register at <devad>.<reg>\n"
323 "mdio write <phydev> [<devad>.]<reg> <data> - "
324 "write PHY's register at <devad>.<reg>\n"
Stefano Babic6894ea72013-09-02 15:42:32 +0200325 "mdio rx <phydev> [<devad>.]<reg> - "
326 "read PHY's extended register at <devad>.<reg>\n"
327 "mdio wx <phydev> [<devad>.]<reg> <data> - "
328 "write PHY's extended register at <devad>.<reg>\n"
Andy Fleminga1ca3682011-03-21 18:03:22 -0500329 "<phydev> may be:\n"
330 " <busname> <addr>\n"
331 " <addr>\n"
332 " <eth name>\n"
333 "<addr> <devad>, and <reg> may be ranges, e.g. 1-5.4-0x1f.\n"
334);