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Masahiro Yamadafa714412015-07-21 14:04:22 +09001/*
2 * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
Masahiro Yamadafa714412015-07-21 14:04:22 +09007#include <linux/io.h>
Masahiro Yamadaefdf3402016-01-09 01:51:13 +09008
9#include "../init.h"
10#include "bcu-regs.h"
Masahiro Yamadafa714412015-07-21 14:04:22 +090011
12#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
13
Masahiro Yamada98905692016-03-30 20:17:02 +090014int uniphier_sld3_bcu_init(const struct uniphier_board_data *bd)
Masahiro Yamadafa714412015-07-21 14:04:22 +090015{
16 int shift;
17
18 writel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */
19 writel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */
20 writel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */
21 /*
22 * 0xe0000000-0xefffffff: Ex-bus
23 * 0xf0000000-0xfbffffff: ASM bus
24 * 0xfc000000-0xffffffff: OCM bus
25 */
26 writel(0x24440000, BCSCR5);
27
28 /* Specify DDR channel */
Masahiro Yamada799e6f22016-02-26 14:21:34 +090029 shift = (bd->dram_ch[1].base - bd->dram_ch[0].base) / 0x04000000 * 4;
Masahiro Yamadafa714412015-07-21 14:04:22 +090030 writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */
31
32 shift -= 32;
33 writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */
34
35 shift -= 32;
36 writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */
Masahiro Yamada75f16f82015-09-22 00:27:39 +090037
38 return 0;
Masahiro Yamadafa714412015-07-21 14:04:22 +090039}