Masahiro Yamada | fa71441 | 2015-07-21 14:04:22 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
Masahiro Yamada | fa71441 | 2015-07-21 14:04:22 +0900 | [diff] [blame] | 7 | #include <linux/io.h> |
Masahiro Yamada | efdf340 | 2016-01-09 01:51:13 +0900 | [diff] [blame] | 8 | |
| 9 | #include "../init.h" |
| 10 | #include "bcu-regs.h" |
Masahiro Yamada | fa71441 | 2015-07-21 14:04:22 +0900 | [diff] [blame] | 11 | |
| 12 | #define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x)) |
| 13 | |
Masahiro Yamada | 9890569 | 2016-03-30 20:17:02 +0900 | [diff] [blame^] | 14 | int uniphier_sld3_bcu_init(const struct uniphier_board_data *bd) |
Masahiro Yamada | fa71441 | 2015-07-21 14:04:22 +0900 | [diff] [blame] | 15 | { |
| 16 | int shift; |
| 17 | |
| 18 | writel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */ |
| 19 | writel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */ |
| 20 | writel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */ |
| 21 | /* |
| 22 | * 0xe0000000-0xefffffff: Ex-bus |
| 23 | * 0xf0000000-0xfbffffff: ASM bus |
| 24 | * 0xfc000000-0xffffffff: OCM bus |
| 25 | */ |
| 26 | writel(0x24440000, BCSCR5); |
| 27 | |
| 28 | /* Specify DDR channel */ |
Masahiro Yamada | 799e6f2 | 2016-02-26 14:21:34 +0900 | [diff] [blame] | 29 | shift = (bd->dram_ch[1].base - bd->dram_ch[0].base) / 0x04000000 * 4; |
Masahiro Yamada | fa71441 | 2015-07-21 14:04:22 +0900 | [diff] [blame] | 30 | writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */ |
| 31 | |
| 32 | shift -= 32; |
| 33 | writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */ |
| 34 | |
| 35 | shift -= 32; |
| 36 | writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */ |
Masahiro Yamada | 75f16f8 | 2015-09-22 00:27:39 +0900 | [diff] [blame] | 37 | |
| 38 | return 0; |
Masahiro Yamada | fa71441 | 2015-07-21 14:04:22 +0900 | [diff] [blame] | 39 | } |