| Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 1 | /* |
| 2 | * UniPhier BCU (Bus Control Unit) registers |
| 3 | * |
| 4 | * Copyright (C) 2011-2014 Panasonic Corporation |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #ifndef ARCH_BCU_REGS_H |
| 10 | #define ARCH_BCU_REGS_H |
| 11 | |
| 12 | #define BCU_BASE 0x50080000 |
| 13 | |
| 14 | #define BCSCR(x) (BCU_BASE + 0x180 + (x) * 4) |
| 15 | #define BCSCR0 (BCSCR(0)) |
| 16 | #define BCSCR1 (BCSCR(1)) |
| 17 | #define BCSCR2 (BCSCR(2)) |
| 18 | #define BCSCR3 (BCSCR(3)) |
| 19 | #define BCSCR4 (BCSCR(4)) |
| 20 | #define BCSCR5 (BCSCR(5)) |
| 21 | |
| 22 | #define BCIPPCCHR(x) (BCU_BASE + 0x0280 + (x) * 4) |
| 23 | #define BCIPPCCHR0 (BCIPPCCHR(0)) |
| 24 | #define BCIPPCCHR1 (BCIPPCCHR(1)) |
| 25 | #define BCIPPCCHR2 (BCIPPCCHR(2)) |
| 26 | #define BCIPPCCHR3 (BCIPPCCHR(3)) |
| 27 | #define BCIPPCCHR4 (BCIPPCCHR(4)) |
| 28 | #define BCIPPCCHR5 (BCIPPCCHR(5)) |
| 29 | |
| 30 | #endif /* ARCH_BCU_REGS_H */ |