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Simon Glass4c0dc6d2013-03-05 14:39:35 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 *
4 * (C) Copyright 2000 - 2002
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 *
22 ********************************************************************
23 * NOTE: This header file defines an interface to U-Boot. Including
24 * this (unmodified) header file in another file is considered normal
25 * use of U-Boot, and does *not* fall under the heading of "derived
26 * work".
27 ********************************************************************
28 */
29
30#ifndef __ASM_GENERIC_U_BOOT_H__
31#define __ASM_GENERIC_U_BOOT_H__
32
33/*
34 * Board information passed to Linux kernel from U-Boot
35 *
36 * include/asm-ppc/u-boot.h
37 */
38
39#ifndef __ASSEMBLY__
40
41typedef struct bd_info {
42 unsigned long bi_memstart; /* start of DRAM memory */
43 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
44 unsigned long bi_flashstart; /* start of FLASH memory */
45 unsigned long bi_flashsize; /* size of FLASH memory */
46 unsigned long bi_flashoffset; /* reserved area for startup monitor */
47 unsigned long bi_sramstart; /* start of SRAM memory */
48 unsigned long bi_sramsize; /* size of SRAM memory */
49#ifdef CONFIG_ARM
50 unsigned long bi_arm_freq; /* arm frequency */
51 unsigned long bi_dsp_freq; /* dsp core frequency */
52 unsigned long bi_ddr_freq; /* ddr frequency */
53#endif
54#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \
55 || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
56 unsigned long bi_immr_base; /* base of IMMR register */
57#endif
58#if defined(CONFIG_MPC5xxx)
59 unsigned long bi_mbar_base; /* base of internal registers */
60#endif
61#if defined(CONFIG_MPC83xx)
62 unsigned long bi_immrbar;
63#endif
Simon Glass4c0dc6d2013-03-05 14:39:35 +000064 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
65 unsigned long bi_ip_addr; /* IP Address */
66 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
67 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
68 unsigned long bi_intfreq; /* Internal Freq, in MHz */
69 unsigned long bi_busfreq; /* Bus Freq, in MHz */
70#if defined(CONFIG_CPM2)
71 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
72 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
73 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
74 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
75#endif
76#if defined(CONFIG_MPC512X)
77 unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */
78#endif /* CONFIG_MPC512X */
79#if defined(CONFIG_MPC5xxx)
80 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
81 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
82#endif
83 unsigned int bi_baudrate; /* Console Baudrate */
84#if defined(CONFIG_405) || \
85 defined(CONFIG_405GP) || \
86 defined(CONFIG_405CR) || \
87 defined(CONFIG_405EP) || \
88 defined(CONFIG_405EZ) || \
89 defined(CONFIG_405EX) || \
90 defined(CONFIG_440)
91 unsigned char bi_s_version[4]; /* Version of this structure */
92 unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
93 unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
94 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
95 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
96 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
97#endif
98#if defined(CONFIG_HYMOD)
99 hymod_conf_t bi_hymod_conf; /* hymod configuration information */
100#endif
101
102#ifdef CONFIG_HAS_ETH1
103 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
104#endif
105#ifdef CONFIG_HAS_ETH2
106 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
107#endif
108#ifdef CONFIG_HAS_ETH3
109 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
110#endif
111#ifdef CONFIG_HAS_ETH4
112 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
113#endif
114#ifdef CONFIG_HAS_ETH5
115 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
116#endif
117
118#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
119 defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
120 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
121 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
122 defined(CONFIG_460EX) || defined(CONFIG_460GT)
123 unsigned int bi_opbfreq; /* OPB clock in Hz */
124 int bi_iic_fast[2]; /* Use fast i2c mode */
125#endif
126#if defined(CONFIG_NX823)
127 unsigned char bi_sernum[8];
128#endif
129#if defined(CONFIG_4xx)
130#if defined(CONFIG_440GX) || \
131 defined(CONFIG_460EX) || defined(CONFIG_460GT)
132 int bi_phynum[4]; /* Determines phy mapping */
133 int bi_phymode[4]; /* Determines phy mode */
134#elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
135 int bi_phynum[2]; /* Determines phy mapping */
136 int bi_phymode[2]; /* Determines phy mode */
137#else
138 int bi_phynum[1]; /* Determines phy mapping */
139 int bi_phymode[1]; /* Determines phy mode */
140#endif
141#endif /* defined(CONFIG_4xx) */
142 ulong bi_arch_number; /* unique id for this board */
143 ulong bi_boot_params; /* where this board expects params */
144#ifdef CONFIG_NR_DRAM_BANKS
145 struct { /* RAM configuration */
146 ulong start;
147 ulong size;
148 } bi_dram[CONFIG_NR_DRAM_BANKS];
149#endif /* CONFIG_NR_DRAM_BANKS */
150} bd_t;
151
152#endif /* __ASSEMBLY__ */
153
154#endif /* __ASM_GENERIC_U_BOOT_H__ */