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Bin Mengdde9c782019-07-18 00:34:27 -07001.. SPDX-License-Identifier: GPL-2.0+
2
3ARM64
4=====
David Feng85fd5f12013-12-14 11:47:35 +08005
6Summary
Bin Mengdde9c782019-07-18 00:34:27 -07007-------
Andre Przywara920e04d2016-11-03 01:01:50 +00008The initial arm64 U-Boot port was developed before hardware was available,
9so the first supported platforms were the Foundation and Fast Model for ARMv8.
10These days U-Boot runs on a variety of 64-bit capable ARM hardware, from
11embedded development boards to servers.
David Feng85fd5f12013-12-14 11:47:35 +080012
13Notes
Bin Mengdde9c782019-07-18 00:34:27 -070014-----
David Feng85fd5f12013-12-14 11:47:35 +080015
Andre Przywara920e04d2016-11-03 01:01:50 +0000161. U-Boot can run at any exception level it is entered in, it is
17 recommened to enter it in EL3 if U-Boot takes some responsibilities of a
18 classical firmware (like initial hardware setup, CPU errata workarounds
19 or SMP bringup). U-Boot can be entered in EL2 when its main purpose is
20 that of a boot loader. It can drop to lower exception levels before
Peter Hoyes3ca0ea02022-03-04 16:30:18 +000021 entering the OS. For ARMv8-R it is recommened to enter at S-EL1, as for this
22 architecture there is no S-EL3.
David Feng85fd5f12013-12-14 11:47:35 +080023
Bin Meng75574052016-02-05 19:30:11 -0800242. U-Boot for arm64 is compiled with AArch64-gcc. AArch64-gcc
David Feng85fd5f12013-12-14 11:47:35 +080025 use rela relocation format, a tool(tools/relocate-rela) by Scott Wood
26 is used to encode the initial addend of rela to u-boot.bin. After running,
Bin Meng75574052016-02-05 19:30:11 -080027 the U-Boot will be relocated to destination again.
David Feng85fd5f12013-12-14 11:47:35 +080028
Andre Przywara920e04d2016-11-03 01:01:50 +0000293. Earlier Linux kernel versions required the FDT to be placed at a
30 2 MB boundary and within the same 512 MB section as the kernel image,
31 resulting in fdt_high to be defined specially.
32 Since kernel version 4.2 Linux is more relaxed about the DT location, so it
33 can be placed anywhere in memory.
David Feng85fd5f12013-12-14 11:47:35 +080034 Please reference linux/Documentation/arm64/booting.txt for detail.
35
364. Spin-table is used to wake up secondary processors. One location
37 (or per processor location) is defined to hold the kernel entry point
38 for secondary processors. It must be ensured that the location is
39 accessible and zero immediately after secondary processor
40 enter slave_cpu branch execution in start.S. The location address
41 is encoded in cpu node of DTS. Linux kernel store the entry point
42 of secondary processors to it and send event to wakeup secondary
43 processors.
44 Please reference linux/Documentation/arm64/booting.txt for detail.
45
465. Generic board is supported.
47
486. CONFIG_ARM64 instead of CONFIG_ARMV8 is used to distinguish aarch64 and
49 aarch32 specific codes.
50
Caleb Connollyf33d71f2024-06-17 10:03:49 +020051MMU
52---
53
54U-Boot uses a simple page table for MMU setup. It uses the smallest number of bits
55possible for the virtual address based on the maximum memory address (see the logic
56in ``get_tcr()``). If this is less than 39 bits, the MMU will use only 3 levels for
57address translation.
58
59As with all platforms, U-Boot on ARM64 uses a 1:1 mapping of virtual to physical addresses.
60In general, the memory map is expected to remain static once the MMU is enabled.
61
62Software pagetable walker
63^^^^^^^^^^^^^^^^^^^^^^^^^
64
65It is possible to debug the pagetable generated by U-Boot with the built in
66``dump_pagetable()`` and ``walk_pagetable()`` functions (the former being a simple
67wrapper for the latter). For example the following can be added to ``setup_all_pgtables()``
68after the first call to ``setup_pgtables()``:
69
70.. code-block:: c
71
72 dump_pagetable(gd->arch.tlb_addr, get_tcr(NULL, NULL));
73
74.. kernel-doc:: arch/arm/cpu/armv8/cache_v8.c
75 :identifiers: __pagetable_walk pagetable_print_entry
76
77The pagetable walker can be used as follows:
78
79.. kernel-doc:: arch/arm/include/asm/armv8/mmu.h
80 :identifiers: pte_walker_cb_t walk_pagetable dump_pagetable
81
82This will result in a print like the following:
83
84.. code-block:: text
85
86 Walking pagetable at 000000017df90000, va_bits: 36. Using 3 levels
87 [0x17df91000] | Table | |
88 [0x17df92000] | Table | |
89 [0x000001000 - 0x000200000] | Pages | Device-nGnRnE | Non-shareable
90 [0x000200000 - 0x040000000] | Block | Device-nGnRnE | Non-shareable
91 [0x040000000 - 0x080000000] | Block | Device-nGnRnE | Non-shareable
92 [0x080000000 - 0x140000000] | Block | Normal | Inner-shareable
93 [0x17df93000] | Table | |
94 [0x140000000 - 0x17de00000] | Block | Normal | Inner-shareable
95 [0x17df94000] | Table | |
96 [0x17de00000 - 0x17dfa0000] | Pages | Normal | Inner-shareable
97
98For more information, please refer to the additional function documentation in
99``arch/arm/include/asm/armv8/mmu.h``.
Sergey Temerkhanov78eaa492015-10-14 09:55:45 -0700100
Andre Przywara920e04d2016-11-03 01:01:50 +0000101Contributors
Bin Mengdde9c782019-07-18 00:34:27 -0700102------------
103 * Tom Rini <trini@ti.com>
104 * Scott Wood <scottwood@freescale.com>
105 * York Sun <yorksun@freescale.com>
106 * Simon Glass <sjg@chromium.org>
107 * Sharma Bhupesh <bhupesh.sharma@freescale.com>
108 * Rob Herring <robherring2@gmail.com>
109 * Sergey Temerkhanov <s.temerkhanov@gmail.com>