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Lokesh Vutlae8e92b82015-09-19 16:26:55 +05301/*
2 * Copyright 2014 Texas Instruments, Inc.
3 *
Lokesh Vutlae3187b92017-01-31 09:32:57 +05304 * Device Tree Source for K2G SOC
Lokesh Vutlae8e92b82015-09-19 16:26:55 +05305 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <dt-bindings/interrupt-controller/arm-gic.h>
Lokesh Vutlae8e92b82015-09-19 16:26:55 +053012
13/ {
Lokesh Vutlae3187b92017-01-31 09:32:57 +053014 model = "Texas Instruments K2G SoC";
Lokesh Vutlae8e92b82015-09-19 16:26:55 +053015 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&gic>;
18
Cooper Jr., Franklin98561122017-06-16 17:25:28 -050019 chosen { };
20
Lokesh Vutlae8e92b82015-09-19 16:26:55 +053021 aliases {
22 serial0 = &uart0;
Vignesh Rcefb8f32016-07-06 09:59:05 +053023 spi0 = &spi0;
24 spi1 = &spi1;
25 spi2 = &spi2;
26 spi3 = &spi3;
Vignesh R9b9f0f82016-07-06 10:20:57 +053027 spi4 = &qspi;
Cooper Jr., Franklin4fd14ad2017-04-20 10:25:46 -050028 i2c0 = &i2c0;
29 i2c1 = &i2c1;
30 i2c2 = &i2c2;
Lokesh Vutlae8e92b82015-09-19 16:26:55 +053031 };
32
33 memory {
34 device_type = "memory";
35 reg = <0x80000000 0x80000000>;
36 };
37
38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
41
42 interrupt-parent = <&gic>;
43
44 cpu@0 {
45 compatible = "arm,cortex-a15";
46 device_type = "cpu";
47 reg = <0>;
48 };
49 };
50
51 gic: interrupt-controller {
52 compatible = "arm,cortex-a15-gic";
53 #interrupt-cells = <3>;
54 interrupt-controller;
55 reg = <0x0 0x02561000 0x0 0x1000>,
56 <0x0 0x02562000 0x0 0x2000>,
57 <0x0 0x02564000 0x0 0x1000>,
58 <0x0 0x02566000 0x0 0x2000>;
59 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
60 IRQ_TYPE_LEVEL_HIGH)>;
61 };
62
63 soc {
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "ti,keystone","simple-bus";
67 interrupt-parent = <&gic>;
68 ranges;
69
70 uart0: serial@02530c00 {
71 compatible = "ns16550a";
72 current-speed = <115200>;
73 reg-shift = <2>;
74 reg-io-width = <4>;
75 reg = <0x02530c00 0x100>;
76 clock-names = "uart";
77 interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
78 };
79
Mugunthan V N3784cc22016-02-02 15:51:37 +053080 mdio: mdio@4200f00 {
81 compatible = "ti,keystone_mdio", "ti,davinci_mdio";
82 #address-cells = <1>;
83 #size-cells = <0>;
84 /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */
85 /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */
86 clock-names = "fck";
87 reg = <0x04200f00 0x100>;
88 status = "disabled";
89 bus_freq = <2500000>;
90 };
91
Vignesh R9b9f0f82016-07-06 10:20:57 +053092 qspi: qspi@2940000 {
93 compatible = "cadence,qspi";
94 #address-cells = <1>;
95 #size-cells = <0>;
96 reg = <0x02940000 0x1000>,
97 <0x24000000 0x4000000>;
98 interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
99 num-cs = <4>;
100 fifo-depth = <256>;
101 sram-size = <256>;
102 status = "disabled";
103 };
104
Lokesh Vutlae3187b92017-01-31 09:32:57 +0530105 #include "keystone-k2g-netcp.dtsi"
Nishanth Menon715137c2016-02-25 12:53:46 -0600106
107 pmmc: pmmc@2900000 {
108 compatible = "ti,power-processor";
109 reg = <0x02900000 0x40000>;
110 ti,lpsc_module = <1>;
111 };
112
Vignesh Rcefb8f32016-07-06 09:59:05 +0530113 spi0: spi@21805400 {
114 compatible = "ti,keystone-spi", "ti,dm6441-spi";
115 reg = <0x21805400 0x200>;
116 num-cs = <4>;
117 ti,davinci-spi-intr-line = <0>;
118 interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
119 #address-cells = <1>;
120 #size-cells = <0>;
121 status = "disabled";
122 };
123
124 spi1: spi@21805800 {
125 compatible = "ti,keystone-spi", "ti,dm6441-spi";
126 reg = <0x21805800 0x200>;
127 num-cs = <4>;
128 ti,davinci-spi-intr-line = <0>;
129 interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
130 #address-cells = <1>;
131 #size-cells = <0>;
132 status = "disabled";
133 };
134
135 spi2: spi@21805c00 {
136 compatible = "ti,keystone-spi", "ti,dm6441-spi";
137 reg = <0x21805C00 0x200>;
138 num-cs = <4>;
139 ti,davinci-spi-intr-line = <0>;
140 interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
141 #address-cells = <1>;
142 #size-cells = <0>;
143 status = "disabled";
144 };
145
146 spi3: spi@21806000 {
147 compatible = "ti,keystone-spi", "ti,dm6441-spi";
148 reg = <0x21806000 0x200>;
149 num-cs = <4>;
150 ti,davinci-spi-intr-line = <0>;
151 interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
152 #address-cells = <1>;
153 #size-cells = <0>;
154 status = "disabled";
155 };
Cooper Jr., Franklin4fd14ad2017-04-20 10:25:46 -0500156 i2c0: i2c@2530000 {
157 compatible = "ti,keystone-i2c";
158 reg = <0x02530000 0x400>;
159 clock-frequency = <100000>;
160 interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
161 #address-cells = <1>;
162 #size-cells = <0>;
163 status = "disabled";
164 };
165
166 i2c1: i2c@2530400 {
167 compatible = "ti,keystone-i2c";
168 reg = <0x02530400 0x400>;
169 clock-frequency = <100000>;
170 interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
171 #address-cells = <1>;
172 #size-cells = <0>;
173 status = "disabled";
174 };
175
176 i2c2: i2c@2530800 {
177 compatible = "ti,keystone-i2c";
178 reg = <0x02530800 0x400>;
179 clock-frequency = <100000>;
180 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
181 #address-cells = <1>;
182 #size-cells = <0>;
183 status = "disabled";
184 };
Sekhar Nori0d368c02016-08-10 19:24:04 +0530185
186 mmc0: mmc@23000000 {
187 compatible = "ti,omap4-hsmmc";
188 reg = <0x23000000 0x400>;
189 interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
190 bus-width = <4>;
191 ti,needs-special-reset;
192 no-1-8-v;
193 max-frequency = <96000000>;
194 status = "disabled";
195 };
196
197 mmc1: mmc@23100000 {
198 compatible = "ti,omap4-hsmmc";
199 reg = <0x23100000 0x400>;
200 interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
201 bus-width = <8>;
202 ti,needs-special-reset;
203 ti,non-removable;
204 max-frequency = <96000000>;
205 status = "disabled";
206 clock-names = "fck";
207 };
Lokesh Vutlae8e92b82015-09-19 16:26:55 +0530208 };
209};