Ruchika Gupta | 29c1a6b | 2015-01-23 16:01:55 +0530 | [diff] [blame] | 1 | config FSL_CAAM |
| 2 | bool "Freescale Crypto Driver Support" |
Tom Rini | 5bdd919 | 2017-05-15 12:17:49 -0400 | [diff] [blame] | 3 | select SHA_HW_ACCEL |
Simon Glass | 027608e | 2017-05-17 03:25:25 -0600 | [diff] [blame] | 4 | imply CMD_HASH |
Ruchika Gupta | 29c1a6b | 2015-01-23 16:01:55 +0530 | [diff] [blame] | 5 | help |
| 6 | Enables the Freescale's Cryptographic Accelerator and Assurance |
| 7 | Module (CAAM), also known as the SEC version 4 (SEC4). The driver uses |
| 8 | Job Ring as interface to communicate with CAAM. |
York Sun | 92c36e2 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 9 | |
| 10 | config SYS_FSL_HAS_SEC |
| 11 | bool |
| 12 | help |
| 13 | Enable Freescale Secure Boot and Trusted Architecture |
| 14 | |
| 15 | config SYS_FSL_SEC_COMPAT_2 |
| 16 | bool |
| 17 | help |
| 18 | Secure boot and trust architecture compatible version 2 |
| 19 | |
| 20 | config SYS_FSL_SEC_COMPAT_4 |
| 21 | bool |
| 22 | help |
| 23 | Secure boot and trust architecture compatible version 4 |
| 24 | |
| 25 | config SYS_FSL_SEC_COMPAT_5 |
| 26 | bool |
| 27 | help |
| 28 | Secure boot and trust architecture compatible version 5 |
| 29 | |
| 30 | config SYS_FSL_SEC_COMPAT_6 |
| 31 | bool |
| 32 | help |
| 33 | Secure boot and trust architecture compatible version 6 |
| 34 | |
York Sun | fa419942 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 35 | config SYS_FSL_SEC_BE |
| 36 | bool "Big-endian access to Freescale Secure Boot" |
| 37 | |
York Sun | 92c36e2 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 38 | config SYS_FSL_SEC_COMPAT |
| 39 | int "Freescale Secure Boot compatibility" |
| 40 | depends on SYS_FSL_HAS_SEC |
| 41 | default 2 if SYS_FSL_SEC_COMPAT_2 |
| 42 | default 4 if SYS_FSL_SEC_COMPAT_4 |
| 43 | default 5 if SYS_FSL_SEC_COMPAT_5 |
| 44 | default 6 if SYS_FSL_SEC_COMPAT_6 |
York Sun | fa419942 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 45 | |
| 46 | config SYS_FSL_SEC_LE |
| 47 | bool "Little-endian access to Freescale Secure Boot" |
Michael Walle | b258eb2 | 2020-06-27 22:58:53 +0200 | [diff] [blame] | 48 | |
| 49 | if FSL_CAAM |
| 50 | |
| 51 | config FSL_CAAM_RNG |
| 52 | bool "Enable Random Number Generator support" |
| 53 | depends on DM_RNG |
| 54 | default y |
| 55 | help |
| 56 | Enable support for the hardware based random number generator |
| 57 | module of the CAAM. The random data is fetched from the DRGB |
| 58 | using the prediction resistance flag which means the DRGB is |
| 59 | reseeded from the TRNG every time random data is generated. |
| 60 | |
| 61 | endif |