Aaron Williams | 46db382 | 2020-08-20 07:22:03 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2020 Stefan Roese <sr@denx.de> |
| 4 | */ |
| 5 | |
| 6 | #include <command.h> |
| 7 | #include <config.h> |
| 8 | #include <cpu_func.h> |
| 9 | #include <dm.h> |
| 10 | #include <elf.h> |
| 11 | #include <env.h> |
| 12 | #include <ram.h> |
| 13 | |
| 14 | #include <asm/io.h> |
| 15 | #include <linux/compat.h> |
| 16 | #include <linux/ctype.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/io.h> |
| 19 | |
| 20 | #include <mach/cvmx-coremask.h> |
| 21 | #include <mach/cvmx-bootinfo.h> |
| 22 | #include <mach/cvmx-bootmem.h> |
| 23 | #include <mach/cvmx-regs.h> |
| 24 | #include <mach/cvmx-fuse.h> |
| 25 | #include <mach/octeon-model.h> |
| 26 | #include <mach/octeon-feature.h> |
| 27 | #include <mach/bootoct_cmd.h> |
| 28 | |
| 29 | DECLARE_GLOBAL_DATA_PTR; |
| 30 | |
| 31 | /* ToDo: Revisit these settings */ |
| 32 | #define OCTEON_RESERVED_LOW_MEM_SIZE (512 * 1024) |
| 33 | #define OCTEON_RESERVED_LOW_BOOT_MEM_SIZE (1024 * 1024) |
| 34 | #define BOOTLOADER_BOOTMEM_DESC_SPACE (1024 * 1024) |
| 35 | |
| 36 | /* Default stack and heap sizes, in bytes */ |
| 37 | #define DEFAULT_STACK_SIZE (1 * 1024 * 1024) |
| 38 | #define DEFAULT_HEAP_SIZE (3 * 1024 * 1024) |
| 39 | |
| 40 | /** |
| 41 | * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain |
| 42 | * octeon-app-init.h file. |
| 43 | */ |
| 44 | enum { |
| 45 | /* If set, core should do app-wide init, only one core per app will have |
| 46 | * this flag set. |
| 47 | */ |
| 48 | BOOT_FLAG_INIT_CORE = 1, |
| 49 | OCTEON_BL_FLAG_DEBUG = 1 << 1, |
| 50 | OCTEON_BL_FLAG_NO_MAGIC = 1 << 2, |
| 51 | /* If set, use uart1 for console */ |
| 52 | OCTEON_BL_FLAG_CONSOLE_UART1 = 1 << 3, |
| 53 | OCTEON_BL_FLAG_CONSOLE_PCI = 1 << 4, /* If set, use PCI console */ |
| 54 | /* Call exit on break on serial port */ |
| 55 | OCTEON_BL_FLAG_BREAK = 1 << 5, |
| 56 | /* |
| 57 | * Be sure to update OCTEON_APP_INIT_H_VERSION when new fields are added |
| 58 | * and to conditionalize the new flag's usage based on the version. |
| 59 | */ |
| 60 | } octeon_boot_descriptor_flag; |
| 61 | |
| 62 | /** |
| 63 | * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain |
| 64 | * octeon-app-init.h file. |
| 65 | */ |
| 66 | #ifndef OCTEON_CURRENT_DESC_VERSION |
| 67 | # define OCTEON_CURRENT_DESC_VERSION 7 |
| 68 | #endif |
| 69 | /** |
| 70 | * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain |
| 71 | * octeon-app-init.h file. |
| 72 | */ |
| 73 | /* Version 7 changes: Change names of deprecated fields */ |
| 74 | #ifndef OCTEON_ARGV_MAX_ARGS |
| 75 | # define OCTEON_ARGV_MAX_ARGS 64 |
| 76 | #endif |
| 77 | |
| 78 | /** |
| 79 | * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain |
| 80 | * octeon-app-init.h file. |
| 81 | */ |
| 82 | #ifndef OCTEON_SERIAL_LEN |
| 83 | # define OCTEON_SERIAL_LEN 20 |
| 84 | #endif |
| 85 | |
| 86 | /** |
| 87 | * Bootloader structure used to pass info to Octeon executive startup code. |
| 88 | * NOTE: all fields are deprecated except for: |
| 89 | * * desc_version |
| 90 | * * desc_size, |
| 91 | * * heap_base |
| 92 | * * heap_end |
| 93 | * * eclock_hz |
| 94 | * * flags |
| 95 | * * argc |
| 96 | * * argv |
| 97 | * * cvmx_desc_vaddr |
| 98 | * * debugger_flags_base_addr |
| 99 | * |
| 100 | * All other fields have been moved to the cvmx_descriptor, and the new |
| 101 | * fields should be added there. They are left as placeholders in this |
| 102 | * structure for binary compatibility. |
| 103 | * |
| 104 | * NOTE: This structure must match what is in the toolchain octeon-app-init.h |
| 105 | * file. |
| 106 | */ |
| 107 | struct octeon_boot_descriptor { |
| 108 | /* Start of block referenced by assembly code - do not change! */ |
| 109 | u32 desc_version; |
| 110 | u32 desc_size; |
| 111 | u64 stack_top; |
| 112 | u64 heap_base; |
| 113 | u64 heap_end; |
| 114 | u64 deprecated17; |
| 115 | u64 deprecated16; |
| 116 | /* End of block referenced by assembly code - do not change! */ |
| 117 | u32 deprecated18; |
| 118 | u32 deprecated15; |
| 119 | u32 deprecated14; |
| 120 | u32 argc; /* argc for main() */ |
| 121 | u32 argv[OCTEON_ARGV_MAX_ARGS]; /* argv for main() */ |
| 122 | u32 flags; /* Flags for application */ |
| 123 | u32 core_mask; /* Coremask running this image */ |
| 124 | u32 dram_size; /* DEPRECATED, DRAM size in megabyes. Used up to SDK 1.8.1 */ |
| 125 | u32 phy_mem_desc_addr; |
| 126 | u32 debugger_flags_base_addr; /* used to pass flags from app to debugger. */ |
| 127 | u32 eclock_hz; /* CPU clock speed, in hz. */ |
| 128 | u32 deprecated10; |
| 129 | u32 deprecated9; |
| 130 | u16 deprecated8; |
| 131 | u8 deprecated7; |
| 132 | u8 deprecated6; |
| 133 | u16 deprecated5; |
| 134 | u8 deprecated4; |
| 135 | u8 deprecated3; |
| 136 | char deprecated2[OCTEON_SERIAL_LEN]; |
| 137 | u8 deprecated1[6]; |
| 138 | u8 deprecated0; |
| 139 | u64 cvmx_desc_vaddr; /* Address of cvmx descriptor */ |
| 140 | }; |
| 141 | |
| 142 | static struct octeon_boot_descriptor boot_desc[CVMX_MIPS_MAX_CORES]; |
| 143 | static struct cvmx_bootinfo cvmx_bootinfo_array[CVMX_MIPS_MAX_CORES]; |
| 144 | |
| 145 | /** |
| 146 | * Programs the boot bus moveable region |
| 147 | * @param base base address to place the boot bus moveable region |
| 148 | * (bits [31:7]) |
| 149 | * @param region_num Selects which region, 0 or 1 for node 0, |
| 150 | * 2 or 3 for node 1 |
| 151 | * @param enable Set true to enable, false to disable |
| 152 | * @param data Pointer to data to put in the region, up to |
| 153 | * 16 dwords. |
| 154 | * @param num_words Number of data dwords (up to 32) |
| 155 | * |
| 156 | * @return 0 for success, -1 on error |
| 157 | */ |
| 158 | static int octeon_set_moveable_region(u32 base, int region_num, |
| 159 | bool enable, const u64 *data, |
| 160 | unsigned int num_words) |
| 161 | { |
| 162 | int node = region_num >> 1; |
| 163 | u64 val; |
| 164 | int i; |
| 165 | u8 node_mask = 0x01; /* ToDo: Currently only one node is supported */ |
| 166 | |
| 167 | debug("%s(0x%x, %d, %d, %p, %u)\n", __func__, base, region_num, enable, |
| 168 | data, num_words); |
| 169 | |
| 170 | if (num_words > 32) { |
| 171 | printf("%s: Too many words (%d) for region %d\n", __func__, |
| 172 | num_words, region_num); |
| 173 | return -1; |
| 174 | } |
| 175 | |
| 176 | if (base & 0x7f) { |
| 177 | printf("%s: Error: base address 0x%x must be 128 byte aligned\n", |
| 178 | __func__, base); |
| 179 | return -1; |
| 180 | } |
| 181 | |
| 182 | if (region_num > (node_mask > 1 ? 3 : 1)) { |
| 183 | printf("%s: Region number %d out of range\n", |
| 184 | __func__, region_num); |
| 185 | return -1; |
| 186 | } |
| 187 | |
| 188 | if (!data && num_words > 0) { |
| 189 | printf("%s: Error: NULL data\n", __func__); |
| 190 | return -1; |
| 191 | } |
| 192 | |
| 193 | region_num &= 1; |
| 194 | |
| 195 | val = MIO_BOOT_LOC_CFG_EN | |
| 196 | FIELD_PREP(MIO_BOOT_LOC_CFG_BASE, base >> 7); |
| 197 | debug("%s: Setting MIO_BOOT_LOC_CFG(%d) on node %d to 0x%llx\n", |
| 198 | __func__, region_num, node, val); |
| 199 | csr_wr(CVMX_MIO_BOOT_LOC_CFGX(region_num & 1), val); |
| 200 | |
| 201 | val = FIELD_PREP(MIO_BOOT_LOC_ADR_ADR, (region_num ? 0x80 : 0x00) >> 3); |
| 202 | debug("%s: Setting MIO_BOOT_LOC_ADR start to 0x%llx\n", __func__, val); |
| 203 | csr_wr(CVMX_MIO_BOOT_LOC_ADR, val); |
| 204 | |
| 205 | for (i = 0; i < num_words; i++) { |
| 206 | debug(" 0x%02llx: 0x%016llx\n", |
| 207 | csr_rd(CVMX_MIO_BOOT_LOC_ADR), data[i]); |
| 208 | csr_wr(CVMX_MIO_BOOT_LOC_DAT, data[i]); |
| 209 | } |
| 210 | |
| 211 | return 0; |
| 212 | } |
| 213 | |
| 214 | /** |
| 215 | * Parse comma separated numbers into an array |
| 216 | * |
| 217 | * @param[out] values values read for each node |
| 218 | * @param[in] str string to parse |
| 219 | * @param base 0 for auto, otherwise 8, 10 or 16 for the number base |
| 220 | * |
| 221 | * @return number of values read. |
| 222 | */ |
| 223 | static int octeon_parse_nodes(u64 values[CVMX_MAX_NODES], |
| 224 | const char *str, int base) |
| 225 | { |
| 226 | int node = 0; |
| 227 | char *sep; |
| 228 | |
| 229 | do { |
| 230 | debug("Parsing node %d: \"%s\"\n", node, str); |
| 231 | values[node] = simple_strtoull(str, &sep, base); |
| 232 | debug(" node %d: 0x%llx\n", node, values[node]); |
| 233 | str = sep + 1; |
| 234 | } while (++node < CVMX_MAX_NODES && *sep == ','); |
| 235 | |
| 236 | debug("%s: returning %d\n", __func__, node); |
| 237 | return node; |
| 238 | } |
| 239 | |
| 240 | /** |
| 241 | * Parse command line arguments |
| 242 | * |
| 243 | * @param argc number of arguments |
| 244 | * @param[in] argv array of argument strings |
| 245 | * @param cmd command type |
| 246 | * @param[out] boot_args parsed values |
| 247 | * |
| 248 | * @return number of arguments parsed |
| 249 | */ |
| 250 | int octeon_parse_bootopts(int argc, char *const argv[], |
| 251 | enum octeon_boot_cmd_type cmd, |
| 252 | struct octeon_boot_args *boot_args) |
| 253 | { |
| 254 | u64 node_values[CVMX_MAX_NODES]; |
| 255 | int arg, j; |
| 256 | int num_values; |
| 257 | int node; |
| 258 | u8 node_mask = 0x01; /* ToDo: Currently only one node is supported */ |
| 259 | |
| 260 | debug("%s(%d, %p, %d, %p)\n", __func__, argc, argv, cmd, boot_args); |
| 261 | memset(boot_args, 0, sizeof(*boot_args)); |
| 262 | boot_args->stack_size = DEFAULT_STACK_SIZE; |
| 263 | boot_args->heap_size = DEFAULT_HEAP_SIZE; |
| 264 | boot_args->node_mask = 0; |
| 265 | |
| 266 | for (arg = 0; arg < argc; arg++) { |
| 267 | debug(" argv[%d]: %s\n", arg, argv[arg]); |
| 268 | if (cmd == BOOTOCT && !strncmp(argv[arg], "stack=", 6)) { |
| 269 | boot_args->stack_size = simple_strtoul(argv[arg] + 6, |
| 270 | NULL, 0); |
| 271 | } else if (cmd == BOOTOCT && !strncmp(argv[arg], "heap=", 5)) { |
| 272 | boot_args->heap_size = simple_strtoul(argv[arg] + 5, |
| 273 | NULL, 0); |
| 274 | } else if (!strncmp(argv[arg], "debug", 5)) { |
| 275 | puts("setting debug flag!\n"); |
| 276 | boot_args->boot_flags |= OCTEON_BL_FLAG_DEBUG; |
| 277 | } else if (cmd == BOOTOCT && !strncmp(argv[arg], "break", 5)) { |
| 278 | puts("setting break flag!\n"); |
| 279 | boot_args->boot_flags |= OCTEON_BL_FLAG_BREAK; |
| 280 | } else if (!strncmp(argv[arg], "forceboot", 9)) { |
| 281 | boot_args->forceboot = true; |
| 282 | } else if (!strncmp(argv[arg], "nodemask=", 9)) { |
| 283 | boot_args->node_mask = simple_strtoul(argv[arg] + 9, |
| 284 | NULL, 16); |
| 285 | } else if (!strncmp(argv[arg], "numcores=", 9)) { |
| 286 | memset(node_values, 0, sizeof(node_values)); |
| 287 | num_values = octeon_parse_nodes(node_values, |
| 288 | argv[arg] + 9, 0); |
| 289 | for (j = 0; j < num_values; j++) |
| 290 | boot_args->num_cores[j] = node_values[j]; |
| 291 | boot_args->num_cores_set = true; |
| 292 | } else if (!strncmp(argv[arg], "skipcores=", 10)) { |
| 293 | memset(node_values, 0, sizeof(node_values)); |
| 294 | num_values = octeon_parse_nodes(node_values, |
| 295 | argv[arg] + 10, 0); |
| 296 | for (j = 0; j < num_values; j++) |
| 297 | boot_args->num_skipped[j] = node_values[j]; |
| 298 | boot_args->num_skipped_set = true; |
| 299 | } else if (!strncmp(argv[arg], "console_uart=", 13)) { |
| 300 | boot_args->console_uart = simple_strtoul(argv[arg] + 13, |
| 301 | NULL, 0); |
| 302 | if (boot_args->console_uart == 1) { |
| 303 | boot_args->boot_flags |= |
| 304 | OCTEON_BL_FLAG_CONSOLE_UART1; |
| 305 | } else if (!boot_args->console_uart) { |
| 306 | boot_args->boot_flags &= |
| 307 | ~OCTEON_BL_FLAG_CONSOLE_UART1; |
| 308 | } |
| 309 | } else if (!strncmp(argv[arg], "coremask=", 9)) { |
| 310 | memset(node_values, 0, sizeof(node_values)); |
| 311 | num_values = octeon_parse_nodes(node_values, |
| 312 | argv[arg] + 9, 16); |
| 313 | for (j = 0; j < num_values; j++) |
| 314 | cvmx_coremask_set64_node(&boot_args->coremask, |
| 315 | j, node_values[j]); |
| 316 | boot_args->coremask_set = true; |
| 317 | } else if (cmd == BOOTOCTLINUX && |
| 318 | !strncmp(argv[arg], "namedblock=", 11)) { |
| 319 | boot_args->named_block = argv[arg] + 11; |
| 320 | } else if (!strncmp(argv[arg], "endbootargs", 11)) { |
| 321 | boot_args->endbootargs = 1; |
| 322 | arg++; |
| 323 | if (argc >= arg && cmd != BOOTOCTLINUX) |
| 324 | boot_args->app_name = argv[arg]; |
| 325 | break; |
| 326 | } else { |
| 327 | debug(" Unknown argument \"%s\"\n", argv[arg]); |
| 328 | } |
| 329 | } |
| 330 | |
| 331 | if (boot_args->coremask_set && boot_args->num_cores_set) { |
| 332 | puts("Warning: both coremask and numcores are set, using coremask.\n"); |
| 333 | } else if (!boot_args->coremask_set && !boot_args->num_cores_set) { |
| 334 | cvmx_coremask_set_core(&boot_args->coremask, 0); |
| 335 | boot_args->coremask_set = true; |
| 336 | } else if ((!boot_args->coremask_set) && boot_args->num_cores_set) { |
| 337 | cvmx_coremask_for_each_node(node, node_mask) |
| 338 | cvmx_coremask_set64_node(&boot_args->coremask, node, |
| 339 | ((1ull << boot_args->num_cores[node]) - 1) << |
| 340 | boot_args->num_skipped[node]); |
| 341 | boot_args->coremask_set = true; |
| 342 | } |
| 343 | |
| 344 | /* Update the node mask based on the coremask or the number of cores */ |
| 345 | for (j = 0; j < CVMX_MAX_NODES; j++) { |
| 346 | if (cvmx_coremask_get64_node(&boot_args->coremask, j)) |
| 347 | boot_args->node_mask |= 1 << j; |
| 348 | } |
| 349 | |
| 350 | debug("%s: return %d\n", __func__, arg); |
| 351 | return arg; |
| 352 | } |
| 353 | |
| 354 | int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc, |
| 355 | char *const argv[]) |
| 356 | { |
| 357 | typedef void __noreturn (*kernel_entry_t)(int, ulong, ulong, ulong); |
| 358 | kernel_entry_t kernel; |
| 359 | struct octeon_boot_args boot_args; |
| 360 | int arg_start = 1; |
| 361 | int arg_count; |
| 362 | u64 addr = 0; /* Address of the ELF image */ |
| 363 | int arg0; |
| 364 | u64 arg1; |
| 365 | u64 arg2; |
| 366 | u64 arg3; |
| 367 | int ret; |
| 368 | struct cvmx_coremask core_mask; |
| 369 | struct cvmx_coremask coremask_to_run; |
| 370 | struct cvmx_coremask avail_coremask; |
| 371 | int first_core; |
| 372 | int core; |
| 373 | struct ram_info ram; |
| 374 | struct udevice *dev; |
| 375 | const u64 *nmi_code; |
| 376 | int num_dwords; |
| 377 | u8 node_mask = 0x01; |
| 378 | int i; |
| 379 | |
| 380 | cvmx_coremask_clear_all(&core_mask); |
| 381 | cvmx_coremask_clear_all(&coremask_to_run); |
| 382 | |
| 383 | if (argc >= 2 && (isxdigit(argv[1][0]) && (isxdigit(argv[1][1]) || |
| 384 | argv[1][1] == 'x' || |
| 385 | argv[1][1] == 'X' || |
| 386 | argv[1][1] == '\0'))) { |
| 387 | addr = simple_strtoul(argv[1], NULL, 16); |
| 388 | if (!addr) |
| 389 | addr = CONFIG_SYS_LOAD_ADDR; |
| 390 | arg_start++; |
| 391 | } |
| 392 | if (addr == 0) |
| 393 | addr = CONFIG_SYS_LOAD_ADDR; |
| 394 | |
| 395 | debug("%s: arg start: %d\n", __func__, arg_start); |
| 396 | arg_count = octeon_parse_bootopts(argc - arg_start, argv + arg_start, |
| 397 | BOOTOCTLINUX, &boot_args); |
| 398 | |
| 399 | debug("%s:\n" |
| 400 | " named block: %s\n" |
| 401 | " node mask: 0x%x\n" |
| 402 | " stack size: 0x%x\n" |
| 403 | " heap size: 0x%x\n" |
| 404 | " boot flags: 0x%x\n" |
| 405 | " force boot: %s\n" |
| 406 | " coremask set: %s\n" |
| 407 | " num cores set: %s\n" |
| 408 | " num skipped set: %s\n" |
| 409 | " endbootargs: %s\n", |
| 410 | __func__, |
| 411 | boot_args.named_block ? boot_args.named_block : "none", |
| 412 | boot_args.node_mask, |
| 413 | boot_args.stack_size, |
| 414 | boot_args.heap_size, |
| 415 | boot_args.boot_flags, |
| 416 | boot_args.forceboot ? "true" : "false", |
| 417 | boot_args.coremask_set ? "true" : "false", |
| 418 | boot_args.num_cores_set ? "true" : "false", |
| 419 | boot_args.num_skipped_set ? "true" : "false", |
| 420 | boot_args.endbootargs ? "true" : "false"); |
| 421 | debug(" num cores: "); |
| 422 | for (i = 0; i < CVMX_MAX_NODES; i++) |
| 423 | debug("%s%d", i > 0 ? ", " : "", boot_args.num_cores[i]); |
| 424 | debug("\n num skipped: "); |
| 425 | for (i = 0; i < CVMX_MAX_NODES; i++) { |
| 426 | debug("%s%d", i > 0 ? ", " : "", boot_args.num_skipped[i]); |
| 427 | debug("\n coremask:\n"); |
| 428 | cvmx_coremask_dprint(&boot_args.coremask); |
| 429 | } |
| 430 | |
| 431 | if (boot_args.endbootargs) { |
| 432 | debug("endbootargs set, adjusting argc from %d to %d, arg_count: %d, arg_start: %d\n", |
| 433 | argc, argc - (arg_count + arg_start), arg_count, |
| 434 | arg_start); |
| 435 | argc -= (arg_count + arg_start); |
| 436 | argv += (arg_count + arg_start); |
| 437 | } |
| 438 | |
| 439 | /* |
| 440 | * numcores specification overrides a coremask on the same command line |
| 441 | */ |
| 442 | cvmx_coremask_copy(&core_mask, &boot_args.coremask); |
| 443 | |
| 444 | /* |
| 445 | * Remove cores from coremask based on environment variable stored in |
| 446 | * flash |
| 447 | */ |
| 448 | if (validate_coremask(&core_mask) != 0) { |
| 449 | puts("Invalid coremask.\n"); |
| 450 | return 1; |
| 451 | } else if (cvmx_coremask_is_empty(&core_mask)) { |
| 452 | puts("Coremask is empty after coremask_override mask. Nothing to do.\n"); |
| 453 | return 0; |
| 454 | } |
| 455 | |
| 456 | if (cvmx_coremask_intersects(&core_mask, &coremask_to_run)) { |
| 457 | puts("ERROR: Can't load code on core twice! Provided coremask:\n"); |
| 458 | cvmx_coremask_print(&core_mask); |
| 459 | puts("overlaps previously loaded coremask:\n"); |
| 460 | cvmx_coremask_print(&coremask_to_run); |
| 461 | return -1; |
| 462 | } |
| 463 | |
| 464 | debug("Setting up boot descriptor block with core mask:\n"); |
| 465 | cvmx_coremask_dprint(&core_mask); |
| 466 | |
| 467 | /* |
| 468 | * Add coremask to global mask of cores that have been set up and are |
| 469 | * runable |
| 470 | */ |
| 471 | cvmx_coremask_or(&coremask_to_run, &coremask_to_run, &core_mask); |
| 472 | |
| 473 | /* Get RAM size */ |
| 474 | ret = uclass_get_device(UCLASS_RAM, 0, &dev); |
| 475 | if (ret) { |
| 476 | debug("DRAM init failed: %d\n", ret); |
| 477 | return ret; |
| 478 | } |
| 479 | |
| 480 | ret = ram_get_info(dev, &ram); |
| 481 | if (ret) { |
| 482 | debug("Cannot get DRAM size: %d\n", ret); |
| 483 | return ret; |
| 484 | } |
| 485 | |
| 486 | /* |
| 487 | * Load kernel ELF image, or try binary if ELF is not detected. |
| 488 | * This way the much smaller vmlinux.bin can also be started but |
| 489 | * has to be loaded at the correct address (ep as parameter). |
| 490 | */ |
| 491 | if (!valid_elf_image(addr)) |
| 492 | printf("Booting binary image instead (vmlinux.bin)...\n"); |
| 493 | else |
| 494 | addr = load_elf_image_shdr(addr); |
| 495 | |
| 496 | /* Set kernel entry point */ |
| 497 | kernel = (kernel_entry_t)addr; |
| 498 | |
| 499 | /* Init bootmem list for Linux kernel booting */ |
| 500 | if (!cvmx_bootmem_phy_mem_list_init( |
| 501 | ram.size, OCTEON_RESERVED_LOW_MEM_SIZE, |
| 502 | (void *)CKSEG0ADDR(BOOTLOADER_BOOTMEM_DESC_SPACE))) { |
| 503 | printf("FATAL: Error initializing free memory list\n"); |
| 504 | return 0; |
| 505 | } |
| 506 | |
| 507 | first_core = cvmx_coremask_get_first_core(&coremask_to_run); |
| 508 | |
| 509 | cvmx_coremask_for_each_core(core, &coremask_to_run) { |
| 510 | debug("%s: Activating core %d\n", __func__, core); |
| 511 | |
| 512 | cvmx_bootinfo_array[core].core_mask = |
| 513 | cvmx_coremask_get32(&coremask_to_run); |
| 514 | cvmx_coremask_copy(&cvmx_bootinfo_array[core].ext_core_mask, |
| 515 | &coremask_to_run); |
| 516 | |
| 517 | if (core == first_core) |
| 518 | cvmx_bootinfo_array[core].flags |= BOOT_FLAG_INIT_CORE; |
| 519 | |
| 520 | cvmx_bootinfo_array[core].dram_size = ram.size / (1024 * 1024); |
| 521 | |
| 522 | cvmx_bootinfo_array[core].dclock_hz = gd->mem_clk * 1000000; |
| 523 | cvmx_bootinfo_array[core].eclock_hz = gd->cpu_clk; |
| 524 | |
| 525 | cvmx_bootinfo_array[core].led_display_base_addr = 0; |
| 526 | cvmx_bootinfo_array[core].phy_mem_desc_addr = |
| 527 | ((u32)(u64)__cvmx_bootmem_internal_get_desc_ptr()) & |
| 528 | 0x7ffffff; |
| 529 | |
| 530 | cvmx_bootinfo_array[core].major_version = CVMX_BOOTINFO_MAJ_VER; |
| 531 | cvmx_bootinfo_array[core].minor_version = CVMX_BOOTINFO_MIN_VER; |
| 532 | cvmx_bootinfo_array[core].fdt_addr = virt_to_phys(gd->fdt_blob); |
| 533 | |
| 534 | boot_desc[core].dram_size = gd->ram_size / (1024 * 1024); |
| 535 | boot_desc[core].cvmx_desc_vaddr = |
| 536 | virt_to_phys(&cvmx_bootinfo_array[core]); |
| 537 | |
| 538 | boot_desc[core].desc_version = OCTEON_CURRENT_DESC_VERSION; |
| 539 | boot_desc[core].desc_size = sizeof(boot_desc[0]); |
| 540 | |
| 541 | boot_desc[core].flags = cvmx_bootinfo_array[core].flags; |
| 542 | boot_desc[core].eclock_hz = cvmx_bootinfo_array[core].eclock_hz; |
| 543 | |
| 544 | boot_desc[core].argc = argc; |
| 545 | for (i = 0; i < argc; i++) |
| 546 | boot_desc[core].argv[i] = (u32)virt_to_phys(argv[i]); |
| 547 | } |
| 548 | |
| 549 | core = 0; |
| 550 | arg0 = argc; |
| 551 | arg1 = (u64)argv; |
| 552 | arg2 = 0x1; /* Core 0 sets init core for Linux */ |
| 553 | arg3 = XKPHYS | virt_to_phys(&boot_desc[core]); |
| 554 | |
| 555 | debug("## Transferring control to Linux (at address %p) ...\n", kernel); |
| 556 | |
| 557 | /* |
| 558 | * Flush cache before jumping to application. Let's flush the |
| 559 | * whole SDRAM area, since we don't know the size of the image |
| 560 | * that was loaded. |
| 561 | */ |
| 562 | flush_cache(gd->ram_base, gd->ram_top - gd->ram_base); |
| 563 | |
| 564 | /* Take all cores out of reset */ |
| 565 | csr_wr(CVMX_CIU_PP_RST, 0); |
| 566 | sync(); |
| 567 | |
| 568 | /* Wait a short while for the other cores... */ |
| 569 | mdelay(100); |
| 570 | |
| 571 | /* Install boot code into moveable bus for NMI (other cores) */ |
| 572 | nmi_code = (const u64 *)nmi_bootvector; |
| 573 | num_dwords = (((u64)&nmi_handler_para[0] - (u64)nmi_code) + 7) / 8; |
| 574 | |
| 575 | ret = octeon_set_moveable_region(0x1fc00000, 0, true, nmi_code, |
| 576 | num_dwords); |
| 577 | if (ret) { |
| 578 | printf("Error installing NMI handler for SMP core startup\n"); |
| 579 | return 0; |
| 580 | } |
| 581 | |
| 582 | /* Write NMI handler parameters for Linux kernel booting */ |
| 583 | nmi_handler_para[0] = (u64)kernel; |
| 584 | nmi_handler_para[1] = arg0; |
| 585 | nmi_handler_para[2] = arg1; |
| 586 | nmi_handler_para[3] = 0; /* Don't set init core for secondary cores */ |
| 587 | nmi_handler_para[4] = arg3; |
| 588 | sync(); |
| 589 | |
| 590 | /* Wait a short while for the other cores... */ |
| 591 | mdelay(100); |
| 592 | |
| 593 | /* |
| 594 | * Cores have already been taken out of reset to conserve power. |
| 595 | * We need to send a NMI to get the cores out of their wait loop |
| 596 | */ |
| 597 | octeon_get_available_coremask(&avail_coremask); |
| 598 | debug("Available coremask:\n"); |
| 599 | cvmx_coremask_dprint(&avail_coremask); |
| 600 | debug("Starting coremask:\n"); |
| 601 | cvmx_coremask_dprint(&coremask_to_run); |
| 602 | debug("Sending NMIs to other cores\n"); |
| 603 | if (octeon_has_feature(OCTEON_FEATURE_CIU3)) { |
| 604 | u64 avail_cm; |
| 605 | int node; |
| 606 | |
| 607 | cvmx_coremask_for_each_node(node, node_mask) { |
| 608 | avail_cm = cvmx_coremask_get64_node(&avail_coremask, |
| 609 | node); |
| 610 | |
| 611 | if (avail_cm != 0) { |
| 612 | debug("Sending NMI to node %d, coremask=0x%llx, CIU3_NMI=0x%llx\n", |
| 613 | node, avail_cm, |
| 614 | (node > 0 ? -1ull : -2ull) & avail_cm); |
| 615 | csr_wr(CVMX_CIU3_NMI, |
| 616 | (node > 0 ? -1ull : -2ull) & avail_cm); |
| 617 | } |
| 618 | } |
| 619 | } else { |
| 620 | csr_wr(CVMX_CIU_NMI, |
| 621 | -2ull & cvmx_coremask_get64(&avail_coremask)); |
| 622 | } |
| 623 | debug("Done sending NMIs\n"); |
| 624 | |
| 625 | /* Wait a short while for the other cores... */ |
| 626 | mdelay(100); |
| 627 | |
| 628 | /* |
| 629 | * pass address parameter as argv[0] (aka command name), |
| 630 | * and all remaining args |
| 631 | * a0 = argc |
| 632 | * a1 = argv (32 bit physical addresses, not pointers) |
| 633 | * a2 = init core |
| 634 | * a3 = boot descriptor address |
| 635 | * a4/t0 = entry point (only used by assembly stub) |
| 636 | */ |
| 637 | kernel(arg0, arg1, arg2, arg3); |
| 638 | |
| 639 | return 0; |
| 640 | } |
| 641 | |
| 642 | U_BOOT_CMD(bootoctlinux, 32, 0, do_bootoctlinux, |
| 643 | "Boot from a linux ELF image in memory", |
| 644 | "elf_address [coremask=mask_to_run | numcores=core_cnt_to_run] " |
| 645 | "[forceboot] [skipcores=core_cnt_to_skip] [namedblock=name] [endbootargs] [app_args ...]\n" |
| 646 | "elf_address - address of ELF image to load. If 0, default load address\n" |
| 647 | " is used.\n" |
| 648 | "coremask - mask of cores to run on. Anded with coremask_override\n" |
| 649 | " environment variable to ensure only working cores are used\n" |
| 650 | "numcores - number of cores to run on. Runs on specified number of cores,\n" |
| 651 | " taking into account the coremask_override.\n" |
| 652 | "skipcores - only meaningful with numcores. Skips this many cores\n" |
| 653 | " (starting from 0) when loading the numcores cores.\n" |
| 654 | " For example, setting skipcores to 1 will skip core 0\n" |
| 655 | " and load the application starting at the next available core.\n" |
| 656 | "forceboot - if set, boots application even if core 0 is not in mask\n" |
| 657 | "namedblock - specifies a named block to load the kernel\n" |
| 658 | "endbootargs - if set, bootloader does not process any further arguments and\n" |
| 659 | " only passes the arguments that follow to the kernel.\n" |
| 660 | " If not set, the kernel gets the entire commnad line as\n" |
| 661 | " arguments.\n" "\n"); |