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git01.mediatek.com / filogic / uboot / 9800373fca6d8dfa452ebc5000fd007fc2ebf8b0 / . / board / esd / voh405 / u-boot.lds
blob: 3f230507af16e68f6888b890a4df918c8e208654 [file] [log] [blame]
stroesebe467a12003-09-12 08:42:13 +0000[diff] [blame]1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
25SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
26/* Do we need any of these for elf?
27 __DYNAMIC = 0; */
28SECTIONS
29{
30 .resetvec 0xFFFFFFFC :
31 {
32 *(.resetvec)
33 } = 0xffff
34
35 /* Read-only sections, merged into text segment: */
36 . = + SIZEOF_HEADERS;
37 .interp : { *(.interp) }
38 .hash : { *(.hash) }
39 .dynsym : { *(.dynsym) }
40 .dynstr : { *(.dynstr) }
41 .rel.text : { *(.rel.text) }
42 .rela.text : { *(.rela.text) }
43 .rel.data : { *(.rel.data) }
44 .rela.data : { *(.rela.data) }
45 .rel.rodata : { *(.rel.rodata) }
46 .rela.rodata : { *(.rela.rodata) }
47 .rel.got : { *(.rel.got) }
48 .rela.got : { *(.rela.got) }
49 .rel.ctors : { *(.rel.ctors) }
50 .rela.ctors : { *(.rela.ctors) }
51 .rel.dtors : { *(.rel.dtors) }
52 .rela.dtors : { *(.rela.dtors) }
53 .rel.bss : { *(.rel.bss) }
54 .rela.bss : { *(.rela.bss) }
55 .rel.plt : { *(.rel.plt) }
56 .rela.plt : { *(.rela.plt) }
57 .init : { *(.init) }
58 .plt : { *(.plt) }
59 .text :
60 {
61 /* WARNING - the following is hand-optimized to fit within */
62 /* the sector layout of our flash chips! XXX FIXME XXX */
63
64 cpu/ppc4xx/start.o (.text)
65 cpu/ppc4xx/traps.o (.text)
66 cpu/ppc4xx/interrupts.o (.text)
Stefan Roesef82271e2007-10-22 15:44:39 +0200[diff] [blame]67 cpu/ppc4xx/4xx_uart.o (.text)
stroesebe467a12003-09-12 08:42:13 +0000[diff] [blame]68 cpu/ppc4xx/cpu_init.o (.text)
69 cpu/ppc4xx/speed.o (.text)
Stefan Roese0c7ffc02005-08-16 18:18:00 +0200[diff] [blame]70 cpu/ppc4xx/4xx_enet.o (.text)
stroesebe467a12003-09-12 08:42:13 +0000[diff] [blame]71 common/dlmalloc.o (.text)
72 lib_generic/crc32.o (.text)
73 lib_ppc/extable.o (.text)
74 lib_generic/zlib.o (.text)
75
76/* . = env_offset;*/
77/* common/environment.o(.text)*/
78
79 *(.text)
80 *(.fixup)
81 *(.got1)
82 }
83 _etext = .;
84 PROVIDE (etext = .);
85 .rodata :
86 {
87 *(.rodata)
88 *(.rodata1)
89 *(.rodata.str1.4)
Wolfgang Denkaaa7c002005-12-12 16:06:05 +0100[diff] [blame]90 *(.eh_frame)
stroesebe467a12003-09-12 08:42:13 +0000[diff] [blame]91 }
92 .fini : { *(.fini) } =0
93 .ctors : { *(.ctors) }
94 .dtors : { *(.dtors) }
95
96 /* Read-write section, merged into data segment: */
97 . = (. + 0x00FF) & 0xFFFFFF00;
98 _erotext = .;
99 PROVIDE (erotext = .);
100 .reloc :
101 {
102 *(.got)
103 _GOT2_TABLE_ = .;
104 *(.got2)
105 _FIXUP_TABLE_ = .;
106 *(.fixup)
107 }
108 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
109 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
110
111 .data :
112 {
113 *(.data)
114 *(.data1)
115 *(.sdata)
116 *(.sdata2)
117 *(.dynamic)
118 CONSTRUCTORS
119 }
120 _edata = .;
121 PROVIDE (edata = .);
122
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]123 . = .;
stroesebe467a12003-09-12 08:42:13 +0000[diff] [blame]124 __u_boot_cmd_start = .;
125 .u_boot_cmd : { *(.u_boot_cmd) }
126 __u_boot_cmd_end = .;
127
128
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]129 . = .;
stroesebe467a12003-09-12 08:42:13 +0000[diff] [blame]130 __start___ex_table = .;
131 __ex_table : { *(__ex_table) }
132 __stop___ex_table = .;
133
134 . = ALIGN(256);
135 __init_begin = .;
136 .text.init : { *(.text.init) }
137 .data.init : { *(.data.init) }
138 . = ALIGN(256);
139 __init_end = .;
140
141 __bss_start = .;
Wolfgang Denk828a9782008-01-12 20:31:39 +0100[diff] [blame]142 .bss (NOLOAD) :
stroesebe467a12003-09-12 08:42:13 +0000[diff] [blame]143 {
144 *(.sbss) *(.scommon)
145 *(.dynbss)
146 *(.bss)
147 *(COMMON)
148 }
149 _end = . ;
150 PROVIDE (end = .);
151}