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Sascha Hauera5864c02008-03-26 20:41:17 +01001/*
2 * (C) Copyright 2004
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Kshitij Gupta <kshitij@ti.com>
6 *
Magnus Lilja69e84582008-04-15 19:09:10 +02007 * Configuration settings for the phyCORE-i.MX31 board.
Sascha Hauera5864c02008-03-26 20:41:17 +01008 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
Fabio Estevam9a4f80f2011-06-11 15:16:11 +000031#include <asm/arch/imx-regs.h>
32
Anatolij Gustschin97849572011-10-29 05:12:25 +000033/* High Level Configuration Options */
34#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
35#define CONFIG_MX31 /* in a mx31 */
Sascha Hauera5864c02008-03-26 20:41:17 +010036#define CONFIG_MX31_HCLK_FREQ 26000000
37#define CONFIG_MX31_CLK32 32000
38
39#define CONFIG_DISPLAY_CPUINFO
40#define CONFIG_DISPLAY_BOARDINFO
41
Anatolij Gustschin97849572011-10-29 05:12:25 +000042#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
43#define CONFIG_SETUP_MEMORY_TAGS
44#define CONFIG_INITRD_TAG
Sascha Hauera5864c02008-03-26 20:41:17 +010045
46/*
47 * Size of malloc() pool
48 */
Helmut Raiger0385c132011-10-12 23:16:29 +000049#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024)
Sascha Hauera5864c02008-03-26 20:41:17 +010050
51/*
52 * Hardware drivers
53 */
54
Anatolij Gustschin97849572011-10-29 05:12:25 +000055#define CONFIG_HARD_I2C
56#define CONFIG_I2C_MXC
57#define CONFIG_SYS_I2C_MX31_PORT2
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020058#define CONFIG_SYS_I2C_SPEED 100000
59#define CONFIG_SYS_I2C_SLAVE 0xfe
Sascha Hauera5864c02008-03-26 20:41:17 +010060
Anatolij Gustschin97849572011-10-29 05:12:25 +000061#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010062#define CONFIG_MXC_UART_BASE UART1_BASE
Sascha Hauera5864c02008-03-26 20:41:17 +010063
64/* allow to overwrite serial and ethaddr */
65#define CONFIG_ENV_OVERWRITE
66#define CONFIG_CONS_INDEX 1
67#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020068#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
Sascha Hauera5864c02008-03-26 20:41:17 +010069
70/***********************************************************
71 * Command definition
72 ***********************************************************/
73
74#include <config_cmd_default.h>
75
76#define CONFIG_CMD_PING
77#define CONFIG_CMD_EEPROM
78#define CONFIG_CMD_I2C
79
80#define CONFIG_BOOTDELAY 3
81
Anatolij Gustschin97849572011-10-29 05:12:25 +000082#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \
83 "1536k(kernel),-(root)"
Sascha Hauera5864c02008-03-26 20:41:17 +010084
85#define CONFIG_NETMASK 255.255.255.0
86#define CONFIG_IPADDR 192.168.23.168
87#define CONFIG_SERVERIP 192.168.23.2
88
Anatolij Gustschin97849572011-10-29 05:12:25 +000089#define CONFIG_EXTRA_ENV_SETTINGS \
90 "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
91 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
92 "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
93 "bootargs_flash=setenv bootargs $(bootargs) " \
94 "root=/dev/mtdblock2 rootfstype=jffs2\0" \
95 "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \
96 "bootcmd=run bootcmd_net\0" \
97 "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \
98 "tftpboot 0x80000000 $(uimage);bootm\0" \
99 "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \
100 "bootm 0x80000000\0" \
101 "unlock=yes\0" \
102 "mtdparts=" MTDPARTS_DEFAULT "\0" \
103 "prg_uboot=tftpboot 0x80000000 $(uboot);" \
104 "protect off 0xa0000000 +0x20000;" \
105 "erase 0xa0000000 +0x20000;" \
106 "cp.b 0x80000000 0xa0000000 $(filesize)\0" \
107 "prg_kernel=tftpboot 0x80000000 $(uimage);" \
108 "erase 0xa0040000 +0x180000;" \
109 "cp.b 0x80000000 0xa0040000 $(filesize)\0" \
110 "prg_jffs2=tftpboot 0x80000000 $(jffs2);" \
111 "erase 0xa01c0000 0xa1ffffff;" \
112 "cp.b 0x80000000 0xa01c0000 $(filesize)\0" \
113 "videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \
114 "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \
115 "sync:1241513985,vmode:0\0"
Sascha Hauera5864c02008-03-26 20:41:17 +0100116
117
Anatolij Gustschin97849572011-10-29 05:12:25 +0000118#define CONFIG_SMC911X
Ben Warrenfbfdd3a2009-07-20 22:01:11 -0700119#define CONFIG_SMC911X_BASE 0xa8000000
Anatolij Gustschin97849572011-10-29 05:12:25 +0000120#define CONFIG_SMC911X_32_BIT
Sascha Hauera5864c02008-03-26 20:41:17 +0100121
122/*
123 * Miscellaneous configurable options
124 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200125#define CONFIG_SYS_LONGHELP /* undef to save memory */
126#define CONFIG_SYS_PROMPT "uboot> "
Anatolij Gustschin97849572011-10-29 05:12:25 +0000127/* Console I/O Buffer Size */
128#define CONFIG_SYS_CBSIZE 256
Sascha Hauera5864c02008-03-26 20:41:17 +0100129/* Print Buffer Size */
Anatolij Gustschin97849572011-10-29 05:12:25 +0000130#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
131 sizeof(CONFIG_SYS_PROMPT) + 16)
132/* max number of command args */
133#define CONFIG_SYS_MAXARGS 16
134/* Boot Argument Buffer Size */
135#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Sascha Hauera5864c02008-03-26 20:41:17 +0100136
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200137#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
138#define CONFIG_SYS_MEMTEST_END 0x10000
Sascha Hauera5864c02008-03-26 20:41:17 +0100139
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200140#define CONFIG_SYS_LOAD_ADDR 0 /* default load address */
Sascha Hauera5864c02008-03-26 20:41:17 +0100141
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200142#define CONFIG_SYS_HZ 1000
Sascha Hauera5864c02008-03-26 20:41:17 +0100143
Anatolij Gustschin97849572011-10-29 05:12:25 +0000144#define CONFIG_CMDLINE_EDITING
Sascha Hauera5864c02008-03-26 20:41:17 +0100145
Anatolij Gustschin97849572011-10-29 05:12:25 +0000146/*
Sascha Hauera5864c02008-03-26 20:41:17 +0100147 * Stack sizes
148 *
149 * The stack sizes are set up in start.S using the settings below
150 */
151#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
152
Anatolij Gustschin97849572011-10-29 05:12:25 +0000153/*
Sascha Hauera5864c02008-03-26 20:41:17 +0100154 * Physical Memory Map
155 */
Anatolij Gustschin97849572011-10-29 05:12:25 +0000156#define CONFIG_NR_DRAM_BANKS 1
157#define PHYS_SDRAM_1 0x80000000
158#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
Fabio Estevam9a4f80f2011-06-11 15:16:11 +0000159#define CONFIG_BOARD_EARLY_INIT_F
160#define CONFIG_SYS_TEXT_BASE 0xA0000000
161
162#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
163#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
164#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
165#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
166 GENERATED_GBL_DATA_SIZE)
167#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
168 CONFIG_SYS_GBL_DATA_OFFSET)
Sascha Hauera5864c02008-03-26 20:41:17 +0100169
Anatolij Gustschin97849572011-10-29 05:12:25 +0000170/*
Sascha Hauera5864c02008-03-26 20:41:17 +0100171 * FLASH and environment organization
172 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200173#define CONFIG_SYS_FLASH_BASE 0xa0000000
Anatolij Gustschin97849572011-10-29 05:12:25 +0000174#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
175#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */
176/* Monitor at beginning of flash */
177#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
Sascha Hauera5864c02008-03-26 20:41:17 +0100178
Anatolij Gustschin97849572011-10-29 05:12:25 +0000179#define CONFIG_ENV_IS_IN_EEPROM
180#define CONFIG_ENV_OFFSET 0x00 /* env. starts here */
181#define CONFIG_ENV_SIZE 4096
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200182#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
Anatolij Gustschin97849572011-10-29 05:12:25 +0000183#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */
184#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */
185#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */
Sascha Hauera5864c02008-03-26 20:41:17 +0100186
Anatolij Gustschin97849572011-10-29 05:12:25 +0000187/*
Sascha Hauera5864c02008-03-26 20:41:17 +0100188 * CFI FLASH driver setup
189 */
Anatolij Gustschin97849572011-10-29 05:12:25 +0000190#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
191#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */
192#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */
193#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
Sascha Hauera5864c02008-03-26 20:41:17 +0100194
Anatolij Gustschin97849572011-10-29 05:12:25 +0000195/*
196 * Timeout for Flash Erase and Flash Write
197 * timeout values are in ticks
198 */
199#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ)
200#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ)
Sascha Hauera5864c02008-03-26 20:41:17 +0100201
202/*
203 * JFFS2 partitions
204 */
Stefan Roeseb1423dd2009-03-19 13:30:36 +0100205#undef CONFIG_CMD_MTDPARTS
Sascha Hauera5864c02008-03-26 20:41:17 +0100206#define CONFIG_JFFS2_DEV "nor0"
207
Guennadi Liakhovetskie99f10a2009-02-24 10:44:02 +0100208/* EET platform additions */
209#ifdef CONFIG_IMX31_PHYCORE_EET
Helmut Raigerd5a184b2011-10-20 04:19:47 +0000210#define CONFIG_BOARD_LATE_INIT
Guennadi Liakhovetskie99f10a2009-02-24 10:44:02 +0100211
Stefano Babicd77fe992010-07-06 17:05:06 +0200212#define CONFIG_MXC_GPIO
Guennadi Liakhovetskie99f10a2009-02-24 10:44:02 +0100213
Anatolij Gustschin97849572011-10-29 05:12:25 +0000214#define CONFIG_HARD_SPI
215#define CONFIG_MXC_SPI
Guennadi Liakhovetskie99f10a2009-02-24 10:44:02 +0100216#define CONFIG_CMD_SPI
217
Anatolij Gustschin97849572011-10-29 05:12:25 +0000218#define CONFIG_S6E63D6
Guennadi Liakhovetskie99f10a2009-02-24 10:44:02 +0100219
Helmut Raiger0385c132011-10-12 23:16:29 +0000220#define CONFIG_VIDEO
221#define CONFIG_CFB_CONSOLE
222#define CONFIG_VIDEO_MX3
223#define CONFIG_VIDEO_LOGO
224#define CONFIG_VIDEO_SW_CURSOR
225#define CONFIG_VGA_AS_SINGLE_DEVICE
226#define CONFIG_SYS_CONSOLE_IS_IN_ENV
227#define CONFIG_SPLASH_SCREEN
228#define CONFIG_CMD_BMP
229#define CONFIG_BMP_16BPP
Guennadi Liakhovetskie99f10a2009-02-24 10:44:02 +0100230#endif
231
Sascha Hauera5864c02008-03-26 20:41:17 +0100232#endif /* __CONFIG_H */