Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only OR MIT |
| 2 | /* |
| 3 | * Infotainment Expansion Board for j721e-evm |
| 4 | * User Guide: <https://www.ti.com/lit/ug/spruit0a/spruit0a.pdf> |
| 5 | * |
| 6 | * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ |
| 7 | */ |
| 8 | |
| 9 | /dts-v1/; |
| 10 | /plugin/; |
| 11 | |
| 12 | #include <dt-bindings/gpio/gpio.h> |
| 13 | #include <dt-bindings/interrupt-controller/irq.h> |
| 14 | |
| 15 | #include "k3-pinctrl.h" |
| 16 | |
| 17 | &{/} { |
| 18 | hdmi-connector { |
| 19 | compatible = "hdmi-connector"; |
| 20 | label = "hdmi"; |
| 21 | type = "a"; |
| 22 | ddc-i2c-bus = <&main_i2c1>; |
| 23 | digital; |
| 24 | /* P12 - HDMI_HPD */ |
| 25 | hpd-gpios = <&exp6 10 GPIO_ACTIVE_HIGH>; |
| 26 | |
| 27 | port { |
| 28 | hdmi_connector_in: endpoint { |
| 29 | remote-endpoint = <&tfp410_out>; |
| 30 | }; |
| 31 | }; |
| 32 | }; |
| 33 | |
| 34 | dvi-bridge { |
| 35 | #address-cells = <1>; |
| 36 | #size-cells = <0>; |
| 37 | compatible = "ti,tfp410"; |
| 38 | /* P10 - HDMI_PDn */ |
| 39 | powerdown-gpios = <&exp6 8 GPIO_ACTIVE_LOW>; |
| 40 | |
| 41 | port@0 { |
| 42 | reg = <0>; |
| 43 | |
| 44 | tfp410_in: endpoint { |
| 45 | remote-endpoint = <&dpi_out0>; |
| 46 | pclk-sample = <1>; |
| 47 | }; |
| 48 | }; |
| 49 | |
| 50 | port@1 { |
| 51 | reg = <1>; |
| 52 | |
| 53 | tfp410_out: endpoint { |
| 54 | remote-endpoint = |
| 55 | <&hdmi_connector_in>; |
| 56 | }; |
| 57 | }; |
| 58 | }; |
| 59 | }; |
| 60 | |
| 61 | &main_pmx0 { |
| 62 | main_i2c1_exp6_pins_default: main-i2c1-exp6-default-pins { |
| 63 | pinctrl-single,pins = < |
| 64 | J721E_IOPAD(0x264, PIN_INPUT, 7) /* (T29) MMC2_DAT2.GPIO1_24 */ |
| 65 | >; |
| 66 | }; |
| 67 | |
| 68 | dss_vout0_pins_default: dss-vout0-default-pins { |
| 69 | pinctrl-single,pins = < |
| 70 | J721E_IOPAD(0x58, PIN_OUTPUT, 10) /* (AE22) PRG1_PRU1_GPO0.VOUT0_DATA0 */ |
| 71 | J721E_IOPAD(0x5c, PIN_OUTPUT, 10) /* (AG23) PRG1_PRU1_GPO1.VOUT0_DATA1 */ |
| 72 | J721E_IOPAD(0x60, PIN_OUTPUT, 10) /* (AF23) PRG1_PRU1_GPO2.VOUT0_DATA2 */ |
| 73 | J721E_IOPAD(0x64, PIN_OUTPUT, 10) /* (AD23) PRG1_PRU1_GPO3.VOUT0_DATA3 */ |
| 74 | J721E_IOPAD(0x68, PIN_OUTPUT, 10) /* (AH24) PRG1_PRU1_GPO4.VOUT0_DATA4 */ |
| 75 | J721E_IOPAD(0x6c, PIN_OUTPUT, 10) /* (AG21) PRG1_PRU1_GPO5.VOUT0_DATA5 */ |
| 76 | J721E_IOPAD(0x70, PIN_OUTPUT, 10) /* (AE23) PRG1_PRU1_GPO6.VOUT0_DATA6 */ |
| 77 | J721E_IOPAD(0x74, PIN_OUTPUT, 10) /* (AC21) PRG1_PRU1_GPO7.VOUT0_DATA7 */ |
| 78 | J721E_IOPAD(0x78, PIN_OUTPUT, 10) /* (Y23) PRG1_PRU1_GPO8.VOUT0_DATA8 */ |
| 79 | J721E_IOPAD(0x7c, PIN_OUTPUT, 10) /* (AF21) PRG1_PRU1_GPO9.VOUT0_DATA9 */ |
| 80 | J721E_IOPAD(0x80, PIN_OUTPUT, 10) /* (AB23) PRG1_PRU1_GPO10.VOUT0_DATA10 */ |
| 81 | J721E_IOPAD(0x84, PIN_OUTPUT, 10) /* (AJ25) PRG1_PRU1_GPO11.VOUT0_DATA11 */ |
| 82 | J721E_IOPAD(0x88, PIN_OUTPUT, 10) /* (AH25) PRG1_PRU1_GPO12.VOUT0_DATA12 */ |
| 83 | J721E_IOPAD(0x8c, PIN_OUTPUT, 10) /* (AG25) PRG1_PRU1_GPO13.VOUT0_DATA13 */ |
| 84 | J721E_IOPAD(0x90, PIN_OUTPUT, 10) /* (AH26) PRG1_PRU1_GPO14.VOUT0_DATA14 */ |
| 85 | J721E_IOPAD(0x94, PIN_OUTPUT, 10) /* (AJ27) PRG1_PRU1_GPO15.VOUT0_DATA15 */ |
| 86 | J721E_IOPAD(0x30, PIN_OUTPUT, 10) /* (AF24) PRG1_PRU0_GPO11.VOUT0_DATA16 */ |
| 87 | J721E_IOPAD(0x34, PIN_OUTPUT, 10) /* (AJ24) PRG1_PRU0_GPO12.VOUT0_DATA17 */ |
| 88 | J721E_IOPAD(0x38, PIN_OUTPUT, 10) /* (AG24) PRG1_PRU0_GPO13.VOUT0_DATA18 */ |
| 89 | J721E_IOPAD(0x3c, PIN_OUTPUT, 10) /* (AD24) PRG1_PRU0_GPO14.VOUT0_DATA19 */ |
| 90 | J721E_IOPAD(0x40, PIN_OUTPUT, 10) /* (AC24) PRG1_PRU0_GPO15.VOUT0_DATA20 */ |
| 91 | J721E_IOPAD(0x44, PIN_OUTPUT, 10) /* (AE24) PRG1_PRU0_GPO16.VOUT0_DATA21 */ |
| 92 | J721E_IOPAD(0x24, PIN_OUTPUT, 10) /* (AJ20) PRG1_PRU0_GPO8.VOUT0_DATA22 */ |
| 93 | J721E_IOPAD(0x28, PIN_OUTPUT, 10) /* (AG20) PRG1_PRU0_GPO9.VOUT0_DATA23 */ |
| 94 | J721E_IOPAD(0x9c, PIN_OUTPUT, 10) /* (AC22) PRG1_PRU1_GPO17.VOUT0_DE */ |
| 95 | J721E_IOPAD(0x98, PIN_OUTPUT, 10) /* (AJ26) PRG1_PRU1_GPO16.VOUT0_HSYNC */ |
| 96 | J721E_IOPAD(0xa4, PIN_OUTPUT, 10) /* (AH22) PRG1_PRU1_GPO19.VOUT0_PCLK */ |
| 97 | J721E_IOPAD(0xa0, PIN_OUTPUT, 10) /* (AJ22) PRG1_PRU1_GPO18.VOUT0_VSYNC */ |
| 98 | >; |
| 99 | }; |
| 100 | }; |
| 101 | |
| 102 | &exp1 { |
| 103 | p14-hog { |
| 104 | /* P14 - VINOUT_MUX_SEL0 */ |
| 105 | gpio-hog; |
| 106 | gpios = <12 GPIO_ACTIVE_HIGH>; |
| 107 | output-low; |
| 108 | line-name = "VINOUT_MUX_SEL0"; |
| 109 | }; |
| 110 | |
| 111 | p15-hog { |
| 112 | /* P15 - VINOUT_MUX_SEL1 */ |
| 113 | gpio-hog; |
| 114 | gpios = <13 GPIO_ACTIVE_HIGH>; |
| 115 | output-high; |
| 116 | line-name = "VINOUT_MUX_SEL1"; |
| 117 | }; |
| 118 | }; |
| 119 | |
| 120 | &main_i2c1 { |
| 121 | /* i2c1 is used for DVI DDC, so we need to use 100kHz */ |
| 122 | clock-frequency = <100000>; |
| 123 | #address-cells = <1>; |
| 124 | #size-cells = <0>; |
| 125 | |
| 126 | exp6: gpio@21 { |
| 127 | compatible = "ti,tca6416"; |
| 128 | reg = <0x21>; |
| 129 | gpio-controller; |
| 130 | #gpio-cells = <2>; |
| 131 | pinctrl-names = "default"; |
| 132 | pinctrl-0 = <&main_i2c1_exp6_pins_default>; |
| 133 | interrupt-parent = <&main_gpio1>; |
| 134 | interrupts = <24 IRQ_TYPE_EDGE_FALLING>; |
| 135 | interrupt-controller; |
| 136 | #interrupt-cells = <2>; |
| 137 | |
| 138 | p11-hog { |
| 139 | /* P11 - HDMI_DDC_OE */ |
| 140 | gpio-hog; |
| 141 | gpios = <9 GPIO_ACTIVE_HIGH>; |
| 142 | output-high; |
| 143 | line-name = "HDMI_DDC_OE"; |
| 144 | }; |
| 145 | }; |
| 146 | }; |
| 147 | |
| 148 | &dss { |
| 149 | pinctrl-names = "default"; |
| 150 | pinctrl-0 = <&dss_vout0_pins_default>; |
| 151 | }; |
| 152 | |
| 153 | &dss_ports { |
| 154 | #address-cells = <1>; |
| 155 | #size-cells = <0>; |
| 156 | |
| 157 | port@1 { |
| 158 | reg = <1>; |
| 159 | |
| 160 | dpi_out0: endpoint { |
| 161 | remote-endpoint = <&tfp410_in>; |
| 162 | }; |
| 163 | }; |
| 164 | }; |