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git01.mediatek.com / filogic / uboot / 97799bc45d4aeb35b75ddc3b0290e5e8f635f49e / . / dts / upstream / src / arm64 / mediatek / mt8390-genio-700-evk.dts
blob: 1474bef7e754d08141cbcdc22d32494d586b3bb6 [file] [log] [blame]
Tom Rini6b642ac2024-10-01 12:20:28 -0600[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2023 MediaTek Inc.
4 * Author: Chris Chen <chris-qj.chen@mediatek.com>
5 * Pablo Sun <pablo.sun@mediatek.com>
6 * Macpaul Lin <macpaul.lin@mediatek.com>
7 */
8/dts-v1/;
9
10#include "mt8188.dtsi"
11#include "mt6359.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
16#include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
17#include <dt-bindings/spmi/spmi.h>
18#include <dt-bindings/usb/pd.h>
19
20/ {
21 model = "MediaTek Genio-700 EVK";
22 compatible = "mediatek,mt8390-evk", "mediatek,mt8390",
23 "mediatek,mt8188";
24
25 aliases {
26 serial0 = &uart0;
27 };
28
29 chosen {
30 stdout-path = "serial0:921600n8";
31 };
32
33 firmware {
34 optee {
35 compatible = "linaro,optee-tz";
36 method = "smc";
37 };
38 };
39
40 memory@40000000 {
41 device_type = "memory";
42 reg = <0 0x40000000 0x2 0x00000000>;
43 };
44
45 reserved-memory {
46 #address-cells = <2>;
47 #size-cells = <2>;
48 ranges;
49
50 /*
51 * 12 MiB reserved for OP-TEE (BL32)
52 * +-----------------------+ 0x43e0_0000
53 * | SHMEM 2MiB |
54 * +-----------------------+ 0x43c0_0000
55 * | | TA_RAM 8MiB |
56 * + TZDRAM +--------------+ 0x4340_0000
57 * | | TEE_RAM 2MiB |
58 * +-----------------------+ 0x4320_0000
59 */
60 optee_reserved: optee@43200000 {
61 no-map;
62 reg = <0 0x43200000 0 0x00c00000>;
63 };
64
65 scp_mem: memory@50000000 {
66 compatible = "shared-dma-pool";
67 reg = <0 0x50000000 0 0x2900000>;
68 no-map;
69 };
70
71 /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
72 bl31_secmon_reserved: memory@54600000 {
73 no-map;
74 reg = <0 0x54600000 0x0 0x200000>;
75 };
76
77 apu_mem: memory@55000000 {
78 compatible = "shared-dma-pool";
79 reg = <0 0x55000000 0 0x1400000>; /* 20 MB */
80 };
81
82 vpu_mem: memory@57000000 {
83 compatible = "shared-dma-pool";
84 reg = <0 0x57000000 0 0x1400000>; /* 20 MB */
85 };
86 };
87
88 common_fixed_5v: regulator-0 {
89 compatible = "regulator-fixed";
90 regulator-name = "5v_en";
91 regulator-min-microvolt = <5000000>;
92 regulator-max-microvolt = <5000000>;
93 gpio = <&pio 10 GPIO_ACTIVE_HIGH>;
94 enable-active-high;
95 regulator-always-on;
96 };
97
98 edp_panel_fixed_3v3: regulator-1 {
99 compatible = "regulator-fixed";
100 regulator-name = "edp_panel_3v3";
101 regulator-min-microvolt = <3300000>;
102 regulator-max-microvolt = <3300000>;
103 enable-active-high;
104 gpio = <&pio 15 GPIO_ACTIVE_HIGH>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&edp_panel_3v3_en_pins>;
107 };
108
109 gpio_fixed_3v3: regulator-2 {
110 compatible = "regulator-fixed";
111 regulator-name = "gpio_3v3_en";
112 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <3300000>;
114 gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
115 enable-active-high;
116 regulator-always-on;
117 };
118
119 sdio_fixed_1v8: regulator-3 {
120 compatible = "regulator-fixed";
121 regulator-name = "sdio_io";
122 regulator-min-microvolt = <1800000>;
123 regulator-max-microvolt = <1800000>;
124 enable-active-high;
125 regulator-always-on;
126 };
127
128 sdio_fixed_3v3: regulator-4 {
129 compatible = "regulator-fixed";
130 regulator-name = "sdio_card";
131 regulator-min-microvolt = <3300000>;
132 regulator-max-microvolt = <3300000>;
133 gpio = <&pio 74 GPIO_ACTIVE_HIGH>;
134 enable-active-high;
135 regulator-always-on;
136 };
137
138 touch0_fixed_3v3: regulator-5 {
139 compatible = "regulator-fixed";
140 regulator-name = "touch_3v3";
141 regulator-min-microvolt = <3300000>;
142 regulator-max-microvolt = <3300000>;
143 gpio = <&pio 119 GPIO_ACTIVE_HIGH>;
144 enable-active-high;
145 };
146
147 usb_hub_fixed_3v3: regulator-6 {
148 compatible = "regulator-fixed";
149 regulator-name = "usb_hub_3v3";
150 regulator-min-microvolt = <3300000>;
151 regulator-max-microvolt = <3300000>;
152 gpio = <&pio 112 GPIO_ACTIVE_HIGH>; /* HUB_3V3_EN */
153 startup-delay-us = <10000>;
154 enable-active-high;
155 };
156
157 usb_hub_reset_1v8: regulator-7 {
158 compatible = "regulator-fixed";
159 regulator-name = "usb_hub_reset";
160 regulator-min-microvolt = <1800000>;
161 regulator-max-microvolt = <1800000>;
162 gpio = <&pio 7 GPIO_ACTIVE_HIGH>; /* HUB_RESET */
163 vin-supply = <&usb_hub_fixed_3v3>;
164 };
165
166 usb_p0_vbus: regulator-8 {
167 compatible = "regulator-fixed";
168 regulator-name = "usb_p0_vbus";
169 regulator-min-microvolt = <5000000>;
170 regulator-max-microvolt = <5000000>;
171 gpio = <&pio 84 GPIO_ACTIVE_HIGH>;
172 enable-active-high;
173 };
174
175 usb_p1_vbus: regulator-9 {
176 compatible = "regulator-fixed";
177 regulator-name = "usb_p1_vbus";
178 regulator-min-microvolt = <5000000>;
179 regulator-max-microvolt = <5000000>;
180 gpio = <&pio 87 GPIO_ACTIVE_HIGH>;
181 enable-active-high;
182 };
183
184 usb_p2_vbus: regulator-10 {
185 compatible = "regulator-fixed";
186 regulator-name = "usb_p2_vbus";
187 regulator-min-microvolt = <5000000>;
188 regulator-max-microvolt = <5000000>;
189 enable-active-high;
190 };
191};
192
193&i2c0 {
194 pinctrl-names = "default";
195 pinctrl-0 = <&i2c0_pins>;
196 clock-frequency = <400000>;
197 status = "okay";
198
199 touchscreen@5d {
200 compatible = "goodix,gt9271";
201 reg = <0x5d>;
202 interrupt-parent = <&pio>;
203 interrupts-extended = <&pio 6 IRQ_TYPE_EDGE_RISING>;
204 irq-gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
205 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
206 AVDD28-supply = <&touch0_fixed_3v3>;
207 VDDIO-supply = <&mt6359_vio18_ldo_reg>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&touch_pins>;
210 };
211};
212
213&i2c1 {
214 pinctrl-names = "default";
215 pinctrl-0 = <&i2c1_pins>;
216 clock-frequency = <400000>;
217 status = "okay";
218};
219
220&i2c2 {
221 pinctrl-names = "default";
222 pinctrl-0 = <&i2c2_pins>;
223 clock-frequency = <400000>;
224 status = "okay";
225};
226
227&i2c3 {
228 pinctrl-names = "default";
229 pinctrl-0 = <&i2c3_pins>;
230 clock-frequency = <400000>;
231 status = "okay";
232};
233
234&i2c4 {
235 pinctrl-names = "default";
236 pinctrl-0 = <&i2c4_pins>;
237 pinctrl-1 = <&rt1715_int_pins>;
238 clock-frequency = <1000000>;
239 status = "okay";
240};
241
242&i2c5 {
243 pinctrl-names = "default";
244 pinctrl-0 = <&i2c5_pins>;
245 clock-frequency = <400000>;
246 status = "okay";
247};
248
249&i2c6 {
250 pinctrl-names = "default";
251 pinctrl-0 = <&i2c6_pins>;
252 clock-frequency = <400000>;
253 status = "okay";
254};
255
256&mmc0 {
257 status = "okay";
258 pinctrl-names = "default", "state_uhs";
259 pinctrl-0 = <&mmc0_default_pins>;
260 pinctrl-1 = <&mmc0_uhs_pins>;
261 bus-width = <8>;
262 max-frequency = <200000000>;
263 cap-mmc-highspeed;
264 mmc-hs200-1_8v;
265 mmc-hs400-1_8v;
266 supports-cqe;
267 cap-mmc-hw-reset;
268 no-sdio;
269 no-sd;
270 hs400-ds-delay = <0x1481b>;
271 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
272 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
273 non-removable;
274};
275
276&mmc1 {
277 status = "okay";
278 pinctrl-names = "default", "state_uhs";
279 pinctrl-0 = <&mmc1_default_pins>;
280 pinctrl-1 = <&mmc1_uhs_pins>;
281 bus-width = <4>;
282 max-frequency = <200000000>;
283 cap-sd-highspeed;
284 sd-uhs-sdr50;
285 sd-uhs-sdr104;
286 no-mmc;
287 no-sdio;
288 cd-gpios = <&pio 2 GPIO_ACTIVE_LOW>;
289 vmmc-supply = <&mt6359_vpa_buck_reg>;
290 vqmmc-supply = <&mt6359_vsim1_ldo_reg>;
291};
292
293&mt6359_vbbck_ldo_reg {
294 regulator-always-on;
295};
296
297&mt6359_vcn18_ldo_reg {
298 regulator-always-on;
299};
300
301&mt6359_vcn33_2_bt_ldo_reg {
302 regulator-always-on;
303};
304
305&mt6359_vcore_buck_reg {
306 regulator-always-on;
307};
308
309&mt6359_vgpu11_buck_reg {
310 regulator-always-on;
311};
312
313&mt6359_vpa_buck_reg {
314 regulator-max-microvolt = <3100000>;
315};
316
317&mt6359_vpu_buck_reg {
318 regulator-always-on;
319};
320
321&mt6359_vrf12_ldo_reg {
322 regulator-always-on;
323};
324
325&mt6359_vsim1_ldo_reg {
326 regulator-enable-ramp-delay = <480>;
327};
328
329&mt6359_vufs_ldo_reg {
330 regulator-always-on;
331};
332
333&mt6359codec {
334 mediatek,mic-type-0 = <1>; /* ACC */
335 mediatek,mic-type-1 = <3>; /* DCC */
336};
337
338&pio {
339 audio_default_pins: audio-default-pins {
340 pins-cmd-dat {
341 pinmux = <PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI>,
342 <PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI>,
343 <PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0>,
344 <PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1>,
345 <PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0>,
346 <PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1>,
347 <PINMUX_GPIO107__FUNC_B0_I2SIN_MCK>,
348 <PINMUX_GPIO108__FUNC_B0_I2SIN_BCK>,
349 <PINMUX_GPIO109__FUNC_B0_I2SIN_WS>,
350 <PINMUX_GPIO110__FUNC_I0_I2SIN_D0>,
351 <PINMUX_GPIO114__FUNC_O_I2SO2_MCK>,
352 <PINMUX_GPIO115__FUNC_B0_I2SO2_BCK>,
353 <PINMUX_GPIO116__FUNC_B0_I2SO2_WS>,
354 <PINMUX_GPIO117__FUNC_O_I2SO2_D0>,
355 <PINMUX_GPIO118__FUNC_O_I2SO2_D1>,
356 <PINMUX_GPIO121__FUNC_B0_PCM_CLK>,
357 <PINMUX_GPIO122__FUNC_B0_PCM_SYNC>,
358 <PINMUX_GPIO124__FUNC_I0_PCM_DI>,
359 <PINMUX_GPIO125__FUNC_O_DMIC1_CLK>,
360 <PINMUX_GPIO126__FUNC_I0_DMIC1_DAT>,
361 <PINMUX_GPIO128__FUNC_O_DMIC2_CLK>,
362 <PINMUX_GPIO129__FUNC_I0_DMIC2_DAT>;
363 };
364 };
365
366 dptx_pins: dptx-pins {
367 pins-cmd-dat {
368 pinmux = <PINMUX_GPIO46__FUNC_I0_DP_TX_HPD>;
369 bias-pull-up;
370 };
371 };
372
373 edp_panel_3v3_en_pins: edp-panel-3v3-en-pins {
374 pins1 {
375 pinmux = <PINMUX_GPIO15__FUNC_B_GPIO15>;
376 output-high;
377 };
378 };
379
380 eth_default_pins: eth-default-pins {
381 pins-cc {
382 pinmux = <PINMUX_GPIO139__FUNC_B0_GBE_TXC>,
383 <PINMUX_GPIO140__FUNC_I0_GBE_RXC>,
384 <PINMUX_GPIO141__FUNC_I0_GBE_RXDV>,
385 <PINMUX_GPIO142__FUNC_O_GBE_TXEN>;
386 drive-strength = <8>;
387 };
388
389 pins-mdio {
390 pinmux = <PINMUX_GPIO143__FUNC_O_GBE_MDC>,
391 <PINMUX_GPIO144__FUNC_B1_GBE_MDIO>;
392 drive-strength = <8>;
393 input-enable;
394 };
395
396 pins-power {
397 pinmux = <PINMUX_GPIO145__FUNC_B_GPIO145>,
398 <PINMUX_GPIO146__FUNC_B_GPIO146>;
399 output-high;
400 };
401
402 pins-rxd {
403 pinmux = <PINMUX_GPIO135__FUNC_I0_GBE_RXD3>,
404 <PINMUX_GPIO136__FUNC_I0_GBE_RXD2>,
405 <PINMUX_GPIO137__FUNC_I0_GBE_RXD1>,
406 <PINMUX_GPIO138__FUNC_I0_GBE_RXD0>;
407 drive-strength = <8>;
408 };
409
410 pins-txd {
411 pinmux = <PINMUX_GPIO131__FUNC_O_GBE_TXD3>,
412 <PINMUX_GPIO132__FUNC_O_GBE_TXD2>,
413 <PINMUX_GPIO133__FUNC_O_GBE_TXD1>,
414 <PINMUX_GPIO134__FUNC_O_GBE_TXD0>;
415 drive-strength = <8>;
416 };
417 };
418
419 eth_sleep_pins: eth-sleep-pins {
420 pins-cc {
421 pinmux = <PINMUX_GPIO139__FUNC_B_GPIO139>,
422 <PINMUX_GPIO140__FUNC_B_GPIO140>,
423 <PINMUX_GPIO141__FUNC_B_GPIO141>,
424 <PINMUX_GPIO142__FUNC_B_GPIO142>;
425 };
426
427 pins-mdio {
428 pinmux = <PINMUX_GPIO143__FUNC_B_GPIO143>,
429 <PINMUX_GPIO144__FUNC_B_GPIO144>;
430 input-disable;
431 bias-disable;
432 };
433
434 pins-rxd {
435 pinmux = <PINMUX_GPIO135__FUNC_B_GPIO135>,
436 <PINMUX_GPIO136__FUNC_B_GPIO136>,
437 <PINMUX_GPIO137__FUNC_B_GPIO137>,
438 <PINMUX_GPIO138__FUNC_B_GPIO138>;
439 };
440
441 pins-txd {
442 pinmux = <PINMUX_GPIO131__FUNC_B_GPIO131>,
443 <PINMUX_GPIO132__FUNC_B_GPIO132>,
444 <PINMUX_GPIO133__FUNC_B_GPIO133>,
445 <PINMUX_GPIO134__FUNC_B_GPIO134>;
446 };
447 };
448
449 i2c0_pins: i2c0-pins {
450 pins {
451 pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>,
452 <PINMUX_GPIO55__FUNC_B1_SCL0>;
453 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
454 drive-strength-microamp = <1000>;
455 };
456 };
457
458 i2c1_pins: i2c1-pins {
459 pins {
460 pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>,
461 <PINMUX_GPIO57__FUNC_B1_SCL1>;
462 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
463 drive-strength-microamp = <1000>;
464 };
465 };
466
467 i2c2_pins: i2c2-pins {
468 pins {
469 pinmux = <PINMUX_GPIO60__FUNC_B1_SDA2>,
470 <PINMUX_GPIO59__FUNC_B1_SCL2>;
471 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
472 drive-strength-microamp = <1000>;
473 };
474 };
475
476 i2c3_pins: i2c3-pins {
477 pins {
478 pinmux = <PINMUX_GPIO62__FUNC_B1_SDA3>,
479 <PINMUX_GPIO61__FUNC_B1_SCL3>;
480 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
481 drive-strength-microamp = <1000>;
482 };
483 };
484
485 i2c4_pins: i2c4-pins {
486 pins {
487 pinmux = <PINMUX_GPIO64__FUNC_B1_SDA4>,
488 <PINMUX_GPIO63__FUNC_B1_SCL4>;
489 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
490 drive-strength-microamp = <1000>;
491 };
492 };
493
494 i2c5_pins: i2c5-pins {
495 pins {
496 pinmux = <PINMUX_GPIO66__FUNC_B1_SDA5>,
497 <PINMUX_GPIO65__FUNC_B1_SCL5>;
498 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
499 drive-strength-microamp = <1000>;
500 };
501 };
502
503 i2c6_pins: i2c6-pins {
504 pins {
505 pinmux = <PINMUX_GPIO68__FUNC_B1_SDA6>,
506 <PINMUX_GPIO67__FUNC_B1_SCL6>;
507 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
508 drive-strength-microamp = <1000>;
509 };
510 };
511
512 gpio_key_pins: gpio-key-pins {
513 pins {
514 pinmux = <PINMUX_GPIO42__FUNC_B1_KPCOL0>,
515 <PINMUX_GPIO43__FUNC_B1_KPCOL1>,
516 <PINMUX_GPIO44__FUNC_B1_KPROW0>;
517 };
518 };
519
520 mmc0_default_pins: mmc0-default-pins {
521 pins-clk {
522 pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
523 drive-strength = <6>;
524 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
525 };
526
527 pins-cmd-dat {
528 pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
529 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
530 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
531 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
532 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
533 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
534 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
535 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
536 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
537 input-enable;
538 drive-strength = <6>;
539 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
540 };
541
542 pins-rst {
543 pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
544 drive-strength = <6>;
545 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
546 };
547 };
548
549 mmc0_uhs_pins: mmc0-uhs-pins {
550 pins-clk {
551 pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
552 drive-strength = <8>;
553 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
554 };
555
556 pins-cmd-dat {
557 pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
558 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
559 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
560 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
561 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
562 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
563 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
564 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
565 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
566 input-enable;
567 drive-strength = <8>;
568 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
569 };
570
571 pins-ds {
572 pinmux = <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>;
573 drive-strength = <8>;
574 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
575 };
576
577 pins-rst {
578 pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
579 drive-strength = <8>;
580 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
581 };
582 };
583
584 mmc1_default_pins: mmc1-default-pins {
585 pins-clk {
586 pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>;
587 drive-strength = <6>;
588 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
589 };
590
591 pins-cmd-dat {
592 pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>,
593 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>,
594 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>,
595 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>,
596 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>;
597 input-enable;
598 drive-strength = <6>;
599 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
600 };
601
602 pins-insert {
603 pinmux = <PINMUX_GPIO2__FUNC_B_GPIO2>;
604 bias-pull-up;
605 };
606 };
607
608 mmc1_uhs_pins: mmc1-uhs-pins {
609 pins-clk {
610 pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>;
611 drive-strength = <6>;
612 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
613 };
614
615 pins-cmd-dat {
616 pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>,
617 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>,
618 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>,
619 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>,
620 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>;
621 input-enable;
622 drive-strength = <6>;
623 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
624 };
625 };
626
627 mmc2_default_pins: mmc2-default-pins {
628 pins-clk {
629 pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>;
630 drive-strength = <4>;
631 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
632 };
633
634 pins-cmd-dat {
635 pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>,
636 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>,
637 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>,
638 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>,
639 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>;
640 input-enable;
641 drive-strength = <6>;
642 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
643 };
644
645 pins-pcm {
646 pinmux = <PINMUX_GPIO123__FUNC_O_PCM_DO>;
647 };
648 };
649
650 mmc2_uhs_pins: mmc2-uhs-pins {
651 pins-clk {
652 pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>;
653 drive-strength = <4>;
654 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
655 };
656
657 pins-cmd-dat {
658 pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>,
659 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>,
660 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>,
661 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>,
662 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>;
663 input-enable;
664 drive-strength = <6>;
665 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
666 };
667 };
668
669 mmc2_eint_pins: mmc2-eint-pins {
670 pins-dat1 {
671 pinmux = <PINMUX_GPIO172__FUNC_B_GPIO172>;
672 input-enable;
673 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
674 };
675 };
676
677 mmc2_dat1_pins: mmc2-dat1-pins {
678 pins-dat1 {
679 pinmux = <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>;
680 input-enable;
681 drive-strength = <6>;
682 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
683 };
684 };
685
686 panel_default_pins: panel-default-pins {
687 pins-dcdc {
688 pinmux = <PINMUX_GPIO45__FUNC_B_GPIO45>;
689 output-low;
690 };
691
692 pins-en {
693 pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>;
694 output-low;
695 };
696
697 pins-rst {
698 pinmux = <PINMUX_GPIO25__FUNC_B_GPIO25>;
699 output-high;
700 };
701 };
702
703 rt1715_int_pins: rt1715-int-pins {
704 pins_cmd0_dat {
705 pinmux = <PINMUX_GPIO12__FUNC_B_GPIO12>;
706 bias-pull-up;
707 input-enable;
708 };
709 };
710
711 spi0_pins: spi0-pins {
712 pins-spi {
713 pinmux = <PINMUX_GPIO69__FUNC_O_SPIM0_CSB>,
714 <PINMUX_GPIO70__FUNC_O_SPIM0_CLK>,
715 <PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI>,
716 <PINMUX_GPIO72__FUNC_B0_SPIM0_MISO>;
717 bias-disable;
718 };
719 };
720
721 spi1_pins: spi1-pins {
722 pins-spi {
723 pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>,
724 <PINMUX_GPIO76__FUNC_O_SPIM1_CLK>,
725 <PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>,
726 <PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>;
727 bias-disable;
728 };
729 };
730
731 spi2_pins: spi2-pins {
732 pins-spi {
733 pinmux = <PINMUX_GPIO79__FUNC_O_SPIM2_CSB>,
734 <PINMUX_GPIO80__FUNC_O_SPIM2_CLK>,
735 <PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI>,
736 <PINMUX_GPIO82__FUNC_B0_SPIM2_MISO>;
737 bias-disable;
738 };
739 };
740
741 touch_pins: touch-pins {
742 pins-irq {
743 pinmux = <PINMUX_GPIO6__FUNC_B_GPIO6>;
744 input-enable;
745 bias-disable;
746 };
747
748 pins-reset {
749 pinmux = <PINMUX_GPIO5__FUNC_B_GPIO5>;
750 output-high;
751 };
752 };
753
754 uart0_pins: uart0-pins {
755 pins {
756 pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>,
757 <PINMUX_GPIO32__FUNC_I1_URXD0>;
758 bias-pull-up;
759 };
760 };
761
762 uart1_pins: uart1-pins {
763 pins {
764 pinmux = <PINMUX_GPIO33__FUNC_O_UTXD1>,
765 <PINMUX_GPIO34__FUNC_I1_URXD1>;
766 bias-pull-up;
767 };
768 };
769
770 uart2_pins: uart2-pins {
771 pins {
772 pinmux = <PINMUX_GPIO35__FUNC_O_UTXD2>,
773 <PINMUX_GPIO36__FUNC_I1_URXD2>;
774 bias-pull-up;
775 };
776 };
777
778 usb_default_pins: usb-default-pins {
779 pins-iddig {
780 pinmux = <PINMUX_GPIO83__FUNC_B_GPIO83>;
781 input-enable;
782 bias-pull-up;
783 };
784
785 pins-valid {
786 pinmux = <PINMUX_GPIO85__FUNC_I0_VBUSVALID>;
787 input-enable;
788 };
789
790 pins-vbus {
791 pinmux = <PINMUX_GPIO84__FUNC_O_USB_DRVVBUS>;
792 output-high;
793 };
794
795 };
796
797 usb1_default_pins: usb1-default-pins {
798 pins-valid {
799 pinmux = <PINMUX_GPIO88__FUNC_I0_VBUSVALID_1P>;
800 input-enable;
801 };
802
803 pins-usb-hub-3v3-en {
804 pinmux = <PINMUX_GPIO112__FUNC_B_GPIO112>;
805 output-high;
806 };
807 };
808
809 wifi_pwrseq_pins: wifi-pwrseq-pins {
810 pins-wifi-enable {
811 pinmux = <PINMUX_GPIO127__FUNC_B_GPIO127>;
812 output-low;
813 };
814 };
815};
816
817&pmic {
818 interrupt-parent = <&pio>;
819 interrupts = <222 IRQ_TYPE_LEVEL_HIGH>;
820};
821
822&scp {
823 memory-region = <&scp_mem>;
824 status = "okay";
825};
826
827&uart0 {
828 pinctrl-0 = <&uart0_pins>;
829 pinctrl-names = "default";
830 status = "okay";
831};
832
833&uart1 {
834 pinctrl-0 = <&uart1_pins>;
835 pinctrl-names = "default";
836 status = "okay";
837};
838
839&uart2 {
840 pinctrl-0 = <&uart2_pins>;
841 pinctrl-names = "default";
842 status = "okay";
843};
844
845&spi2 {
846 pinctrl-0 = <&spi2_pins>;
847 pinctrl-names = "default";
848 mediatek,pad-select = <0>;
849 #address-cells = <1>;
850 #size-cells = <0>;
851 status = "okay";
852};
853
854&u3phy0 {
855 status = "okay";
856};
857
858&u3phy1 {
859 status = "okay";
860};
861
862&u3phy2 {
863 status = "okay";
864};
865
866&xhci0 {
867 status = "okay";
868 vusb33-supply = <&mt6359_vusb_ldo_reg>;
869};
870
871&xhci1 {
872 status = "okay";
873 vusb33-supply = <&mt6359_vusb_ldo_reg>;
874 vbus-supply = <&usb_hub_reset_1v8>;
875};
876
877&xhci2 {
878 status = "okay";
879 vusb33-supply = <&mt6359_vusb_ldo_reg>;
880};