Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * DTS file for all SPEAr13xx SoCs |
| 4 | * |
| 5 | * Copyright 2012 Viresh Kumar <vireshk@kernel.org> |
| 6 | */ |
| 7 | |
| 8 | / { |
| 9 | #address-cells = <1>; |
| 10 | #size-cells = <1>; |
| 11 | interrupt-parent = <&gic>; |
| 12 | |
| 13 | cpus { |
| 14 | #address-cells = <1>; |
| 15 | #size-cells = <0>; |
| 16 | |
| 17 | cpu@0 { |
| 18 | compatible = "arm,cortex-a9"; |
| 19 | device_type = "cpu"; |
| 20 | reg = <0>; |
| 21 | next-level-cache = <&L2>; |
| 22 | }; |
| 23 | |
| 24 | cpu@1 { |
| 25 | compatible = "arm,cortex-a9"; |
| 26 | device_type = "cpu"; |
| 27 | reg = <1>; |
| 28 | next-level-cache = <&L2>; |
| 29 | }; |
| 30 | }; |
| 31 | |
| 32 | gic: interrupt-controller@ec801000 { |
| 33 | compatible = "arm,cortex-a9-gic"; |
| 34 | interrupt-controller; |
| 35 | #interrupt-cells = <3>; |
| 36 | reg = < 0xec801000 0x1000 >, |
| 37 | < 0xec800100 0x0100 >; |
| 38 | }; |
| 39 | |
| 40 | pmu { |
| 41 | compatible = "arm,cortex-a9-pmu"; |
| 42 | interrupts = <0 6 0x04>, |
| 43 | <0 7 0x04>; |
| 44 | }; |
| 45 | |
| 46 | L2: cache-controller { |
| 47 | compatible = "arm,pl310-cache"; |
| 48 | reg = <0xed000000 0x1000>; |
| 49 | cache-unified; |
| 50 | cache-level = <2>; |
| 51 | }; |
| 52 | |
| 53 | memory { |
| 54 | name = "memory"; |
| 55 | device_type = "memory"; |
| 56 | reg = <0 0x40000000>; |
| 57 | }; |
| 58 | |
| 59 | chosen { |
| 60 | bootargs = "console=ttyAMA0,115200"; |
| 61 | }; |
| 62 | |
| 63 | cpufreq { |
| 64 | compatible = "st,cpufreq-spear"; |
| 65 | cpufreq_tbl = < 166000 |
| 66 | 200000 |
| 67 | 250000 |
| 68 | 300000 |
| 69 | 400000 |
| 70 | 500000 |
| 71 | 600000 >; |
| 72 | status = "disabled"; |
| 73 | }; |
| 74 | |
| 75 | ahb { |
| 76 | #address-cells = <1>; |
| 77 | #size-cells = <1>; |
| 78 | compatible = "simple-bus"; |
| 79 | ranges = <0x50000000 0x50000000 0x10000000 |
| 80 | 0x80000000 0x80000000 0x20000000 |
| 81 | 0xb0000000 0xb0000000 0x22000000 |
| 82 | 0xd8000000 0xd8000000 0x01000000 |
| 83 | 0xe0000000 0xe0000000 0x10000000>; |
| 84 | |
| 85 | sdhci@b3000000 { |
| 86 | compatible = "st,sdhci-spear"; |
| 87 | reg = <0xb3000000 0x100>; |
| 88 | interrupts = <0 28 0x4>; |
| 89 | status = "disabled"; |
| 90 | }; |
| 91 | |
| 92 | cf@b2800000 { |
| 93 | compatible = "arasan,cf-spear1340"; |
| 94 | reg = <0xb2800000 0x1000>; |
| 95 | interrupts = <0 29 0x4>; |
| 96 | status = "disabled"; |
| 97 | dmas = <&dwdma0 0 0 0>; |
| 98 | dma-names = "data"; |
| 99 | }; |
| 100 | |
| 101 | dwdma0: dma@ea800000 { |
| 102 | compatible = "snps,dma-spear1340"; |
| 103 | reg = <0xea800000 0x1000>; |
| 104 | interrupts = <0 19 0x4>; |
| 105 | status = "disabled"; |
| 106 | |
| 107 | dma-channels = <8>; |
| 108 | #dma-cells = <3>; |
| 109 | dma-requests = <32>; |
| 110 | chan_allocation_order = <1>; |
| 111 | chan_priority = <1>; |
| 112 | block_size = <0xfff>; |
| 113 | dma-masters = <2>; |
| 114 | data-width = <8 8>; |
| 115 | multi-block = <1 1 1 1 1 1 1 1>; |
| 116 | }; |
| 117 | |
| 118 | dma@eb000000 { |
| 119 | compatible = "snps,dma-spear1340"; |
| 120 | reg = <0xeb000000 0x1000>; |
| 121 | interrupts = <0 59 0x4>; |
| 122 | status = "disabled"; |
| 123 | |
| 124 | dma-requests = <32>; |
| 125 | dma-channels = <8>; |
| 126 | dma-masters = <2>; |
| 127 | #dma-cells = <3>; |
| 128 | chan_allocation_order = <1>; |
| 129 | chan_priority = <1>; |
| 130 | block_size = <0xfff>; |
| 131 | data-width = <8 8>; |
| 132 | multi-block = <1 1 1 1 1 1 1 1>; |
| 133 | }; |
| 134 | |
| 135 | fsmc: flash@b0000000 { |
| 136 | compatible = "st,spear600-fsmc-nand"; |
| 137 | #address-cells = <1>; |
| 138 | #size-cells = <1>; |
| 139 | reg = <0xb0000000 0x1000 /* FSMC Register*/ |
| 140 | 0xb0800000 0x0010 /* NAND Base DATA */ |
| 141 | 0xb0820000 0x0010 /* NAND Base ADDR */ |
| 142 | 0xb0810000 0x0010>; /* NAND Base CMD */ |
| 143 | reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; |
| 144 | interrupts = <0 20 0x4>, |
| 145 | <0 21 0x4>, |
| 146 | <0 22 0x4>, |
| 147 | <0 23 0x4>; |
| 148 | st,mode = <2>; |
| 149 | status = "disabled"; |
| 150 | }; |
| 151 | |
| 152 | gmac0: eth@e2000000 { |
| 153 | compatible = "st,spear600-gmac"; |
| 154 | reg = <0xe2000000 0x8000>; |
| 155 | interrupts = <0 33 0x4>, |
| 156 | <0 34 0x4>; |
| 157 | interrupt-names = "macirq", "eth_wake_irq"; |
| 158 | status = "disabled"; |
| 159 | }; |
| 160 | |
| 161 | pcm { |
| 162 | compatible = "st,pcm-audio"; |
| 163 | #address-cells = <0>; |
| 164 | #size-cells = <0>; |
| 165 | status = "disabled"; |
| 166 | }; |
| 167 | |
| 168 | smi: flash@ea000000 { |
| 169 | compatible = "st,spear600-smi"; |
| 170 | #address-cells = <1>; |
| 171 | #size-cells = <1>; |
| 172 | reg = <0xea000000 0x1000>; |
| 173 | interrupts = <0 30 0x4>; |
| 174 | status = "disabled"; |
| 175 | }; |
| 176 | |
| 177 | ehci@e4800000 { |
| 178 | compatible = "st,spear600-ehci", "usb-ehci"; |
| 179 | reg = <0xe4800000 0x1000>; |
| 180 | interrupts = <0 64 0x4>; |
| 181 | usbh0_id = <0>; |
| 182 | status = "disabled"; |
| 183 | }; |
| 184 | |
| 185 | ehci@e5800000 { |
| 186 | compatible = "st,spear600-ehci", "usb-ehci"; |
| 187 | reg = <0xe5800000 0x1000>; |
| 188 | interrupts = <0 66 0x4>; |
| 189 | usbh1_id = <1>; |
| 190 | status = "disabled"; |
| 191 | }; |
| 192 | |
| 193 | ohci@e4000000 { |
| 194 | compatible = "st,spear600-ohci", "usb-ohci"; |
| 195 | reg = <0xe4000000 0x1000>; |
| 196 | interrupts = <0 65 0x4>; |
| 197 | usbh0_id = <0>; |
| 198 | status = "disabled"; |
| 199 | }; |
| 200 | |
| 201 | ohci@e5000000 { |
| 202 | compatible = "st,spear600-ohci", "usb-ohci"; |
| 203 | reg = <0xe5000000 0x1000>; |
| 204 | interrupts = <0 67 0x4>; |
| 205 | usbh1_id = <1>; |
| 206 | status = "disabled"; |
| 207 | }; |
| 208 | |
| 209 | apb { |
| 210 | #address-cells = <1>; |
| 211 | #size-cells = <1>; |
| 212 | compatible = "simple-bus"; |
| 213 | ranges = <0x50000000 0x50000000 0x10000000 |
| 214 | 0xb0000000 0xb0000000 0x10000000 |
| 215 | 0xd0000000 0xd0000000 0x02000000 |
| 216 | 0xd8000000 0xd8000000 0x01000000 |
| 217 | 0xe0000000 0xe0000000 0x10000000>; |
| 218 | |
| 219 | misc: syscon@e0700000 { |
| 220 | compatible = "st,spear1340-misc", "syscon"; |
| 221 | reg = <0xe0700000 0x1000>; |
| 222 | }; |
| 223 | |
| 224 | gpio0: gpio@e0600000 { |
| 225 | compatible = "arm,pl061", "arm,primecell"; |
| 226 | reg = <0xe0600000 0x1000>; |
| 227 | interrupts = <0 24 0x4>; |
| 228 | gpio-controller; |
| 229 | #gpio-cells = <2>; |
| 230 | interrupt-controller; |
| 231 | #interrupt-cells = <2>; |
| 232 | status = "disabled"; |
| 233 | }; |
| 234 | |
| 235 | gpio1: gpio@e0680000 { |
| 236 | compatible = "arm,pl061", "arm,primecell"; |
| 237 | reg = <0xe0680000 0x1000>; |
| 238 | interrupts = <0 25 0x4>; |
| 239 | gpio-controller; |
| 240 | #gpio-cells = <2>; |
| 241 | interrupt-controller; |
| 242 | #interrupt-cells = <2>; |
| 243 | status = "disabled"; |
| 244 | }; |
| 245 | |
| 246 | kbd@e0300000 { |
| 247 | compatible = "st,spear300-kbd"; |
| 248 | reg = <0xe0300000 0x1000>; |
| 249 | interrupts = <0 52 0x4>; |
| 250 | status = "disabled"; |
| 251 | }; |
| 252 | |
| 253 | i2c0: i2c@e0280000 { |
| 254 | #address-cells = <1>; |
| 255 | #size-cells = <0>; |
| 256 | compatible = "snps,designware-i2c"; |
| 257 | reg = <0xe0280000 0x1000>; |
| 258 | interrupts = <0 41 0x4>; |
| 259 | status = "disabled"; |
| 260 | }; |
| 261 | |
| 262 | i2s@e0180000 { |
| 263 | compatible = "st,designware-i2s"; |
| 264 | reg = <0xe0180000 0x1000>; |
| 265 | interrupt-names = "play_irq", "record_irq"; |
| 266 | interrupts = <0 10 0x4>, |
| 267 | <0 11 0x4>; |
| 268 | status = "disabled"; |
| 269 | }; |
| 270 | |
| 271 | i2s@e0200000 { |
| 272 | compatible = "st,designware-i2s"; |
| 273 | reg = <0xe0200000 0x1000>; |
| 274 | interrupt-names = "play_irq", "record_irq"; |
| 275 | interrupts = <0 26 0x4>, |
| 276 | <0 53 0x4>; |
| 277 | status = "disabled"; |
| 278 | }; |
| 279 | |
| 280 | spi0: spi@e0100000 { |
| 281 | compatible = "arm,pl022", "arm,primecell"; |
| 282 | reg = <0xe0100000 0x1000>; |
| 283 | #address-cells = <1>; |
| 284 | #size-cells = <0>; |
| 285 | interrupts = <0 31 0x4>; |
| 286 | status = "disabled"; |
| 287 | dmas = <&dwdma0 5 0 0>, |
| 288 | <&dwdma0 4 0 0>; |
| 289 | dma-names = "rx", "tx"; |
| 290 | }; |
| 291 | |
| 292 | rtc@e0580000 { |
| 293 | compatible = "st,spear600-rtc"; |
| 294 | reg = <0xe0580000 0x1000>; |
| 295 | interrupts = <0 36 0x4>; |
| 296 | status = "disabled"; |
| 297 | }; |
| 298 | |
| 299 | serial@e0000000 { |
| 300 | compatible = "arm,pl011", "arm,primecell"; |
| 301 | reg = <0xe0000000 0x1000>; |
| 302 | interrupts = <0 35 0x4>; |
| 303 | status = "disabled"; |
| 304 | }; |
| 305 | |
| 306 | adc@e0080000 { |
| 307 | compatible = "st,spear600-adc"; |
| 308 | reg = <0xe0080000 0x1000>; |
| 309 | interrupts = <0 12 0x4>; |
| 310 | status = "disabled"; |
| 311 | }; |
| 312 | |
| 313 | timer@e0380000 { |
| 314 | compatible = "st,spear-timer"; |
| 315 | reg = <0xe0380000 0x400>; |
| 316 | interrupts = <0 37 0x4>; |
| 317 | }; |
| 318 | |
| 319 | timer@ec800600 { |
| 320 | compatible = "arm,cortex-a9-twd-timer"; |
| 321 | reg = <0xec800600 0x20>; |
| 322 | interrupts = <1 13 0x4>; |
| 323 | status = "disabled"; |
| 324 | }; |
| 325 | |
| 326 | wdt@ec800620 { |
| 327 | compatible = "arm,cortex-a9-twd-wdt"; |
| 328 | reg = <0xec800620 0x20>; |
| 329 | status = "disabled"; |
| 330 | }; |
| 331 | |
| 332 | thermal@e07008c4 { |
| 333 | compatible = "st,thermal-spear1340"; |
| 334 | reg = <0xe07008c4 0x4>; |
| 335 | thermal_flags = <0x7000>; |
| 336 | }; |
| 337 | }; |
| 338 | }; |
| 339 | }; |