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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip Power Domains
8
9maintainers:
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
12
13description: |
14 Rockchip processors include support for multiple power domains
15 which can be powered up/down by software based on different
16 application scenarios to save power.
17
18 Power domains contained within power-controller node are
19 generic power domain providers documented in
20 Documentation/devicetree/bindings/power/power-domain.yaml.
21
22 IP cores belonging to a power domain should contain a
23 "power-domains" property that is a phandle for the
24 power domain node representing the domain.
25
26properties:
27 $nodename:
28 const: power-controller
29
30 compatible:
31 enum:
32 - rockchip,px30-power-controller
33 - rockchip,rk3036-power-controller
34 - rockchip,rk3066-power-controller
35 - rockchip,rk3128-power-controller
36 - rockchip,rk3188-power-controller
37 - rockchip,rk3228-power-controller
38 - rockchip,rk3288-power-controller
39 - rockchip,rk3328-power-controller
40 - rockchip,rk3366-power-controller
41 - rockchip,rk3368-power-controller
42 - rockchip,rk3399-power-controller
43 - rockchip,rk3568-power-controller
44 - rockchip,rk3588-power-controller
45 - rockchip,rv1126-power-controller
46
47 "#power-domain-cells":
48 const: 1
49
50 "#address-cells":
51 const: 1
52
53 "#size-cells":
54 const: 0
55
56required:
57 - compatible
58 - "#power-domain-cells"
59
60additionalProperties: false
61
62patternProperties:
63 "^power-domain@[0-9a-f]+$":
64
65 $ref: "#/$defs/pd-node"
66
67 unevaluatedProperties: false
68
69 properties:
70 "#address-cells":
71 const: 1
72
73 "#size-cells":
74 const: 0
75
76 patternProperties:
77 "^power-domain@[0-9a-f]+$":
78
79 $ref: "#/$defs/pd-node"
80
81 unevaluatedProperties: false
82
83 properties:
84 "#address-cells":
85 const: 1
86
87 "#size-cells":
88 const: 0
89
90 patternProperties:
91 "^power-domain@[0-9a-f]+$":
92
93 $ref: "#/$defs/pd-node"
94
95 unevaluatedProperties: false
96
97 properties:
98 "#power-domain-cells":
99 const: 0
100
101$defs:
102 pd-node:
103 type: object
104 description: |
105 Represents the power domains within the power controller node.
106
107 properties:
108 reg:
109 maxItems: 1
110 description: |
111 Power domain index. Valid values are defined in
112 "include/dt-bindings/power/px30-power.h"
113 "include/dt-bindings/power/rk3036-power.h"
114 "include/dt-bindings/power/rk3066-power.h"
115 "include/dt-bindings/power/rk3128-power.h"
116 "include/dt-bindings/power/rk3188-power.h"
117 "include/dt-bindings/power/rk3228-power.h"
118 "include/dt-bindings/power/rk3288-power.h"
119 "include/dt-bindings/power/rk3328-power.h"
120 "include/dt-bindings/power/rk3366-power.h"
121 "include/dt-bindings/power/rk3368-power.h"
122 "include/dt-bindings/power/rk3399-power.h"
123 "include/dt-bindings/power/rk3568-power.h"
124 "include/dt-bindings/power/rk3588-power.h"
125 "include/dt-bindings/power/rockchip,rv1126-power.h"
126
127 clocks:
128 minItems: 1
129 maxItems: 30
130 description: |
131 A number of phandles to clocks that need to be enabled
132 while power domain switches state.
133
134 pm_qos:
135 $ref: /schemas/types.yaml#/definitions/phandle-array
136 items:
137 maxItems: 1
138 description: |
139 A number of phandles to qos blocks which need to be saved and restored
140 while power domain switches state.
141
142 "#power-domain-cells":
143 enum: [0, 1]
144 description:
145 Must be 0 for nodes representing a single PM domain and 1 for nodes
146 providing multiple PM domains.
147
148 required:
149 - reg
150 - "#power-domain-cells"
151
152examples:
153 - |
154 #include <dt-bindings/clock/rk3399-cru.h>
155 #include <dt-bindings/power/rk3399-power.h>
156
157 soc {
158 #address-cells = <2>;
159 #size-cells = <2>;
160
161 qos_hdcp: qos@ffa90000 {
162 compatible = "rockchip,rk3399-qos", "syscon";
163 reg = <0x0 0xffa90000 0x0 0x20>;
164 };
165
166 qos_iep: qos@ffa98000 {
167 compatible = "rockchip,rk3399-qos", "syscon";
168 reg = <0x0 0xffa98000 0x0 0x20>;
169 };
170
171 qos_rga_r: qos@ffab0000 {
172 compatible = "rockchip,rk3399-qos", "syscon";
173 reg = <0x0 0xffab0000 0x0 0x20>;
174 };
175
176 qos_rga_w: qos@ffab0080 {
177 compatible = "rockchip,rk3399-qos", "syscon";
178 reg = <0x0 0xffab0080 0x0 0x20>;
179 };
180
181 qos_video_m0: qos@ffab8000 {
182 compatible = "rockchip,rk3399-qos", "syscon";
183 reg = <0x0 0xffab8000 0x0 0x20>;
184 };
185
186 qos_video_m1_r: qos@ffac0000 {
187 compatible = "rockchip,rk3399-qos", "syscon";
188 reg = <0x0 0xffac0000 0x0 0x20>;
189 };
190
191 qos_video_m1_w: qos@ffac0080 {
192 compatible = "rockchip,rk3399-qos", "syscon";
193 reg = <0x0 0xffac0080 0x0 0x20>;
194 };
195
196 power-management@ff310000 {
197 compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
198 reg = <0x0 0xff310000 0x0 0x1000>;
199
200 power-controller {
201 compatible = "rockchip,rk3399-power-controller";
202 #power-domain-cells = <1>;
203 #address-cells = <1>;
204 #size-cells = <0>;
205
206 /* These power domains are grouped by VD_CENTER */
207 power-domain@RK3399_PD_IEP {
208 reg = <RK3399_PD_IEP>;
209 clocks = <&cru ACLK_IEP>,
210 <&cru HCLK_IEP>;
211 pm_qos = <&qos_iep>;
212 #power-domain-cells = <0>;
213 };
214 power-domain@RK3399_PD_RGA {
215 reg = <RK3399_PD_RGA>;
216 clocks = <&cru ACLK_RGA>,
217 <&cru HCLK_RGA>;
218 pm_qos = <&qos_rga_r>,
219 <&qos_rga_w>;
220 #power-domain-cells = <0>;
221 };
222 power-domain@RK3399_PD_VCODEC {
223 reg = <RK3399_PD_VCODEC>;
224 clocks = <&cru ACLK_VCODEC>,
225 <&cru HCLK_VCODEC>;
226 pm_qos = <&qos_video_m0>;
227 #power-domain-cells = <0>;
228 };
229 power-domain@RK3399_PD_VDU {
230 reg = <RK3399_PD_VDU>;
231 clocks = <&cru ACLK_VDU>,
232 <&cru HCLK_VDU>;
233 pm_qos = <&qos_video_m1_r>,
234 <&qos_video_m1_w>;
235 #power-domain-cells = <0>;
236 };
237 power-domain@RK3399_PD_VIO {
238 reg = <RK3399_PD_VIO>;
239 #power-domain-cells = <1>;
240 #address-cells = <1>;
241 #size-cells = <0>;
242
243 power-domain@RK3399_PD_HDCP {
244 reg = <RK3399_PD_HDCP>;
245 clocks = <&cru ACLK_HDCP>,
246 <&cru HCLK_HDCP>,
247 <&cru PCLK_HDCP>;
248 pm_qos = <&qos_hdcp>;
249 #power-domain-cells = <0>;
250 };
251 };
252 };
253 };
254 };