blob: 3e3729b1c799e97a4b35566fbc5ae930c6d0d004 [file] [log] [blame]
Tom Rini6b642ac2024-10-01 12:20:28 -06001# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/rockchip,rk3399-emmc-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip EMMC PHY
8
9maintainers:
10 - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13 compatible:
14 const: rockchip,rk3399-emmc-phy
15
16 reg:
17 maxItems: 1
18
19 clocks:
20 maxItems: 1
21
22 clock-names:
23 const: emmcclk
24
25 drive-impedance-ohm:
26 $ref: /schemas/types.yaml#/definitions/uint32
27 description:
28 Specifies the drive impedance in Ohm.
29 enum: [33, 40, 50, 66, 100]
30 default: 50
31
32 rockchip,enable-strobe-pulldown:
33 type: boolean
34 description: |
35 Enable internal pull-down for the strobe
36 line. If not set, pull-down is not used.
37
38 rockchip,output-tapdelay-select:
39 $ref: /schemas/types.yaml#/definitions/uint32
40 description:
41 Specifies the phyctrl_otapdlysec register.
42 default: 0x4
43 maximum: 0xf
44
45 "#phy-cells":
46 const: 0
47
48required:
49 - compatible
50 - reg
51 - "#phy-cells"
52
53additionalProperties: false
54
55examples:
56 - |
57 phy@f780 {
58 compatible = "rockchip,rk3399-emmc-phy";
59 reg = <0xf780 0x20>;
60 clocks = <&sdhci>;
61 clock-names = "emmcclk";
62 drive-impedance-ohm = <50>;
63 #phy-cells = <0>;
64 };