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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ethernet PHY Common Properties
8
9maintainers:
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
13
14# The dt-schema tools will generate a select statement first by using
15# the compatible, and second by using the node name if any. In our
16# case, the node name is the one we want to match on, while the
17# compatible is optional.
18select:
19 properties:
20 $nodename:
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
22
23 required:
24 - $nodename
25
26properties:
27 $nodename:
28 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
29
30 compatible:
31 oneOf:
32 - const: ethernet-phy-ieee802.3-c22
33 description: PHYs that implement IEEE802.3 clause 22
34 - const: ethernet-phy-ieee802.3-c45
35 description: PHYs that implement IEEE802.3 clause 45
36 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
37 description:
38 If the PHY reports an incorrect ID (or none at all) then the
39 compatible list may contain an entry with the correct PHY ID
40 in the above form.
41 The first group of digits is the 16 bit Phy Identifier 1
42 register, this is the chip vendor OUI bits 3:18. The
43 second group of digits is the Phy Identifier 2 register,
44 this is the chip vendor OUI bits 19:24, followed by 10
45 bits of a vendor specific ID.
46 - items:
47 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
48 - const: ethernet-phy-ieee802.3-c22
49 - items:
50 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
51 - const: ethernet-phy-ieee802.3-c45
52
53 reg:
54 minimum: 0
55 maximum: 31
56 description:
57 The ID number for the PHY.
58
59 interrupts:
60 maxItems: 1
61
62 max-speed:
63 enum:
64 - 10
65 - 100
66 - 1000
67 - 2500
68 - 5000
69 - 10000
70 - 20000
71 - 25000
72 - 40000
73 - 50000
74 - 56000
75 - 100000
76 - 200000
77 description:
78 Maximum PHY supported speed in Mbits / seconds.
79
80 phy-10base-t1l-2.4vpp:
81 description: |
82 tristate, request/disable 2.4 Vpp operating mode. The values are:
83 0: Disable 2.4 Vpp operating mode.
84 1: Request 2.4 Vpp operating mode from link partner.
85 Absence of this property will leave configuration to default values.
86 $ref: /schemas/types.yaml#/definitions/uint32
87 enum: [0, 1]
88
89 broken-turn-around:
90 $ref: /schemas/types.yaml#/definitions/flag
91 description:
92 If set, indicates the PHY device does not correctly release
93 the turn around line low at end of the control phase of the
94 MDIO transaction.
95
Tom Rini6b642ac2024-10-01 12:20:28 -060096 brr-mode:
97 $ref: /schemas/types.yaml#/definitions/flag
98 description:
99 If set, indicates the network cable interface is an alternative one as
100 defined in the BroadR-Reach link mode specification under 1BR-100 and
101 1BR-10 names. The PHY must be configured to operate in BroadR-Reach mode
102 by software.
103
Tom Rini53633a82024-02-29 12:33:36 -0500104 clocks:
105 maxItems: 1
106 description:
107 External clock connected to the PHY. If not specified it is assumed
108 that the PHY uses a fixed crystal or an internal oscillator.
109
110 enet-phy-lane-swap:
111 $ref: /schemas/types.yaml#/definitions/flag
112 description:
113 If set, indicates the PHY will swap the TX/RX lanes to
114 compensate for the board being designed with the lanes
115 swapped.
116
117 enet-phy-lane-no-swap:
118 $ref: /schemas/types.yaml#/definitions/flag
119 description:
120 If set, indicates that PHY will disable swap of the
121 TX/RX lanes. This property allows the PHY to work correctly after
122 e.g. wrong bootstrap configuration caused by issues in PCB
123 layout design.
124
125 eee-broken-100tx:
126 $ref: /schemas/types.yaml#/definitions/flag
127 description:
128 Mark the corresponding energy efficient ethernet mode as
129 broken and request the ethernet to stop advertising it.
130
131 eee-broken-1000t:
132 $ref: /schemas/types.yaml#/definitions/flag
133 description:
134 Mark the corresponding energy efficient ethernet mode as
135 broken and request the ethernet to stop advertising it.
136
137 eee-broken-10gt:
138 $ref: /schemas/types.yaml#/definitions/flag
139 description:
140 Mark the corresponding energy efficient ethernet mode as
141 broken and request the ethernet to stop advertising it.
142
143 eee-broken-1000kx:
144 $ref: /schemas/types.yaml#/definitions/flag
145 description:
146 Mark the corresponding energy efficient ethernet mode as
147 broken and request the ethernet to stop advertising it.
148
149 eee-broken-10gkx4:
150 $ref: /schemas/types.yaml#/definitions/flag
151 description:
152 Mark the corresponding energy efficient ethernet mode as
153 broken and request the ethernet to stop advertising it.
154
155 eee-broken-10gkr:
156 $ref: /schemas/types.yaml#/definitions/flag
157 description:
158 Mark the corresponding energy efficient ethernet mode as
159 broken and request the ethernet to stop advertising it.
160
161 pses:
162 $ref: /schemas/types.yaml#/definitions/phandle-array
163 maxItems: 1
164 description:
165 Specifies a reference to a node representing a Power Sourcing Equipment.
166
167 phy-is-integrated:
168 $ref: /schemas/types.yaml#/definitions/flag
169 description:
170 If set, indicates that the PHY is integrated into the same
171 physical package as the Ethernet MAC. If needed, muxers
172 should be configured to ensure the integrated PHY is
173 used. The absence of this property indicates the muxers
174 should be configured so that the external PHY is used.
175
176 resets:
177 maxItems: 1
178
179 reset-names:
180 const: phy
181
182 reset-gpios:
183 maxItems: 1
184 description:
185 The GPIO phandle and specifier for the PHY reset signal.
186
187 reset-assert-us:
188 description:
189 Delay after the reset was asserted in microseconds. If this
190 property is missing the delay will be skipped.
191
192 reset-deassert-us:
193 description:
194 Delay after the reset was deasserted in microseconds. If
195 this property is missing the delay will be skipped.
196
197 sfp:
198 $ref: /schemas/types.yaml#/definitions/phandle
199 description:
200 Specifies a reference to a node representing a SFP cage.
201
202 rx-internal-delay-ps:
203 description: |
204 RGMII Receive PHY Clock Delay defined in pico seconds. This is used for
205 PHY's that have configurable RX internal delays. If this property is
206 present then the PHY applies the RX delay.
207
208 tx-internal-delay-ps:
209 description: |
210 RGMII Transmit PHY Clock Delay defined in pico seconds. This is used for
211 PHY's that have configurable TX internal delays. If this property is
212 present then the PHY applies the TX delay.
213
214 leds:
215 type: object
216
217 properties:
218 '#address-cells':
219 const: 1
220
221 '#size-cells':
222 const: 0
223
224 patternProperties:
225 '^led@[a-f0-9]+$':
226 $ref: /schemas/leds/common.yaml#
227
228 properties:
229 reg:
230 maxItems: 1
231 description:
232 This define the LED index in the PHY or the MAC. It's really
233 driver dependent and required for ports that define multiple
234 LED for the same port.
235
236 required:
237 - reg
238
239 unevaluatedProperties: false
240
241 additionalProperties: false
242
243required:
244 - reg
245
246additionalProperties: true
247
248examples:
249 - |
250 #include <dt-bindings/leds/common.h>
251
252 ethernet {
253 #address-cells = <1>;
254 #size-cells = <0>;
255
256 ethernet-phy@0 {
257 compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c45";
258 interrupt-parent = <&PIC>;
259 interrupts = <35 1>;
260 reg = <0>;
261
262 resets = <&rst 8>;
263 reset-names = "phy";
264 reset-gpios = <&gpio1 4 1>;
265 reset-assert-us = <1000>;
266 reset-deassert-us = <2000>;
267
268 leds {
269 #address-cells = <1>;
270 #size-cells = <0>;
271
272 led@0 {
273 reg = <0>;
274 color = <LED_COLOR_ID_WHITE>;
275 function = LED_FUNCTION_LAN;
276 default-state = "keep";
277 };
278 };
279 };
280 };