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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-extirq.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Layerscape External Interrupt Controller
8
9maintainers:
10 - Shawn Guo <shawnguo@kernel.org>
Tom Rini53633a82024-02-29 12:33:36 -050011
12description: |
13 Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA,
14 LX216xA) support inverting the polarity of certain external interrupt
15 lines.
16
17properties:
18 compatible:
19 oneOf:
20 - enum:
21 - fsl,ls1021a-extirq
22 - fsl,ls1043a-extirq
23 - fsl,ls1088a-extirq
24 - items:
25 - enum:
26 - fsl,ls1046a-extirq
27 - const: fsl,ls1043a-extirq
28 - items:
29 - enum:
30 - fsl,ls2080a-extirq
31 - fsl,lx2160a-extirq
32 - const: fsl,ls1088a-extirq
33
34 '#interrupt-cells':
35 const: 2
36
37 '#address-cells':
38 const: 0
39
40 interrupt-controller: true
41
42 reg:
43 maxItems: 1
44 description:
45 Specifies the Interrupt Polarity Control Register (INTPCR) in the
46 SCFG or the External Interrupt Control Register (IRQCR) in the ISC.
47
48 interrupt-map:
49 description: Specifies the mapping from external interrupts to GIC interrupts.
50
51 interrupt-map-mask: true
52
53required:
54 - compatible
55 - '#interrupt-cells'
56 - '#address-cells'
57 - interrupt-controller
58 - reg
59 - interrupt-map
60 - interrupt-map-mask
61
62allOf:
63 - if:
64 properties:
65 compatible:
66 contains:
67 enum:
68 - fsl,ls1021a-extirq
69 then:
70 properties:
71 interrupt-map:
72 minItems: 6
73 maxItems: 6
74 interrupt-map-mask:
75 items:
76 - const: 0x7
77 - const: 0
78 - if:
79 properties:
80 compatible:
81 contains:
82 enum:
83 - fsl,ls1043a-extirq
84 - fsl,ls1046a-extirq
85 - fsl,ls1088a-extirq
86 - fsl,ls2080a-extirq
87 - fsl,lx2160a-extirq
88 then:
89 properties:
90 interrupt-map:
91 minItems: 12
92 maxItems: 12
93 interrupt-map-mask:
94 items:
95 - const: 0xf
96 - const: 0
97
98additionalProperties: false
99
100examples:
101 - |
102 #include <dt-bindings/interrupt-controller/arm-gic.h>
103 interrupt-controller@1ac {
104 compatible = "fsl,ls1021a-extirq";
105 #interrupt-cells = <2>;
106 #address-cells = <0>;
107 interrupt-controller;
108 reg = <0x1ac 4>;
109 interrupt-map =
110 <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
111 <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
112 <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
113 <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
114 <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
115 <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
116 interrupt-map-mask = <0x7 0x0>;
117 };