| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Amlogic Meson SAR (Successive Approximation Register) A/D converter |
| 8 | |
| 9 | maintainers: |
| 10 | - Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
| 11 | |
| 12 | description: |
| 13 | Binding covers a range of ADCs found on Amlogic Meson SoCs. |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | oneOf: |
| 18 | - const: amlogic,meson-saradc |
| 19 | - items: |
| 20 | - enum: |
| 21 | - amlogic,meson8-saradc |
| 22 | - amlogic,meson8b-saradc |
| 23 | - amlogic,meson8m2-saradc |
| 24 | - amlogic,meson-gxbb-saradc |
| 25 | - amlogic,meson-gxl-saradc |
| 26 | - amlogic,meson-gxm-saradc |
| 27 | - amlogic,meson-axg-saradc |
| 28 | - amlogic,meson-g12a-saradc |
| 29 | - const: amlogic,meson-saradc |
| 30 | |
| 31 | reg: |
| 32 | maxItems: 1 |
| 33 | |
| 34 | interrupts: |
| 35 | description: Interrupt indicates end of sampling. |
| 36 | maxItems: 1 |
| 37 | |
| 38 | clocks: |
| 39 | minItems: 2 |
| 40 | maxItems: 4 |
| 41 | |
| 42 | clock-names: |
| 43 | minItems: 2 |
| 44 | items: |
| 45 | - const: clkin |
| 46 | - const: core |
| 47 | - const: adc_clk |
| 48 | - const: adc_sel |
| 49 | |
| 50 | vref-supply: true |
| 51 | |
| 52 | "#io-channel-cells": |
| 53 | const: 1 |
| 54 | |
| 55 | amlogic,hhi-sysctrl: |
| 56 | $ref: /schemas/types.yaml#/definitions/phandle |
| 57 | description: |
| 58 | Syscon which contains the 5th bit of the TSC (temperature sensor |
| 59 | coefficient) on Meson8b and Meson8m2 (which used to calibrate the |
| 60 | temperature sensor) |
| 61 | |
| 62 | nvmem-cells: |
| 63 | description: phandle to the temperature_calib eFuse cells |
| 64 | maxItems: 1 |
| 65 | |
| 66 | nvmem-cell-names: |
| 67 | const: temperature_calib |
| 68 | |
| Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 69 | power-domains: |
| 70 | maxItems: 1 |
| 71 | |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 72 | allOf: |
| 73 | - if: |
| 74 | properties: |
| 75 | compatible: |
| 76 | contains: |
| 77 | enum: |
| 78 | - amlogic,meson8-saradc |
| 79 | - amlogic,meson8b-saradc |
| 80 | - amlogic,meson8m2-saradc |
| 81 | then: |
| 82 | properties: |
| 83 | clocks: |
| 84 | maxItems: 2 |
| 85 | clock-names: |
| 86 | maxItems: 2 |
| 87 | else: |
| 88 | properties: |
| 89 | nvmem-cells: false |
| 90 | mvmem-cel-names: false |
| 91 | clocks: |
| 92 | minItems: 4 |
| 93 | clock-names: |
| 94 | minItems: 4 |
| 95 | |
| 96 | - if: |
| 97 | properties: |
| 98 | compatible: |
| 99 | contains: |
| 100 | enum: |
| 101 | - amlogic,meson8b-saradc |
| 102 | - amlogic,meson8m2-saradc |
| 103 | then: |
| 104 | properties: |
| 105 | amlogic,hhi-sysctrl: true |
| 106 | else: |
| 107 | properties: |
| 108 | amlogic,hhi-sysctrl: false |
| 109 | |
| 110 | required: |
| 111 | - compatible |
| 112 | - reg |
| 113 | - interrupts |
| 114 | - clocks |
| 115 | - clock-names |
| 116 | - "#io-channel-cells" |
| 117 | |
| 118 | additionalProperties: false |
| 119 | |
| 120 | examples: |
| 121 | - | |
| 122 | #include <dt-bindings/interrupt-controller/irq.h> |
| 123 | #include <dt-bindings/clock/gxbb-clkc.h> |
| 124 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 125 | soc { |
| 126 | #address-cells = <2>; |
| 127 | #size-cells = <2>; |
| 128 | adc@8680 { |
| 129 | compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; |
| 130 | #io-channel-cells = <1>; |
| 131 | reg = <0x0 0x8680 0x0 0x34>; |
| 132 | interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; |
| 133 | clocks = <&xtal>, |
| 134 | <&clkc CLKID_SAR_ADC>, |
| 135 | <&clkc CLKID_SAR_ADC_CLK>, |
| 136 | <&clkc CLKID_SAR_ADC_SEL>; |
| 137 | clock-names = "clkin", "core", "adc_clk", "adc_sel"; |
| 138 | }; |
| 139 | adc@9680 { |
| 140 | compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; |
| 141 | #io-channel-cells = <1>; |
| 142 | reg = <0x0 0x9680 0x0 0x34>; |
| 143 | interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; |
| 144 | clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; |
| 145 | clock-names = "clkin", "core"; |
| 146 | nvmem-cells = <&tsens_caldata>; |
| 147 | nvmem-cell-names = "temperature_calib"; |
| 148 | amlogic,hhi-sysctrl = <&hhi>; |
| 149 | }; |
| 150 | }; |
| 151 | ... |