| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/dma/fsl,imx-sdma.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Freescale Smart Direct Memory Access (SDMA) Controller for i.MX |
| 8 | |
| 9 | maintainers: |
| 10 | - Joy Zou <joy.zou@nxp.com> |
| 11 | |
| 12 | allOf: |
| 13 | - $ref: dma-controller.yaml# |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | oneOf: |
| 18 | - items: |
| 19 | - enum: |
| 20 | - fsl,imx50-sdma |
| 21 | - fsl,imx51-sdma |
| 22 | - fsl,imx53-sdma |
| 23 | - fsl,imx6q-sdma |
| 24 | - fsl,imx7d-sdma |
| 25 | - const: fsl,imx35-sdma |
| 26 | - items: |
| 27 | - enum: |
| 28 | - fsl,imx6sx-sdma |
| 29 | - fsl,imx6sl-sdma |
| 30 | - const: fsl,imx6q-sdma |
| 31 | - items: |
| 32 | - const: fsl,imx6ul-sdma |
| 33 | - const: fsl,imx6q-sdma |
| 34 | - const: fsl,imx35-sdma |
| 35 | - items: |
| 36 | - const: fsl,imx6sll-sdma |
| 37 | - const: fsl,imx6ul-sdma |
| 38 | - items: |
| 39 | - const: fsl,imx8mq-sdma |
| 40 | - const: fsl,imx7d-sdma |
| 41 | - items: |
| 42 | - enum: |
| 43 | - fsl,imx8mp-sdma |
| 44 | - fsl,imx8mn-sdma |
| 45 | - fsl,imx8mm-sdma |
| 46 | - const: fsl,imx8mq-sdma |
| 47 | - items: |
| 48 | - enum: |
| 49 | - fsl,imx25-sdma |
| 50 | - fsl,imx31-sdma |
| 51 | - fsl,imx35-sdma |
| 52 | reg: |
| 53 | maxItems: 1 |
| 54 | |
| 55 | interrupts: |
| 56 | maxItems: 1 |
| 57 | |
| 58 | fsl,sdma-ram-script-name: |
| 59 | $ref: /schemas/types.yaml#/definitions/string |
| 60 | description: Should contain the full path of SDMA RAM scripts firmware. |
| 61 | |
| 62 | "#dma-cells": |
| 63 | const: 3 |
| 64 | description: | |
| 65 | The first cell: request/event ID |
| 66 | |
| 67 | The second cell: peripheral types ID |
| 68 | enum: |
| 69 | - MCU domain SSI: 0 |
| 70 | - Shared SSI: 1 |
| 71 | - MMC: 2 |
| 72 | - SDHC: 3 |
| 73 | - MCU domain UART: 4 |
| 74 | - Shared UART: 5 |
| 75 | - FIRI: 6 |
| 76 | - MCU domain CSPI: 7 |
| 77 | - Shared CSPI: 8 |
| 78 | - SIM: 9 |
| 79 | - ATA: 10 |
| 80 | - CCM: 11 |
| 81 | - External peripheral: 12 |
| 82 | - Memory Stick Host Controller: 13 |
| 83 | - Shared Memory Stick Host Controller: 14 |
| 84 | - DSP: 15 |
| 85 | - Memory: 16 |
| 86 | - FIFO type Memory: 17 |
| 87 | - SPDIF: 18 |
| 88 | - IPU Memory: 19 |
| 89 | - ASRC: 20 |
| 90 | - ESAI: 21 |
| 91 | - SSI Dual FIFO: 22 |
| 92 | description: needs firmware more than ver 2 |
| 93 | - Shared ASRC: 23 |
| 94 | - SAI: 24 |
| Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 95 | - Multi SAI: 25 |
| 96 | - HDMI Audio: 26 |
| Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 97 | - I2C: 27 |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 98 | |
| 99 | The third cell: transfer priority ID |
| 100 | enum: |
| 101 | - High: 0 |
| 102 | - Medium: 1 |
| 103 | - Low: 2 |
| 104 | |
| 105 | gpr: |
| 106 | $ref: /schemas/types.yaml#/definitions/phandle |
| 107 | description: The phandle to the General Purpose Register (GPR) node |
| 108 | |
| 109 | fsl,sdma-event-remap: |
| 110 | $ref: /schemas/types.yaml#/definitions/uint32-matrix |
| 111 | maxItems: 2 |
| 112 | items: |
| 113 | items: |
| 114 | - description: GPR register offset |
| 115 | - description: GPR register shift |
| 116 | - description: GPR register value |
| 117 | description: | |
| 118 | Register bits of sdma event remap, the format is <reg shift val>. |
| 119 | The order is <RX>, <TX>. |
| 120 | |
| 121 | clocks: |
| 122 | maxItems: 2 |
| 123 | |
| 124 | clock-names: |
| 125 | items: |
| 126 | - const: ipg |
| 127 | - const: ahb |
| 128 | |
| 129 | iram: |
| 130 | $ref: /schemas/types.yaml#/definitions/phandle |
| 131 | description: The phandle to the On-chip RAM (OCRAM) node. |
| 132 | |
| 133 | required: |
| 134 | - compatible |
| 135 | - reg |
| 136 | - interrupts |
| 137 | - fsl,sdma-ram-script-name |
| 138 | |
| 139 | additionalProperties: false |
| 140 | |
| 141 | examples: |
| 142 | - | |
| 143 | sdma: dma-controller@83fb0000 { |
| 144 | compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; |
| 145 | reg = <0x83fb0000 0x4000>; |
| 146 | interrupts = <6>; |
| 147 | #dma-cells = <3>; |
| 148 | fsl,sdma-ram-script-name = "sdma-imx51.bin"; |
| 149 | }; |
| 150 | |
| 151 | ... |