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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX6 DWC HDMI TX Encoder
8
9maintainers:
10 - Philipp Zabel <p.zabel@pengutronix.de>
11
12description: |
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
14 with a companion PHY IP.
15
16allOf:
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
18
19properties:
20 compatible:
21 enum:
22 - fsl,imx6dl-hdmi
23 - fsl,imx6q-hdmi
24
25 reg-io-width:
26 const: 1
27
28 clocks:
29 maxItems: 2
30
31 clock-names:
32 maxItems: 2
33
Tom Rini53633a82024-02-29 12:33:36 -050034 gpr:
35 $ref: /schemas/types.yaml#/definitions/phandle
36 description:
37 phandle to the iomuxc-gpr region containing the HDMI multiplexer control
38 register.
39
40 ports:
41 $ref: /schemas/graph.yaml#/properties/ports
42 description: |
43 This device has four video ports, corresponding to the four inputs of the
44 HDMI multiplexer. Each port shall have a single endpoint.
45
46 properties:
47 port@0:
48 $ref: /schemas/graph.yaml#/properties/port
49 description: First input of the HDMI multiplexer
50
51 port@1:
52 $ref: /schemas/graph.yaml#/properties/port
53 description: Second input of the HDMI multiplexer
54
55 port@2:
56 $ref: /schemas/graph.yaml#/properties/port
57 description: Third input of the HDMI multiplexer
58
59 port@3:
60 $ref: /schemas/graph.yaml#/properties/port
61 description: Fourth input of the HDMI multiplexer
62
63 anyOf:
64 - required:
65 - port@0
66 - required:
67 - port@1
68 - required:
69 - port@2
70 - required:
71 - port@3
72
73required:
74 - compatible
75 - reg
76 - clocks
77 - clock-names
78 - gpr
79 - interrupts
80 - ports
81
82unevaluatedProperties: false
83
84examples:
85 - |
86 #include <dt-bindings/clock/imx6qdl-clock.h>
87
88 hdmi: hdmi@120000 {
89 reg = <0x00120000 0x9000>;
90 interrupts = <0 115 0x04>;
91 gpr = <&gpr>;
92 clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>,
93 <&clks IMX6QDL_CLK_HDMI_ISFR>;
94 clock-names = "iahb", "isfr";
95
96 ports {
97 #address-cells = <1>;
98 #size-cells = <0>;
99
100 port@0 {
101 reg = <0>;
102
103 hdmi_mux_0: endpoint {
104 remote-endpoint = <&ipu1_di0_hdmi>;
105 };
106 };
107
108 port@1 {
109 reg = <1>;
110
111 hdmi_mux_1: endpoint {
112 remote-endpoint = <&ipu1_di1_hdmi>;
113 };
114 };
115 };
116 };
117
118...