blob: 037ffc71e70e08d8e14e64fa2ac526665471e397 [file] [log] [blame]
Tom Rini6b642ac2024-10-01 12:20:28 -06001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm7150-videocc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Video Clock & Reset Controller on SM7150
8
9maintainers:
10 - Danila Tikhonov <danila@jiaxyga.com>
11 - David Wronek <david@mainlining.org>
12 - Jens Reidel <adrian@travitia.xyz>
13
14description: |
15 Qualcomm video clock control module provides the clocks, resets and power
16 domains on SM7150.
17
18 See also:: include/dt-bindings/clock/qcom,videocc-sm7150.h
19
20properties:
21 compatible:
22 const: qcom,sm7150-videocc
23
24 clocks:
25 items:
26 - description: Board XO source
27 - description: Board Always On XO source
28
29 power-domains:
30 maxItems: 1
31 description:
32 CX power domain.
33
34required:
35 - compatible
36 - clocks
37 - power-domains
38
39allOf:
40 - $ref: qcom,gcc.yaml#
41
42unevaluatedProperties: false
43
44examples:
45 - |
46 #include <dt-bindings/clock/qcom,rpmh.h>
47 #include <dt-bindings/power/qcom,rpmhpd.h>
48 videocc: clock-controller@ab00000 {
49 compatible = "qcom,sm7150-videocc";
50 reg = <0x0ab00000 0x10000>;
51 clocks = <&rpmhcc RPMH_CXO_CLK>,
52 <&rpmhcc RPMH_CXO_CLK_A>;
53 power-domains = <&rpmhpd RPMHPD_CX>;
54 #clock-cells = <1>;
55 #reset-cells = <1>;
56 #power-domain-cells = <1>;
57 };
58...