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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Felipe Balbi24252da2017-07-05 20:33:20 +03002/*
3 * Copyright (c) 2017 Intel Corporation
Felipe Balbi24252da2017-07-05 20:33:20 +03004 */
5#include <common.h>
Andy Shevchenkod13a8a32019-06-21 13:28:08 +03006#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -06007#include <log.h>
Andy Shevchenkod13a8a32019-06-21 13:28:08 +03008#include <wdt.h>
9#include <div64.h>
Felipe Balbi24252da2017-07-05 20:33:20 +030010#include <asm/scu.h>
11
12/* Hardware timeout in seconds */
13#define WDT_PRETIMEOUT 15
14#define WDT_TIMEOUT_MIN (1 + WDT_PRETIMEOUT)
15#define WDT_TIMEOUT_MAX 170
Andy Shevchenko8e192e82019-06-21 13:28:07 +030016
17/*
18 * Note, firmware chooses 90 seconds as a default timeout for watchdog on
19 * Intel Tangier SoC. It means that without handling it in the running code
20 * the reboot will happen.
21 */
Felipe Balbi24252da2017-07-05 20:33:20 +030022
Felipe Balbi24252da2017-07-05 20:33:20 +030023enum {
24 SCU_WATCHDOG_START = 0,
25 SCU_WATCHDOG_STOP = 1,
26 SCU_WATCHDOG_KEEPALIVE = 2,
27 SCU_WATCHDOG_SET_ACTION_ON_TIMEOUT = 3,
28};
29
Andy Shevchenkod13a8a32019-06-21 13:28:08 +030030static int tangier_wdt_reset(struct udevice *dev)
Felipe Balbi24252da2017-07-05 20:33:20 +030031{
Andy Shevchenkod13a8a32019-06-21 13:28:08 +030032 scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_KEEPALIVE);
33 return 0;
Felipe Balbi24252da2017-07-05 20:33:20 +030034}
35
Andy Shevchenkod13a8a32019-06-21 13:28:08 +030036static int tangier_wdt_stop(struct udevice *dev)
Felipe Balbi24252da2017-07-05 20:33:20 +030037{
38 return scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_STOP);
39}
40
Andy Shevchenkod13a8a32019-06-21 13:28:08 +030041static int tangier_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
Felipe Balbi24252da2017-07-05 20:33:20 +030042{
Andy Shevchenkod13a8a32019-06-21 13:28:08 +030043 u32 timeout_sec;
Felipe Balbi24252da2017-07-05 20:33:20 +030044 int in_size;
45 struct ipc_wd_start {
46 u32 pretimeout;
47 u32 timeout;
Andy Shevchenkod13a8a32019-06-21 13:28:08 +030048 } ipc_wd_start;
49
50 /* Calculate timeout in seconds and restrict to min and max value */
51 do_div(timeout_ms, 1000);
52 timeout_sec = clamp_t(u32, timeout_ms, WDT_TIMEOUT_MIN, WDT_TIMEOUT_MAX);
53
54 /* Update values in the IPC request */
55 ipc_wd_start.pretimeout = timeout_sec - WDT_PRETIMEOUT;
56 ipc_wd_start.timeout = timeout_sec;
Felipe Balbi24252da2017-07-05 20:33:20 +030057
58 /*
59 * SCU expects the input size for watchdog IPC
60 * to be based on 4 bytes
61 */
62 in_size = DIV_ROUND_UP(sizeof(ipc_wd_start), 4);
63
64 scu_ipc_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_START,
65 (u32 *)&ipc_wd_start, in_size, NULL, 0);
Andy Shevchenkod13a8a32019-06-21 13:28:08 +030066
67 return 0;
68}
69
70static const struct wdt_ops tangier_wdt_ops = {
71 .reset = tangier_wdt_reset,
72 .start = tangier_wdt_start,
73 .stop = tangier_wdt_stop,
74};
75
76static const struct udevice_id tangier_wdt_ids[] = {
77 { .compatible = "intel,tangier-wdt" },
78 { /* sentinel */ }
79};
80
81static int tangier_wdt_probe(struct udevice *dev)
82{
83 debug("%s: Probing wdt%u\n", __func__, dev->seq);
84 return 0;
Felipe Balbi24252da2017-07-05 20:33:20 +030085}
Andy Shevchenkod13a8a32019-06-21 13:28:08 +030086
87U_BOOT_DRIVER(wdt_tangier) = {
88 .name = "wdt_tangier",
89 .id = UCLASS_WDT,
90 .of_match = tangier_wdt_ids,
91 .ops = &tangier_wdt_ops,
92 .probe = tangier_wdt_probe,
93};