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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Sricharan9310ff72011-11-15 09:49:55 -05002/*
3 * (C) Copyright 2010
4 * Texas Instruments Incorporated, <www.ti.com>
5 * Aneesh V <aneesh@ti.com>
6 * Steve Sakoman <steve@sakoman.com>
Sricharan9310ff72011-11-15 09:49:55 -05007 */
8#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -06009#include <init.h>
Simon Glass274e0b02020-05-10 11:39:56 -060010#include <net.h>
Nishanth Menon627612c2013-03-26 05:20:54 +000011#include <palmas.h>
Kishon Vijay Abraham I5a3e0622015-08-19 14:13:20 +053012#include <asm/arch/omap.h>
Sricharan9310ff72011-11-15 09:49:55 -050013#include <asm/arch/sys_proto.h>
14#include <asm/arch/mmc_host_def.h>
Dan Murphy05d5f992013-07-11 13:10:28 -050015#include <tca642x.h>
Kishon Vijay Abraham I5a3e0622015-08-19 14:13:20 +053016#include <usb.h>
17#include <linux/usb/gadget.h>
18#include <dwc3-uboot.h>
19#include <dwc3-omap-uboot.h>
20#include <ti-usb-phy-uboot.h>
Sricharan9310ff72011-11-15 09:49:55 -050021
22#include "mux_data.h"
23
Tom Riniceed5d22017-05-12 22:33:27 -040024#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
Dan Murphy57f29ab2014-02-03 06:59:02 -060025#include <sata.h>
Dan Murphy29d04b52013-08-01 14:05:59 -050026#include <usb.h>
Dan Murphydc649b32013-08-01 14:06:02 -050027#include <asm/gpio.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060028#include <asm/mach-types.h>
Dan Murphy29d04b52013-08-01 14:05:59 -050029#include <asm/arch/clock.h>
30#include <asm/arch/ehci.h>
31#include <asm/ehci-omap.h>
Roger Quadrosd88ab9c2013-11-11 16:56:42 +020032#include <asm/arch/sata.h>
Dan Murphy0a1df4f2013-08-01 14:06:00 -050033
34#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000)
35#define DIE_ID_REG_OFFSET 0x200
36
Dan Murphy29d04b52013-08-01 14:05:59 -050037#endif
38
Sricharan9310ff72011-11-15 09:49:55 -050039DECLARE_GLOBAL_DATA_PTR;
40
41const struct omap_sysinfo sysinfo = {
Dan Murphy3713e9d2013-08-01 14:05:56 -050042 "Board: OMAP5432 uEVM\n"
Sricharan9310ff72011-11-15 09:49:55 -050043};
44
45/**
Dan Murphy05d5f992013-07-11 13:10:28 -050046 * @brief tca642x_init - uEVM default values for the GPIO expander
47 * input reg, output reg, polarity reg, configuration reg
48 */
49struct tca642x_bank_info tca642x_init[] = {
50 { .input_reg = 0x00,
51 .output_reg = 0x04,
52 .polarity_reg = 0x00,
53 .configuration_reg = 0x80 },
54 { .input_reg = 0x00,
55 .output_reg = 0x00,
56 .polarity_reg = 0x00,
57 .configuration_reg = 0xff },
58 { .input_reg = 0x00,
59 .output_reg = 0x00,
60 .polarity_reg = 0x00,
61 .configuration_reg = 0x40 },
62};
63
Kishon Vijay Abraham I5a3e0622015-08-19 14:13:20 +053064#ifdef CONFIG_USB_DWC3
65static struct dwc3_device usb_otg_ss = {
66 .maximum_speed = USB_SPEED_SUPER,
67 .base = OMAP5XX_USB_OTG_SS_BASE,
68 .tx_fifo_resize = false,
69 .index = 0,
70};
71
72static struct dwc3_omap_device usb_otg_ss_glue = {
73 .base = (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE,
74 .utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
75 .index = 0,
76};
77
78static struct ti_usb_phy_device usb_phy_device = {
79 .pll_ctrl_base = (void *)OMAP5XX_USB3_PHY_PLL_CTRL,
80 .usb2_phy_power = (void *)OMAP5XX_USB2_PHY_POWER,
81 .usb3_phy_power = (void *)OMAP5XX_USB3_PHY_POWER,
82 .index = 0,
83};
84
85int board_usb_init(int index, enum usb_init_type init)
86{
87 if (index) {
88 printf("Invalid Controller Index\n");
89 return -EINVAL;
90 }
91
92 if (init == USB_INIT_DEVICE) {
93 usb_otg_ss.dr_mode = USB_DR_MODE_PERIPHERAL;
94 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
95 } else {
96 usb_otg_ss.dr_mode = USB_DR_MODE_HOST;
97 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
98 }
99
Kishon Vijay Abraham I831bcba2015-08-19 16:16:27 +0530100 enable_usb_clocks(index);
Kishon Vijay Abraham I5a3e0622015-08-19 14:13:20 +0530101 ti_usb_phy_uboot_init(&usb_phy_device);
102 dwc3_omap_uboot_init(&usb_otg_ss_glue);
103 dwc3_uboot_init(&usb_otg_ss);
104
105 return 0;
106}
107
108int board_usb_cleanup(int index, enum usb_init_type init)
109{
110 if (index) {
111 printf("Invalid Controller Index\n");
112 return -EINVAL;
113 }
114
115 ti_usb_phy_uboot_exit(index);
116 dwc3_uboot_exit(index);
117 dwc3_omap_uboot_exit(index);
Kishon Vijay Abraham I831bcba2015-08-19 16:16:27 +0530118 disable_usb_clocks(index);
Kishon Vijay Abraham I5a3e0622015-08-19 14:13:20 +0530119
120 return 0;
121}
122
123int usb_gadget_handle_interrupts(int index)
124{
125 u32 status;
126
127 status = dwc3_omap_uboot_interrupt_status(index);
128 if (status)
129 dwc3_uboot_handle_interrupt(index);
130
131 return 0;
132}
133#endif
134
Dan Murphy05d5f992013-07-11 13:10:28 -0500135/**
Sricharan9310ff72011-11-15 09:49:55 -0500136 * @brief board_init
137 *
138 * @return 0
139 */
140int board_init(void)
141{
142 gpmc_init();
Tom Rini48157342017-01-25 20:42:35 -0500143 gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
Sricharan9310ff72011-11-15 09:49:55 -0500144 gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
145
Dan Murphy05d5f992013-07-11 13:10:28 -0500146 tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
147
Sricharan9310ff72011-11-15 09:49:55 -0500148 return 0;
149}
150
151int board_eth_init(bd_t *bis)
152{
153 return 0;
154}
155
Tom Riniceed5d22017-05-12 22:33:27 -0400156#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
Dan Murphyd7fcc342013-08-26 08:54:53 -0500157static void enable_host_clocks(void)
158{
159 int auxclk;
160 int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
161 OPTFCLKEN_HSIC480M_P3_CLK |
162 OPTFCLKEN_HSIC60M_P2_CLK |
163 OPTFCLKEN_HSIC480M_P2_CLK |
164 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
165
166 /* Enable port 2 and 3 clocks*/
167 setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
168
169 /* Enable port 2 and 3 usb host ports tll clocks*/
170 setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
171 (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
172#ifdef CONFIG_USB_XHCI_OMAP
173 /* Enable the USB OTG Super speed clocks */
174 setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
175 (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
176#endif
177
178 auxclk = readl((*prcm)->scrm_auxclk1);
179 /* Request auxilary clock */
180 auxclk |= AUXCLK_ENABLE_MASK;
181 writel(auxclk, (*prcm)->scrm_auxclk1);
182}
183#endif
184
Sricharan9310ff72011-11-15 09:49:55 -0500185/**
186 * @brief misc_init_r - Configure EVM board specific configurations
187 * such as power configurations, ethernet initialization as phase2 of
188 * boot sequence
189 *
190 * @return 0
191 */
192int misc_init_r(void)
193{
Nishanth Menon627612c2013-03-26 05:20:54 +0000194#ifdef CONFIG_PALMAS_POWER
Nishanth Menonaa4f8362013-03-26 05:20:55 +0000195 palmas_init_settings();
Sricharan9310ff72011-11-15 09:49:55 -0500196#endif
Dan Murphyd7fcc342013-08-26 08:54:53 -0500197
Paul Kocialkowski2edadee2015-08-27 19:37:12 +0200198 omap_die_id_usbethaddr();
Dan Murphy2870a242013-10-11 12:28:19 -0500199
Sricharan9310ff72011-11-15 09:49:55 -0500200 return 0;
201}
202
Paul Kocialkowskia00b1e52016-02-27 19:18:56 +0100203void set_muxconf_regs(void)
Sricharan9310ff72011-11-15 09:49:55 -0500204{
Lokesh Vutla37bce592013-05-30 02:54:30 +0000205 do_set_mux((*ctrl)->control_padconf_core_base,
206 core_padconf_array_essential,
Sricharan9310ff72011-11-15 09:49:55 -0500207 sizeof(core_padconf_array_essential) /
208 sizeof(struct pad_conf_entry));
209
Lokesh Vutla37bce592013-05-30 02:54:30 +0000210 do_set_mux((*ctrl)->control_padconf_wkup_base,
211 wkup_padconf_array_essential,
Sricharan9310ff72011-11-15 09:49:55 -0500212 sizeof(wkup_padconf_array_essential) /
213 sizeof(struct pad_conf_entry));
214}
215
Masahiro Yamada0a780172017-05-09 20:31:39 +0900216#if defined(CONFIG_MMC)
Sricharan9310ff72011-11-15 09:49:55 -0500217int board_mmc_init(bd_t *bis)
218{
Nikita Kiryanov4be9dbc2012-12-03 02:19:47 +0000219 omap_mmc_init(0, 0, 0, -1, -1);
220 omap_mmc_init(1, 0, 0, -1, -1);
Sricharan9310ff72011-11-15 09:49:55 -0500221 return 0;
222}
Dan Murphy29d04b52013-08-01 14:05:59 -0500223#endif
224
Tom Riniceed5d22017-05-12 22:33:27 -0400225#ifdef CONFIG_USB_EHCI_HCD
Dan Murphy29d04b52013-08-01 14:05:59 -0500226static struct omap_usbhs_board_data usbhs_bdata = {
227 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
228 .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
229 .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
230};
231
Troy Kisky7d6bbb92013-10-10 15:27:57 -0700232int ehci_hcd_init(int index, enum usb_init_type init,
233 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Dan Murphy29d04b52013-08-01 14:05:59 -0500234{
235 int ret;
Dan Murphy29d04b52013-08-01 14:05:59 -0500236
237 enable_host_clocks();
238
Mateusz Zalegad862f892013-10-04 19:22:26 +0200239 ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
Dan Murphy29d04b52013-08-01 14:05:59 -0500240 if (ret < 0) {
241 puts("Failed to initialize ehci\n");
242 return ret;
243 }
244
245 return 0;
246}
247
248int ehci_hcd_stop(void)
249{
Masahiro Yamada04cfea52016-09-06 22:17:38 +0900250 return omap_ehci_hcd_stop();
Dan Murphy29d04b52013-08-01 14:05:59 -0500251}
Dan Murphydc649b32013-08-01 14:06:02 -0500252
Philipp Tomsich693f4922017-11-22 17:15:17 +0100253void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
Dan Murphydc649b32013-08-01 14:06:02 -0500254{
255 /* The LAN9730 needs to be reset after the port power has been set. */
256 if (port == 3) {
257 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
258 udelay(10);
259 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
260 }
261}
Sricharan9310ff72011-11-15 09:49:55 -0500262#endif
Dan Murphyd7fcc342013-08-26 08:54:53 -0500263
264#ifdef CONFIG_USB_XHCI_OMAP
265/**
266 * @brief board_usb_init - Configure EVM board specific configurations
267 * for the LDO's and clocks for the USB blocks.
268 *
269 * @return 0
270 */
Troy Kisky3135dba2013-10-22 14:27:17 -0700271int board_usb_init(int index, enum usb_init_type init)
Dan Murphyd7fcc342013-08-26 08:54:53 -0500272{
273 int ret;
274#ifdef CONFIG_PALMAS_USB_SS_PWR
275 ret = palmas_enable_ss_ldo();
276#endif
277
278 enable_host_clocks();
279
280 return 0;
281}
282#endif