blob: 1570d110bfd34f0e716924ef37705e430d20ee53 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Patrice Chotardac871ab2018-01-18 13:39:32 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
Patrice Chotardac871ab2018-01-18 13:39:32 +01005 */
6
7#include <common.h>
8#include <dm.h>
Simon Glass97589732020-05-10 11:40:02 -06009#include <init.h>
Patrice Chotardac871ab2018-01-18 13:39:32 +010010
11#include <asm/io.h>
12#include <asm/arch/stm32.h>
13
14DECLARE_GLOBAL_DATA_PTR;
15
16int dram_init(void)
17{
18 int rv;
19 struct udevice *dev;
20
21 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
22 if (rv) {
23 debug("DRAM init failed: %d\n", rv);
24 return rv;
25 }
26
Siva Durga Prasad Paladugub3d55ea2018-07-16 15:56:11 +053027 if (fdtdec_setup_mem_size_base() != 0)
Patrice Chotardac871ab2018-01-18 13:39:32 +010028 rv = -EINVAL;
29
30 return rv;
31}
32
33int dram_init_banksize(void)
34{
35 fdtdec_setup_memory_banksize();
36
37 return 0;
38}
39
40u32 get_board_rev(void)
41{
42 return 0;
43}
44
45int board_early_init_f(void)
46{
47 return 0;
48}
49
50int board_init(void)
51{
Patrice Chotarda66c1b42018-08-03 11:46:11 +020052 gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
Patrice Chotardac871ab2018-01-18 13:39:32 +010053
54 return 0;
55}
56
57#ifdef CONFIG_MISC_INIT_R
58int misc_init_r(void)
59{
60 char serialno[25];
61 u32 u_id_low, u_id_mid, u_id_high;
62
63 if (!env_get("serial#")) {
64 u_id_low = readl(&STM32_U_ID->u_id_low);
65 u_id_mid = readl(&STM32_U_ID->u_id_mid);
66 u_id_high = readl(&STM32_U_ID->u_id_high);
67 sprintf(serialno, "%08x%08x%08x",
68 u_id_high, u_id_mid, u_id_low);
69 env_set("serial#", serialno);
70 }
71
72 return 0;
73}
74#endif