Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Sergey Temerkhanov | 69f7a03 | 2015-10-14 09:55:50 -0700 | [diff] [blame] | 2 | /** |
| 3 | * (C) Copyright 2014, Cavium Inc. |
Sergey Temerkhanov | 69f7a03 | 2015-10-14 09:55:50 -0700 | [diff] [blame] | 4 | **/ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | afb0215 | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 7 | #include <cpu_func.h> |
Simon Glass | 11c89f3 | 2017-05-17 17:18:03 -0600 | [diff] [blame] | 8 | #include <dm.h> |
Simon Glass | 18afe10 | 2019-11-14 12:57:47 -0700 | [diff] [blame] | 9 | #include <init.h> |
Sergey Temerkhanov | 69f7a03 | 2015-10-14 09:55:50 -0700 | [diff] [blame] | 10 | #include <malloc.h> |
| 11 | #include <errno.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 12 | #include <net.h> |
Sergey Temerkhanov | 69f7a03 | 2015-10-14 09:55:50 -0700 | [diff] [blame] | 13 | #include <linux/compiler.h> |
| 14 | |
Sergey Temerkhanov | 223f74d | 2015-10-14 09:55:52 -0700 | [diff] [blame] | 15 | #include <cavium/atf.h> |
Alexander Graf | 6b3e7ca | 2016-03-04 01:09:48 +0100 | [diff] [blame] | 16 | #include <asm/armv8/mmu.h> |
Sergey Temerkhanov | 223f74d | 2015-10-14 09:55:52 -0700 | [diff] [blame] | 17 | |
Sergey Temerkhanov | 69f7a03 | 2015-10-14 09:55:50 -0700 | [diff] [blame] | 18 | #if !CONFIG_IS_ENABLED(OF_CONTROL) |
Sergey Temerkhanov | 69f7a03 | 2015-10-14 09:55:50 -0700 | [diff] [blame] | 19 | #include <dm/platform_data/serial_pl01x.h> |
| 20 | |
| 21 | static const struct pl01x_serial_platdata serial0 = { |
| 22 | .base = CONFIG_SYS_SERIAL0, |
| 23 | .type = TYPE_PL011, |
| 24 | .clock = 0, |
| 25 | .skip_init = true, |
| 26 | }; |
| 27 | |
| 28 | U_BOOT_DEVICE(thunderx_serial0) = { |
| 29 | .name = "serial_pl01x", |
| 30 | .platdata = &serial0, |
| 31 | }; |
| 32 | |
| 33 | static const struct pl01x_serial_platdata serial1 = { |
| 34 | .base = CONFIG_SYS_SERIAL1, |
| 35 | .type = TYPE_PL011, |
| 36 | .clock = 0, |
| 37 | .skip_init = true, |
| 38 | }; |
| 39 | |
| 40 | U_BOOT_DEVICE(thunderx_serial1) = { |
| 41 | .name = "serial_pl01x", |
| 42 | .platdata = &serial1, |
| 43 | }; |
| 44 | #endif |
| 45 | |
| 46 | DECLARE_GLOBAL_DATA_PTR; |
| 47 | |
Alexander Graf | 6b3e7ca | 2016-03-04 01:09:48 +0100 | [diff] [blame] | 48 | static struct mm_region thunderx_mem_map[] = { |
| 49 | { |
York Sun | c7104e5 | 2016-06-24 16:46:22 -0700 | [diff] [blame] | 50 | .virt = 0x000000000000UL, |
| 51 | .phys = 0x000000000000UL, |
Alexander Graf | 6b3e7ca | 2016-03-04 01:09:48 +0100 | [diff] [blame] | 52 | .size = 0x40000000000UL, |
| 53 | .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE, |
| 54 | }, { |
York Sun | c7104e5 | 2016-06-24 16:46:22 -0700 | [diff] [blame] | 55 | .virt = 0x800000000000UL, |
| 56 | .phys = 0x800000000000UL, |
Alexander Graf | 6b3e7ca | 2016-03-04 01:09:48 +0100 | [diff] [blame] | 57 | .size = 0x40000000000UL, |
| 58 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 59 | PTE_BLOCK_NON_SHARE, |
| 60 | }, { |
York Sun | c7104e5 | 2016-06-24 16:46:22 -0700 | [diff] [blame] | 61 | .virt = 0x840000000000UL, |
| 62 | .phys = 0x840000000000UL, |
Alexander Graf | 6b3e7ca | 2016-03-04 01:09:48 +0100 | [diff] [blame] | 63 | .size = 0x40000000000UL, |
| 64 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 65 | PTE_BLOCK_NON_SHARE, |
| 66 | }, { |
| 67 | /* List terminator */ |
| 68 | 0, |
| 69 | } |
| 70 | }; |
| 71 | |
| 72 | struct mm_region *mem_map = thunderx_mem_map; |
| 73 | |
Sergey Temerkhanov | 69f7a03 | 2015-10-14 09:55:50 -0700 | [diff] [blame] | 74 | int board_init(void) |
| 75 | { |
| 76 | return 0; |
| 77 | } |
| 78 | |
| 79 | int timer_init(void) |
| 80 | { |
Sergey Temerkhanov | 223f74d | 2015-10-14 09:55:52 -0700 | [diff] [blame] | 81 | return 0; |
| 82 | } |
| 83 | |
| 84 | int dram_init(void) |
| 85 | { |
| 86 | ssize_t node_count = atf_node_count(); |
| 87 | ssize_t dram_size; |
| 88 | int node; |
| 89 | |
| 90 | printf("Initializing\nNodes in system: %zd\n", node_count); |
| 91 | |
| 92 | gd->ram_size = 0; |
| 93 | |
| 94 | for (node = 0; node < node_count; node++) { |
| 95 | dram_size = atf_dram_size(node); |
| 96 | printf("Node %d: %zd MBytes of DRAM\n", node, dram_size >> 20); |
| 97 | gd->ram_size += dram_size; |
| 98 | } |
| 99 | |
| 100 | gd->ram_size -= MEM_BASE; |
| 101 | |
| 102 | *(unsigned long *)CPU_RELEASE_ADDR = 0; |
| 103 | |
| 104 | puts("DRAM size:"); |
| 105 | |
Sergey Temerkhanov | 69f7a03 | 2015-10-14 09:55:50 -0700 | [diff] [blame] | 106 | return 0; |
| 107 | } |
| 108 | |
| 109 | /* |
| 110 | * Board specific reset that is system reset. |
| 111 | */ |
| 112 | void reset_cpu(ulong addr) |
| 113 | { |
| 114 | } |
| 115 | |
| 116 | /* |
| 117 | * Board specific ethernet initialization routine. |
| 118 | */ |
| 119 | int board_eth_init(bd_t *bis) |
| 120 | { |
| 121 | int rc = 0; |
| 122 | |
| 123 | return rc; |
| 124 | } |
| 125 | |
| 126 | #ifdef CONFIG_PCI |
| 127 | void pci_init_board(void) |
| 128 | { |
| 129 | printf("DEBUG: PCI Init TODO *****\n"); |
| 130 | } |
| 131 | #endif |