blob: 08b7d3519de1f62661e7401acbc814c7b598bcb8 [file] [log] [blame]
Jagan Tekicc464432020-01-09 14:22:15 +05301// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * (C) Copyright 2019 Amarula Solutions(India)
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
5 */
6
7#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -06008#include <init.h>
Jagan Teki4fe57d22020-01-09 14:22:18 +05309#include <asm/io.h>
10#include <asm/arch-rockchip/clock.h>
11#include <asm/arch-rockchip/cru.h>
12#include <asm/arch-rockchip/hardware.h>
13#include <linux/err.h>
14
15static char *get_reset_cause(void)
16{
17 struct rockchip_cru *cru = rockchip_get_cru();
18 char *cause = NULL;
19
20 if (IS_ERR(cru))
21 return cause;
22
23 switch (cru->glb_rst_st) {
24 case GLB_POR_RST:
25 cause = "POR";
26 break;
27 case FST_GLB_RST_ST:
28 case SND_GLB_RST_ST:
29 cause = "RST";
30 break;
31 case FST_GLB_TSADC_RST_ST:
32 case SND_GLB_TSADC_RST_ST:
33 cause = "THERMAL";
34 break;
35 case FST_GLB_WDT_RST_ST:
36 case SND_GLB_WDT_RST_ST:
37 cause = "WDOG";
38 break;
39 default:
40 cause = "unknown reset";
41 }
42
43 /**
44 * reset_reason env is used by rk3288, due to special use case
45 * to figure it the boot behavior. so keep this as it is.
46 */
47 env_set("reset_reason", cause);
48
49 /*
50 * Clear glb_rst_st, so we can determine the last reset cause
51 * for following resets.
52 */
53 rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK);
54
55 return cause;
56}
Jagan Tekicc464432020-01-09 14:22:15 +053057
58int print_cpuinfo(void)
59{
60 printf("SoC: Rockchip %s\n", CONFIG_SYS_SOC);
Jagan Teki4fe57d22020-01-09 14:22:18 +053061 printf("Reset cause: %s\n", get_reset_cause());
Jagan Tekicc464432020-01-09 14:22:15 +053062
63 /* TODO print operating temparature and clock */
64
65 return 0;
66}