Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2010 Freescale Semiconductor, Inc. |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <config.h> |
| 7 | #include <common.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 8 | #include <log.h> |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 9 | #include <asm/io.h> |
| 10 | #include <asm/immap_86xx.h> |
| 11 | #include <asm/fsl_serdes.h> |
| 12 | |
| 13 | #define SRDS1_MAX_LANES 4 |
| 14 | #define SRDS2_MAX_LANES 4 |
| 15 | |
| 16 | static u32 serdes1_prtcl_map, serdes2_prtcl_map; |
| 17 | |
| 18 | static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { |
| 19 | [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 20 | [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 21 | [0x5] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 22 | [0x6] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 23 | [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 24 | [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 25 | }; |
| 26 | |
| 27 | static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { |
| 28 | [0x3] = {PCIE2, PCIE2, PCIE2, PCIE2}, |
| 29 | [0x5] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 30 | [0x6] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 31 | [0x7] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 32 | [0x9] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 33 | [0xa] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 34 | [0xb] = {SRIO1, SRIO1, SRIO1, SRIO1}, |
| 35 | [0xe] = {PCIE2, PCIE2, PCIE2, PCIE2}, |
| 36 | [0xf] = {PCIE2, PCIE2, PCIE2, PCIE2}, |
| 37 | }; |
| 38 | |
| 39 | int is_serdes_configured(enum srds_prtcl device) |
| 40 | { |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 41 | int ret; |
| 42 | |
| 43 | if (!(serdes1_prtcl_map & (1 << NONE))) |
| 44 | fsl_serdes_init(); |
| 45 | |
| 46 | ret = (1 << device) & serdes1_prtcl_map; |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 47 | |
| 48 | if (ret) |
| 49 | return ret; |
| 50 | |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 51 | if (!(serdes2_prtcl_map & (1 << NONE))) |
| 52 | fsl_serdes_init(); |
| 53 | |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 54 | return (1 << device) & serdes2_prtcl_map; |
| 55 | } |
| 56 | |
| 57 | void fsl_serdes_init(void) |
| 58 | { |
| 59 | immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; |
| 60 | ccsr_gur_t *gur = &immap->im_gur; |
| 61 | u32 pordevsr = in_be32(&gur->pordevsr); |
| 62 | u32 srds_cfg = (pordevsr & MPC8641_PORDEVSR_IO_SEL) >> |
| 63 | MPC8641_PORDEVSR_IO_SEL_SHIFT; |
| 64 | int lane; |
| 65 | |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 66 | if (serdes1_prtcl_map & (1 << NONE) && |
| 67 | serdes2_prtcl_map & (1 << NONE)) |
| 68 | return; |
| 69 | |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 70 | debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); |
| 71 | |
Axel Lin | ab95b09 | 2013-05-26 15:00:30 +0800 | [diff] [blame] | 72 | if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 73 | printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); |
| 74 | return; |
| 75 | } |
| 76 | for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { |
| 77 | enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; |
| 78 | serdes1_prtcl_map |= (1 << lane_prtcl); |
| 79 | } |
| 80 | |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 81 | /* Set the first bit to indicate serdes has been initialized */ |
| 82 | serdes1_prtcl_map |= (1 << NONE); |
| 83 | |
Axel Lin | ab95b09 | 2013-05-26 15:00:30 +0800 | [diff] [blame] | 84 | if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 85 | printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); |
| 86 | return; |
| 87 | } |
| 88 | |
| 89 | for (lane = 0; lane < SRDS2_MAX_LANES; lane++) { |
| 90 | enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; |
| 91 | serdes2_prtcl_map |= (1 << lane_prtcl); |
| 92 | } |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 93 | |
| 94 | /* Set the first bit to indicate serdes has been initialized */ |
| 95 | serdes2_prtcl_map |= (1 << NONE); |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 96 | } |