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Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +09001/*
2 * Configuation settings for the Hitachi Solution Engine 7750
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090024
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090025#ifndef __MS7750SE_H
26#define __MS7750SE_H
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090027
28#define CONFIG_SH 1
29#define CONFIG_SH4 1
30#define CONFIG_CPU_SH7750 1
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090031/* #define CONFIG_CPU_SH7751 1 */
32/* #define CONFIG_CPU_TYPE_R 1 */
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090033#define CONFIG_MS7750SE 1
34#define __LITTLE_ENDIAN__ 1
35
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090036/*
37 * Command line configuration.
38 */
Wolfgang Denk0a5c2142007-12-27 01:52:50 +010039/*#include <config_cmd_default.h>*/
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090040
41#define CONFIG_CMD_DFL
42#define CONFIG_CMD_FLASH
43#define CONFIG_CMD_ENV
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090044
Jean-Christophe PLAGNIOL-VILLARD6ce9ea62008-08-13 01:40:38 +020045#define CONFIG_SCIF_CONSOLE 1
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090046#define CONFIG_BAUDRATE 38400
47#define CONFIG_CONS_SCIF1 1
48#define BOARD_LATE_INIT 1
49
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090050#define CONFIG_BOOTDELAY -1
Wolfgang Denka1be4762008-05-20 16:00:29 +020051#define CONFIG_BOOTARGS "console=ttySC0,38400"
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090052#define CONFIG_ENV_OVERWRITE 1
53
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090054/* SDRAM */
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090055#define CFG_SDRAM_BASE (0x8C000000)
56#define CFG_SDRAM_SIZE (64 * 1024 * 1024)
57
Wolfgang Denk0a5c2142007-12-27 01:52:50 +010058#define CFG_LONGHELP
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090059#define CFG_PROMPT "=> "
60#define CFG_CBSIZE 256
61#define CFG_PBSIZE 256
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090062#define CFG_MAXARGS 16
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090063#define CFG_BARGSIZE 512
64/* List of legal baudrate settings for this board */
65#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090066
67#define CFG_MEMTEST_START (CFG_SDRAM_BASE)
68#define CFG_MEMTEST_END (TEXT_BASE - 0x100000)
69
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090070/* NOR Flash */
71/* #define CFG_FLASH_BASE (0xA1000000)*/
72#define CFG_FLASH_BASE (0xA0000000)
Wolfgang Denk0a5c2142007-12-27 01:52:50 +010073#define CFG_MAX_FLASH_BANKS (1) /* Max number of
Wolfgang Denka1be4762008-05-20 16:00:29 +020074 * Flash memory banks
75 */
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090076#define CFG_MAX_FLASH_SECT 142
77#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090078
79#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024)
80#define CFG_MONITOR_BASE (CFG_FLASH_BASE) /* Address of u-boot image in Flash */
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090081#define CFG_MONITOR_LEN (128 * 1024)
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090082#define CFG_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */
83
84#define CFG_GBL_DATA_SIZE (256) /* size in bytes reserved for initial data */
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +090085#define CFG_BOOTMAPSZ (8 * 1024 * 1024)
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090086#define CFG_RX_ETH_BUFFER (8)
87
88#define CFG_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +020089#define CONFIG_FLASH_CFI_DRIVER
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090090#undef CFG_FLASH_CFI_BROKEN_TABLE
91#undef CFG_FLASH_QUIET_TEST
92#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
93
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +090094
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +020095#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020096#define CONFIG_ENV_SECT_SIZE 0x20000
97#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
98#define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
Wolfgang Denka1be4762008-05-20 16:00:29 +020099#define CFG_FLASH_ERASE_TOUT 120000
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +0900100#define CFG_FLASH_WRITE_TOUT 500
101
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +0900102/* Board Clock */
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +0900103#define CONFIG_SYS_CLK_FREQ 33333333
104#define TMU_CLK_DIVIDER 4
105#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
Nobuhiro Iwamatsu45254852007-05-13 21:01:03 +0900106
Nobuhiro Iwamatsuf2527452007-09-23 02:19:24 +0900107#endif /* __MS7750SE_H */