Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 96e52464787f1cfe7f8b2690cdcb3b426d3fcb8d / . / arch / arm / dts / tegra30-lg-x3.dtsi
blob: 30d6dcb6548a41f61c931d8f1a5142e6601b4c7d [file] [log] [blame]
Svyatoslav Ryhelfcb1d912023-06-30 10:29:05 +0300[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2
3#include <dt-bindings/input/input.h>
Svyatoslav Ryhelfcb1d912023-06-30 10:29:05 +0300[diff] [blame]4#include "tegra30.dtsi"
5
6/ {
7 chosen {
8 stdout-path = &uartd;
9 };
10
11 aliases {
12 i2c0 = &pwr_i2c;
13 i2c1 = &gen2_i2c;
14
15 mmc0 = &sdmmc4; /* eMMC */
16
17 rtc0 = &pmic;
18 rtc1 = "/rtc@7000e000";
19
20 spi0 = &dsi_spi;
21
22 usb0 = &micro_usb;
23 };
24
25 memory {
26 device_type = "memory";
27 reg = <0x80000000 0x40000000>;
28 };
29
30 host1x@50000000 {
31 dc@54200000 {
32 rgb {
33 status = "okay";
34
35 nvidia,panel = <&bridge>;
36 };
37 };
38 };
39
Svyatoslav Ryhelaef10d82023-11-27 19:08:32 +0200[diff] [blame]40 pinmux@70000868 {
41 pinctrl-names = "default";
42 pinctrl-0 = <&state_default>;
43
44 state_default: pinmux {
45 /* WLAN SDIO pinmux */
46 sdmmc1_clk {
47 nvidia,pins = "sdmmc1_clk_pz0";
48 nvidia,function = "sdmmc1";
49 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
50 nvidia,tristate = <TEGRA_PIN_DISABLE>;
51 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
52 };
53 sdmmc1_cmd {
54 nvidia,pins = "sdmmc1_cmd_pz1",
55 "sdmmc1_dat3_py4",
56 "sdmmc1_dat2_py5",
57 "sdmmc1_dat1_py6",
58 "sdmmc1_dat0_py7";
59 nvidia,function = "sdmmc1";
60 nvidia,pull = <TEGRA_PIN_PULL_UP>;
61 nvidia,tristate = <TEGRA_PIN_DISABLE>;
62 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
63 };
64 wlan_reset {
65 nvidia,pins = "pv3";
66 nvidia,function = "rsvd2";
67 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
68 nvidia,tristate = <TEGRA_PIN_DISABLE>;
69 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
70 };
71 wlan_host_wake {
72 nvidia,pins = "pu6";
73 nvidia,function = "pwm3";
74 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
75 nvidia,tristate = <TEGRA_PIN_DISABLE>;
76 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
77 };
78
79 /* GNSS UART-B pinmux */
80 gps_pwr_en {
81 nvidia,pins = "kb_row6_pr6";
82 nvidia,function = "kbc";
83 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
84 nvidia,tristate = <TEGRA_PIN_DISABLE>;
85 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
86 };
87 gps_ldo_en {
88 nvidia,pins = "ulpi_dir_py1";
89 nvidia,function = "rsvd2";
90 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
91 nvidia,tristate = <TEGRA_PIN_DISABLE>;
92 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
93 };
94 gps_clk_ref {
95 nvidia,pins = "gmi_ad8_ph0";
96 nvidia,function = "gmi";
97 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
98 nvidia,tristate = <TEGRA_PIN_DISABLE>;
99 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
100 };
101
102 /* Bluetooth UART-C pinmux */
103 uartc_cts_rxd {
104 nvidia,pins = "uart3_cts_n_pa1",
105 "uart3_rxd_pw7";
106 nvidia,function = "uartc";
107 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
108 nvidia,tristate = <TEGRA_PIN_DISABLE>;
109 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
110 };
111 uartc_rts_txd {
112 nvidia,pins = "uart3_rts_n_pc0",
113 "uart3_txd_pw6";
114 nvidia,function = "uartc";
115 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
116 nvidia,tristate = <TEGRA_PIN_DISABLE>;
117 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
118 };
119 bt_reset {
120 nvidia,pins = "clk2_req_pcc5";
121 nvidia,function = "dap";
122 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123 nvidia,tristate = <TEGRA_PIN_DISABLE>;
124 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
125 };
126 bt_dev_wake {
127 nvidia,pins = "kb_row11_ps3";
128 nvidia,function = "kbc";
129 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
130 nvidia,tristate = <TEGRA_PIN_DISABLE>;
131 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
132 };
133 bt_host_wake {
134 nvidia,pins = "kb_row12_ps4";
135 nvidia,function = "kbc";
136 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
137 nvidia,tristate = <TEGRA_PIN_DISABLE>;
138 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
139 };
140 bt_pcm_dap4 {
141 nvidia,pins = "dap4_fs_pp4",
142 "dap4_din_pp5",
143 "dap4_dout_pp6",
144 "dap4_sclk_pp7";
145 nvidia,function = "i2s3";
146 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
147 nvidia,tristate = <TEGRA_PIN_DISABLE>;
148 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
149 };
150
151 /* EMMC pinmux */
152 sdmmc4_clk {
153 nvidia,pins = "sdmmc4_clk_pcc4";
154 nvidia,function = "sdmmc4";
155 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
156 nvidia,tristate = <TEGRA_PIN_DISABLE>;
157 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
158 };
159 sdmmc4_data {
160 nvidia,pins = "sdmmc4_cmd_pt7",
161 "sdmmc4_dat0_paa0",
162 "sdmmc4_dat1_paa1",
163 "sdmmc4_dat2_paa2",
164 "sdmmc4_dat3_paa3",
165 "sdmmc4_dat4_paa4",
166 "sdmmc4_dat5_paa5",
167 "sdmmc4_dat6_paa6",
168 "sdmmc4_dat7_paa7";
169 nvidia,function = "sdmmc4";
170 nvidia,pull = <TEGRA_PIN_PULL_UP>;
171 nvidia,tristate = <TEGRA_PIN_DISABLE>;
172 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
173 };
174 sdmmc4_reset {
175 nvidia,pins = "sdmmc4_rst_n_pcc3";
176 nvidia,function = "rsvd2";
177 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
178 nvidia,tristate = <TEGRA_PIN_DISABLE>;
179 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
180 };
181
182 /* I2C pinmux */
183 gen1_i2c {
184 nvidia,pins = "gen1_i2c_scl_pc4",
185 "gen1_i2c_sda_pc5";
186 nvidia,function = "i2c1";
187 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
188 nvidia,tristate = <TEGRA_PIN_DISABLE>;
189 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
190 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
191 nvidia,lock = <TEGRA_PIN_DISABLE>;
192 };
193
194 gen2_i2c {
195 nvidia,pins = "gen2_i2c_scl_pt5",
196 "gen2_i2c_sda_pt6";
197 nvidia,function = "i2c2";
198 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
199 nvidia,tristate = <TEGRA_PIN_DISABLE>;
200 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
201 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
202 nvidia,lock = <TEGRA_PIN_DISABLE>;
203 };
204
205 cam_i2c {
206 nvidia,pins = "cam_i2c_scl_pbb1",
207 "cam_i2c_sda_pbb2";
208 nvidia,function = "i2c3";
209 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
210 nvidia,tristate = <TEGRA_PIN_DISABLE>;
211 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
212 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
213 nvidia,lock = <TEGRA_PIN_DISABLE>;
214 };
215
216 ddc_i2c {
217 nvidia,pins = "ddc_scl_pv4",
218 "ddc_sda_pv5";
219 nvidia,function = "i2c4";
220 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
221 nvidia,tristate = <TEGRA_PIN_DISABLE>;
222 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
223 nvidia,lock = <TEGRA_PIN_DISABLE>;
224 };
225
226 pwr_i2c {
227 nvidia,pins = "pwr_i2c_scl_pz6",
228 "pwr_i2c_sda_pz7";
229 nvidia,function = "i2cpwr";
230 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
231 nvidia,tristate = <TEGRA_PIN_DISABLE>;
232 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
233 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
234 nvidia,lock = <TEGRA_PIN_DISABLE>;
235 };
236
237 mhl_i2c {
238 nvidia,pins = "kb_col6_pq6",
239 "kb_col7_pq7";
240 nvidia,function = "kbc";
241 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
242 nvidia,tristate = <TEGRA_PIN_DISABLE>;
243 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
244 };
245
246 /* GPIO keys pinmux */
247 power_key {
248 nvidia,pins = "gmi_wp_n_pc7";
249 nvidia,function = "gmi";
250 nvidia,pull = <TEGRA_PIN_PULL_UP>;
251 nvidia,tristate = <TEGRA_PIN_DISABLE>;
252 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
253 };
254 volume_down {
255 nvidia,pins = "ulpi_data3_po4";
256 nvidia,function = "spi3";
257 nvidia,pull = <TEGRA_PIN_PULL_UP>;
258 nvidia,tristate = <TEGRA_PIN_DISABLE>;
259 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
260 };
261
262 /* Sensors pinmux */
263 sen_vdd {
264 nvidia,pins = "spi1_miso_px7";
265 nvidia,function = "rsvd4";
266 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
267 nvidia,tristate = <TEGRA_PIN_DISABLE>;
268 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
269 };
270 proxi_vdd {
271 nvidia,pins = "spi2_miso_px1";
272 nvidia,function = "gmi";
273 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
274 nvidia,tristate = <TEGRA_PIN_DISABLE>;
275 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
276 };
277 sen_vio {
278 nvidia,pins = "lcd_dc1_pd2";
279 nvidia,function = "rsvd4";
280 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
281 nvidia,tristate = <TEGRA_PIN_DISABLE>;
282 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
283 };
284 nct_irq {
285 nvidia,pins = "gmi_iordy_pi5";
286 nvidia,function = "rsvd1";
287 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
288 nvidia,tristate = <TEGRA_PIN_DISABLE>;
289 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
290 };
291 bat_irq {
292 nvidia,pins = "kb_row8_ps0";
293 nvidia,function = "kbc";
294 nvidia,pull = <TEGRA_PIN_PULL_UP>;
295 nvidia,tristate = <TEGRA_PIN_DISABLE>;
296 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
297 };
298 charger_irq {
299 nvidia,pins = "gmi_cs1_n_pj2";
300 nvidia,function = "rsvd1";
301 nvidia,pull = <TEGRA_PIN_PULL_UP>;
302 nvidia,tristate = <TEGRA_PIN_DISABLE>;
303 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
304 };
305 mpu_irq {
306 nvidia,pins = "gmi_ad12_ph4";
307 nvidia,function = "rsvd1";
308 nvidia,pull = <TEGRA_PIN_PULL_UP>;
309 nvidia,tristate = <TEGRA_PIN_DISABLE>;
310 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
311 };
312 compass_irq {
313 nvidia,pins = "gmi_ad13_ph5";
314 nvidia,function = "rsvd1";
315 nvidia,pull = <TEGRA_PIN_PULL_UP>;
316 nvidia,tristate = <TEGRA_PIN_DISABLE>;
317 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
318 };
319 light_irq {
320 nvidia,pins = "gmi_cs4_n_pk2";
321 nvidia,function = "rsvd1";
322 nvidia,pull = <TEGRA_PIN_PULL_UP>;
323 nvidia,tristate = <TEGRA_PIN_DISABLE>;
324 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
325 };
326
327 /* LED pinmux */
328 backlight_en {
329 nvidia,pins = "lcd_dc0_pn6";
330 nvidia,function = "rsvd3";
331 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
332 nvidia,tristate = <TEGRA_PIN_DISABLE>;
333 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
334 };
335 flash_led_en {
336 nvidia,pins = "pbb3";
337 nvidia,function = "vgp3";
338 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
339 nvidia,tristate = <TEGRA_PIN_DISABLE>;
340 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
341 };
342 keypad_led {
343 nvidia,pins = "kb_row2_pr2",
344 "kb_row3_pr3";
345 nvidia,function = "rsvd3";
346 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
347 nvidia,tristate = <TEGRA_PIN_DISABLE>;
348 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
349 };
350
351 /* NFC pinmux */
352 nfc_irq {
353 nvidia,pins = "spi2_cs1_n_pw2";
354 nvidia,function = "spi2";
355 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
356 nvidia,tristate = <TEGRA_PIN_DISABLE>;
357 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
358 };
359 nfc_ven {
360 nvidia,pins = "spi1_sck_px5";
361 nvidia,function = "spi1";
362 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
363 nvidia,tristate = <TEGRA_PIN_DISABLE>;
364 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
365 };
366 nfc_firm {
367 nvidia,pins = "kb_row0_pr0";
368 nvidia,function = "rsvd4";
369 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
370 nvidia,tristate = <TEGRA_PIN_DISABLE>;
371 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
372 };
373
374 /* DC pinmux */
375 lcd_pwr {
376 nvidia,pins = "lcd_pwr0_pb2",
377 "lcd_pwr1_pc1";
378 nvidia,function = "displaya";
379 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
380 nvidia,tristate = <TEGRA_PIN_DISABLE>;
381 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
382 };
383 lcd_wr_n {
384 nvidia,pins = "lcd_wr_n_pz3";
385 nvidia,function = "displaya";
386 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
387 nvidia,tristate = <TEGRA_PIN_DISABLE>;
388 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
389 };
390 lcd_id {
391 nvidia,pins = "lcd_m1_pw1";
392 nvidia,function = "displaya";
393 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
394 nvidia,tristate = <TEGRA_PIN_ENABLE>;
395 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
396 };
397 lcd_pclk {
398 nvidia,pins = "lcd_pclk_pb3",
399 "lcd_de_pj1",
400 "lcd_hsync_pj3",
401 "lcd_vsync_pj4";
402 nvidia,function = "displaya";
403 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
404 nvidia,tristate = <TEGRA_PIN_DISABLE>;
405 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
406 };
407
408 lcd_rgb_blue {
409 nvidia,pins = "lcd_d0_pe0",
410 "lcd_d1_pe1",
411 "lcd_d2_pe2",
412 "lcd_d3_pe3",
413 "lcd_d4_pe4",
414 "lcd_d5_pe5",
415 "lcd_d18_pm2",
416 "lcd_d19_pm3";
417 nvidia,function = "displaya";
418 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
419 nvidia,tristate = <TEGRA_PIN_DISABLE>;
420 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
421 };
422 lcd_rgb_green {
423 nvidia,pins = "lcd_d6_pe6",
424 "lcd_d7_pe7",
425 "lcd_d8_pf0",
426 "lcd_d9_pf1",
427 "lcd_d10_pf2",
428 "lcd_d11_pf3",
429 "lcd_d20_pm4",
430 "lcd_d21_pm5";
431 nvidia,function = "displaya";
432 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
433 nvidia,tristate = <TEGRA_PIN_DISABLE>;
434 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
435 };
436 lcd_rgb_red {
437 nvidia,pins = "lcd_d12_pf4",
438 "lcd_d13_pf5",
439 "lcd_d14_pf6",
440 "lcd_d15_pf7",
441 "lcd_d16_pm0",
442 "lcd_d17_pm1",
443 "lcd_d22_pm6",
444 "lcd_d23_pm7";
445 nvidia,function = "displaya";
446 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
447 nvidia,tristate = <TEGRA_PIN_DISABLE>;
448 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
449 };
450
451 /* Bridge pinmux */
452 bridge_reset {
453 nvidia,pins = "ulpi_data1_po2";
454 nvidia,function = "spi3";
455 nvidia,pull = <TEGRA_PIN_PULL_UP>;
456 nvidia,tristate = <TEGRA_PIN_DISABLE>;
457 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
458 };
459 rgb_ic_en {
460 nvidia,pins = "gmi_a18_pb1";
461 nvidia,function = "uartd";
462 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
463 nvidia,tristate = <TEGRA_PIN_DISABLE>;
464 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
465 };
466 bridge_clk {
467 nvidia,pins = "clk3_out_pee0";
468 nvidia,function = "extperiph3";
469 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
470 nvidia,tristate = <TEGRA_PIN_DISABLE>;
471 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
472 };
473
474 rgb_bridge {
475 nvidia,pins = "lcd_sdin_pz2",
476 "lcd_sdout_pn5",
477 "lcd_cs0_n_pn4",
478 "lcd_sck_pz4";
479 nvidia,function = "spi5";
480 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
481 nvidia,tristate = <TEGRA_PIN_DISABLE>;
482 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
483 };
484
485 /* Panel pinmux */
486 panel_reset {
487 nvidia,pins = "lcd_cs1_n_pw0";
488 nvidia,function = "rsvd4";
489 nvidia,pull = <TEGRA_PIN_PULL_UP>;
490 nvidia,tristate = <TEGRA_PIN_DISABLE>;
491 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
492 };
493 panel_vio {
494 nvidia,pins = "ulpi_clk_py0";
495 nvidia,function = "rsvd2";
496 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
497 nvidia,tristate = <TEGRA_PIN_DISABLE>;
498 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
499 };
500
501 /* Touchscreen pinmux */
502 touch_vdd {
503 nvidia,pins = "kb_col1_pq1";
504 nvidia,function = "kbc";
505 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
506 nvidia,tristate = <TEGRA_PIN_DISABLE>;
507 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
508 };
509 touch_vio {
510 nvidia,pins = "spi1_mosi_px4";
511 nvidia,function = "spi2";
512 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
513 nvidia,tristate = <TEGRA_PIN_DISABLE>;
514 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
515 };
516 touch_int_n {
517 nvidia,pins = "kb_col3_pq3";
518 nvidia,function = "kbc";
519 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
520 nvidia,tristate = <TEGRA_PIN_DISABLE>;
521 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522 };
523 touch_rst_n {
524 nvidia,pins = "ulpi_data0_po1";
525 nvidia,function = "spi3";
526 nvidia,pull = <TEGRA_PIN_PULL_UP>;
527 nvidia,tristate = <TEGRA_PIN_ENABLE>;
528 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
529 };
530 touch_maker_id {
531 nvidia,pins = "kb_col2_pq2";
532 nvidia,function = "kbc";
533 nvidia,pull = <TEGRA_PIN_PULL_UP>;
534 nvidia,tristate = <TEGRA_PIN_DISABLE>;
535 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
536 };
537
538 /* MHL pinmux */
539 mhl_vio {
540 nvidia,pins = "pv2";
541 nvidia,function = "owr";
542 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
543 nvidia,tristate = <TEGRA_PIN_DISABLE>;
544 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
545 };
546 mhl_rst_n {
547 nvidia,pins = "clk3_req_pee1";
548 nvidia,function = "dev3";
549 nvidia,pull = <TEGRA_PIN_PULL_UP>;
550 nvidia,tristate = <TEGRA_PIN_DISABLE>;
551 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
552 };
553 mhl_int {
554 nvidia,pins = "crt_vsync_pv7";
555 nvidia,function = "rsvd2";
556 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
557 nvidia,tristate = <TEGRA_PIN_DISABLE>;
558 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
559 };
560 mhl_sel {
561 nvidia,pins = "kb_row10_ps2";
562 nvidia,function = "kbc";
563 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
564 nvidia,tristate = <TEGRA_PIN_DISABLE>;
565 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
566 };
567 hdmi_hpd {
568 nvidia,pins = "hdmi_int_pn7";
569 nvidia,function = "hdmi";
570 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
571 nvidia,tristate = <TEGRA_PIN_ENABLE>;
572 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
573 };
574
575 /* AUDIO pinmux */
576 hp_detect {
577 nvidia,pins = "pbb6";
578 nvidia,function = "vgp6";
579 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
580 nvidia,tristate = <TEGRA_PIN_DISABLE>;
581 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
582 };
583 hp_hook {
584 nvidia,pins = "ulpi_data4_po5";
585 nvidia,function = "ulpi";
586 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
587 nvidia,tristate = <TEGRA_PIN_DISABLE>;
588 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
589 };
590 ear_mic_en {
591 nvidia,pins = "spi2_mosi_px0";
592 nvidia,function = "spi2";
593 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
594 nvidia,tristate = <TEGRA_PIN_DISABLE>;
595 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
596 };
597 audio_irq {
598 nvidia,pins = "spi2_cs2_n_pw3";
599 nvidia,function = "spi3";
600 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
601 nvidia,tristate = <TEGRA_PIN_DISABLE>;
602 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
603 };
604
605 audio_mclk {
606 nvidia,pins = "clk1_out_pw4";
607 nvidia,function = "extperiph1";
608 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
609 nvidia,tristate = <TEGRA_PIN_DISABLE>;
610 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
611 };
612 dap_i2s0 {
613 nvidia,pins = "dap1_fs_pn0",
614 "dap1_din_pn1",
615 "dap1_dout_pn2",
616 "dap1_sclk_pn3";
617 nvidia,function = "i2s0";
618 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
619 nvidia,tristate = <TEGRA_PIN_DISABLE>;
620 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
621 };
622 dap_i2s1 {
623 nvidia,pins = "dap2_fs_pa2",
624 "dap2_sclk_pa3",
625 "dap2_din_pa4",
626 "dap2_dout_pa5";
627 nvidia,function = "i2s1";
628 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
629 nvidia,tristate = <TEGRA_PIN_DISABLE>;
630 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
631 };
632
633 /* MUIC pinmux */
634 muic_irq {
635 nvidia,pins = "gmi_cs0_n_pj0";
636 nvidia,function = "gmi";
637 nvidia,pull = <TEGRA_PIN_PULL_UP>;
638 nvidia,tristate = <TEGRA_PIN_DISABLE>;
639 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
640 };
641 muic_dp2t {
642 nvidia,pins = "pcc2";
643 nvidia,function = "rsvd2";
644 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
645 nvidia,tristate = <TEGRA_PIN_DISABLE>;
646 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
647 };
648 muic_usif {
649 nvidia,pins = "ulpi_stp_py3";
650 nvidia,function = "spi1";
651 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
652 nvidia,tristate = <TEGRA_PIN_DISABLE>;
653 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
654 };
655 ifx_usb_vbus_en {
656 nvidia,pins = "kb_row4_pr4";
657 nvidia,function = "rsvd4";
658 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
659 nvidia,tristate = <TEGRA_PIN_DISABLE>;
660 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
661 };
662 pcb_rev {
663 nvidia,pins = "gmi_wait_pi7",
664 "gmi_rst_n_pi4";
665 nvidia,function = "gmi";
666 nvidia,pull = <TEGRA_PIN_PULL_UP>;
667 nvidia,tristate = <TEGRA_PIN_DISABLE>;
668 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
669 };
670 jtag_rtck {
671 nvidia,pins = "jtag_rtck_pu7";
672 nvidia,function = "rtck";
673 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
674 nvidia,tristate = <TEGRA_PIN_DISABLE>;
675 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
676 };
677
678 /* Camera pinmux */
679 cam_mclk {
680 nvidia,pins = "cam_mclk_pcc0";
681 nvidia,function = "vi_alt3";
682 nvidia,pull = <TEGRA_PIN_PULL_UP>;
683 nvidia,tristate = <TEGRA_PIN_DISABLE>;
684 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
685 };
686 cam_pmic_en {
687 nvidia,pins = "pbb4";
688 nvidia,function = "vgp4";
689 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
690 nvidia,tristate = <TEGRA_PIN_DISABLE>;
691 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
692 };
693 front_cam_rst {
694 nvidia,pins = "pbb5";
695 nvidia,function = "vgp5";
696 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
697 nvidia,tristate = <TEGRA_PIN_DISABLE>;
698 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
699 };
700 front_cam_vio {
701 nvidia,pins = "ulpi_nxt_py2";
702 nvidia,function = "rsvd2";
703 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
704 nvidia,tristate = <TEGRA_PIN_DISABLE>;
705 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
706 };
707 rear_cam_rst {
708 nvidia,pins = "gmi_cs3_n_pk4";
709 nvidia,function = "rsvd1";
710 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
711 nvidia,tristate = <TEGRA_PIN_DISABLE>;
712 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
713 };
714 rear_cam_eprom_pr {
715 nvidia,pins = "gmi_cs2_n_pk3";
716 nvidia,function = "rsvd1";
717 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
718 nvidia,tristate = <TEGRA_PIN_DISABLE>;
719 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
720 };
721 rear_cam_vcm_pwdn {
722 nvidia,pins = "kb_row1_pr1";
723 nvidia,function = "kbc";
724 nvidia,pull = <TEGRA_PIN_PULL_UP>;
725 nvidia,tristate = <TEGRA_PIN_DISABLE>;
726 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
727 };
728
729 /* Haptic pinmux */
730 haptic_en {
731 nvidia,pins = "gmi_ad9_ph1";
732 nvidia,function = "gmi";
733 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
734 nvidia,tristate = <TEGRA_PIN_DISABLE>;
735 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
736 };
737 haptic_osc {
738 nvidia,pins = "gmi_ad11_ph3";
739 nvidia,function = "pwm3";
740 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
741 nvidia,tristate = <TEGRA_PIN_DISABLE>;
742 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
743 };
744
745 /* Modem pinmux */
746 cp2ap_ack1_host_active {
747 nvidia,pins = "pu5";
748 nvidia,function = "rsvd4";
749 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
750 nvidia,tristate = <TEGRA_PIN_DISABLE>;
751 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
752 };
753 cp2ap_ack2_host_wakeup {
754 nvidia,pins = "pv0";
755 nvidia,function = "rsvd4";
756 nvidia,pull = <TEGRA_PIN_PULL_UP>;
757 nvidia,tristate = <TEGRA_PIN_DISABLE>;
758 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
759 };
760 ap2cp_ack2_suspend_req {
761 nvidia,pins = "kb_row14_ps6";
762 nvidia,function = "kbc";
763 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
764 nvidia,tristate = <TEGRA_PIN_DISABLE>;
765 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
766 };
767 ap2cp_ack1_slave_wakeup {
768 nvidia,pins = "kb_row15_ps7";
769 nvidia,function = "kbc";
770 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
771 nvidia,tristate = <TEGRA_PIN_DISABLE>;
772 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
773 };
774
775 cp_kkp {
776 nvidia,pins = "kb_col0_pq0";
777 nvidia,function = "kbc";
778 nvidia,pull = <TEGRA_PIN_PULL_UP>;
779 nvidia,tristate = <TEGRA_PIN_DISABLE>;
780 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
781 };
782 cp_crash_irq {
783 nvidia,pins = "kb_row13_ps5";
784 nvidia,function = "kbc";
785 nvidia,pull = <TEGRA_PIN_PULL_UP>;
786 nvidia,tristate = <TEGRA_PIN_DISABLE>;
787 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
788 };
789
790 ap2cp_uarta_tx_ipc {
791 nvidia,pins = "pu0";
792 nvidia,function = "uarta";
793 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
794 nvidia,tristate = <TEGRA_PIN_DISABLE>;
795 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
796 };
797 ap2cp_uarta_rx_ipc {
798 nvidia,pins = "pu1";
799 nvidia,function = "uarta";
800 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
801 nvidia,tristate = <TEGRA_PIN_DISABLE>;
802 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
803 };
804 fota_ap_cts_cp_rts {
805 nvidia,pins = "pu2";
806 nvidia,function = "uarta";
807 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
808 nvidia,tristate = <TEGRA_PIN_ENABLE>;
809 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
810 };
811 fota_ap_rts_cp_cts {
812 nvidia,pins = "pu3";
813 nvidia,function = "uarta";
814 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
815 nvidia,tristate = <TEGRA_PIN_ENABLE>;
816 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
817 };
818
819 modem_enable {
820 nvidia,pins = "ulpi_data7_po0";
821 nvidia,function = "hsi";
822 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
823 nvidia,tristate = <TEGRA_PIN_DISABLE>;
824 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
825 };
826 modem_reset {
827 nvidia,pins = "pv1";
828 nvidia,function = "rsvd1";
829 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
830 nvidia,tristate = <TEGRA_PIN_DISABLE>;
831 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
832 };
833
834 dap_i2s2 {
835 nvidia,pins = "dap3_fs_pp0",
836 "dap3_din_pp1",
837 "dap3_dout_pp2",
838 "dap3_sclk_pp3";
839 nvidia,function = "i2s2";
840 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
841 nvidia,tristate = <TEGRA_PIN_DISABLE>;
842 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
843 };
844
845 /* GPIO power/drive control */
846 drive_i2c {
847 nvidia,pins = "drive_dbg",
848 "drive_at5",
849 "drive_gme",
850 "drive_ddc",
851 "drive_ao1";
852 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
853 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
854 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
855 nvidia,pull-down-strength = <31>;
856 nvidia,pull-up-strength = <31>;
857 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
858 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
859 };
860
861 drive_uart3 {
862 nvidia,pins = "drive_uart3";
863 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
864 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
865 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
866 nvidia,pull-down-strength = <31>;
867 nvidia,pull-up-strength = <31>;
868 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
869 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
870 };
871
872 drive_gmi {
873 nvidia,pins = "drive_at3";
874 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
875 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
876 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
877 nvidia,pull-down-strength = <31>;
878 nvidia,pull-up-strength = <31>;
879 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
880 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
881 };
882 };
883 };
884
Svyatoslav Ryhelfcb1d912023-06-30 10:29:05 +0300[diff] [blame]885 uartd: serial@70006300 {
886 status = "okay";
887 };
888
889 gen2_i2c: i2c@7000c400 {
890 status = "okay";
891 clock-frequency = <400000>;
892
893 backlight: lm3533@36 {
894 compatible = "ti,lm3533";
895 reg = <0x36>;
896
897 enable-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_HIGH>;
898 default-brightness-level = <128>;
899 };
900
901 muic@44 {
902 compatible = "maxim,max14526-muic";
903 reg = <0x44>;
904
905 maxim,ap-usb;
906
907 usif-gpios = <&gpio TEGRA_GPIO(Y, 3) GPIO_ACTIVE_HIGH>;
908 dp2t-gpios = <&gpio TEGRA_GPIO(CC, 2) GPIO_ACTIVE_HIGH>;
909 };
910 };
911
912 pwr_i2c: i2c@7000d000 {
913 status = "okay";
914 clock-frequency = <400000>;
915
916 pmic: max77663@1c {
917 compatible = "maxim,max77663";
918 reg = <0x1c>;
919
920 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
921 #interrupt-cells = <2>;
922 interrupt-controller;
923
924 #gpio-cells = <2>;
925 gpio-controller;
926
927 system-power-controller;
928
929 regulators {
930 vdd_1v8_vio: sd2 {
931 regulator-name = "vdd_1v8_gen";
932 regulator-min-microvolt = <1800000>;
933 regulator-max-microvolt = <1800000>;
934 regulator-always-on;
935 regulator-boot-on;
936 };
937
Svyatoslav Ryhel8d4c8822023-10-03 09:36:40 +0300[diff] [blame]938 avdd_3v3_periph: ldo2 {
939 regulator-name = "avdd_usb";
940 regulator-min-microvolt = <3300000>;
941 regulator-max-microvolt = <3300000>;
942 regulator-always-on;
943 regulator-boot-on;
944 };
945
Svyatoslav Ryhelfcb1d912023-06-30 10:29:05 +0300[diff] [blame]946 vdd_usd: ldo3 {
947 regulator-name = "vdd_sdmmc3";
948 regulator-min-microvolt = <3000000>;
949 regulator-max-microvolt = <3000000>;
950 regulator-always-on;
951 regulator-boot-on;
952 };
953
954 vcore_emmc: ldo5 {
955 regulator-name = "vdd_ddr_rx";
956 regulator-min-microvolt = <2850000>;
957 regulator-max-microvolt = <2850000>;
Svyatoslav Ryhel19756932023-08-26 18:32:55 +0300[diff] [blame]958 regulator-boot-on;
Svyatoslav Ryhelfcb1d912023-06-30 10:29:05 +0300[diff] [blame]959 };
960 };
961 };
962 };
963
964 dsi_spi: spi@7000dc00 {
965 status = "okay";
966 spi-max-frequency = <25000000>;
967
968 bridge: bridge-spi@2 {
969 compatible = "solomon,ssd2825";
970 reg = <2>;
971
972 spi-cpol;
973 spi-cpha;
974
975 spi-max-frequency = <1000000>;
976
977 power-gpios = <&gpio TEGRA_GPIO(B, 1) GPIO_ACTIVE_HIGH>;
978 reset-gpios = <&gpio TEGRA_GPIO(O, 2) GPIO_ACTIVE_HIGH>;
979
980 clocks = <&ssd2825_refclk>;
981 clock-names = "tx_clk";
982
983 panel = <&panel>;
984 };
985 };
986
987 sdmmc4: sdhci@78000600 {
988 status = "okay";
989 bus-width = <8>;
990 non-removable;
991
992 vmmc-supply = <&vcore_emmc>;
993 vqmmc-supply = <&vdd_1v8_vio>;
994 };
995
996 micro_usb: usb@7d000000 {
997 status = "okay";
998 dr_mode = "otg";
999 };
1000
Svyatoslav Ryhel6c438612023-08-25 20:23:14 +0300[diff] [blame]1001 usb-phy@7d000000 {
1002 status = "okay";
1003 nvidia,hssync-start-delay = <0>;
1004 nvidia,xcvr-lsfslew = <2>;
1005 nvidia,xcvr-lsrslew = <2>;
1006 vbus-supply = <&avdd_3v3_periph>;
1007 };
1008
Svyatoslav Ryhelfcb1d912023-06-30 10:29:05 +0300[diff] [blame]1009 /* PMIC has a built-in 32KHz oscillator which is used by PMC */
1010 clk32k_in: clock-32k {
1011 compatible = "fixed-clock";
1012 #clock-cells = <0>;
1013 clock-frequency = <32768>;
1014 clock-output-names = "pmic-oscillator";
1015 };
1016
1017 ssd2825_refclk: clock-ssd2825 {
1018 compatible = "fixed-clock";
1019 #clock-cells = <0>;
1020 clock-frequency = <24000000>;
1021 clock-output-names = "ssd2825-refclk";
1022 };
1023
1024 gpio-keys {
1025 compatible = "gpio-keys";
1026
1027 key-power {
1028 label = "Power";
1029 gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
1030 linux,code = <KEY_ENTER>;
1031 };
1032
1033 key-volume-down {
1034 label = "Volume Down";
1035 gpios = <&gpio TEGRA_GPIO(O, 4) GPIO_ACTIVE_LOW>;
1036 linux,code = <KEY_DOWN>;
1037 };
1038 };
1039};