Simon Glass | 84a97c5 | 2011-11-28 15:04:38 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2011 The Chromium OS Authors. |
| 3 | * See file CREDITS for list of people who contributed to this |
| 4 | * project. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; either version 2 of |
| 9 | * the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 19 | * MA 02111-1307 USA |
| 20 | */ |
| 21 | |
| 22 | /* Tegra2 high-level function multiplexing */ |
| 23 | #include <common.h> |
| 24 | #include <asm/arch/clock.h> |
Simon Glass | 43b1a7c | 2012-01-11 12:42:23 +0000 | [diff] [blame] | 25 | #include <asm/arch/funcmux.h> |
Simon Glass | 84a97c5 | 2011-11-28 15:04:38 +0000 | [diff] [blame] | 26 | #include <asm/arch/pinmux.h> |
| 27 | |
| 28 | int funcmux_select(enum periph_id id, int config) |
| 29 | { |
Simon Glass | 43b1a7c | 2012-01-11 12:42:23 +0000 | [diff] [blame] | 30 | int bad_config = config != FUNCMUX_DEFAULT; |
Simon Glass | 3ba99a3 | 2012-01-11 12:42:22 +0000 | [diff] [blame] | 31 | |
Simon Glass | 84a97c5 | 2011-11-28 15:04:38 +0000 | [diff] [blame] | 32 | switch (id) { |
| 33 | case PERIPH_ID_UART1: |
Stephen Warren | 59f9010 | 2012-05-14 13:13:45 +0000 | [diff] [blame] | 34 | switch (config) { |
| 35 | case FUNCMUX_UART1_IRRX_IRTX: |
Simon Glass | 3ba99a3 | 2012-01-11 12:42:22 +0000 | [diff] [blame] | 36 | pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA); |
| 37 | pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA); |
| 38 | pinmux_tristate_disable(PINGRP_IRRX); |
| 39 | pinmux_tristate_disable(PINGRP_IRTX); |
Stephen Warren | 59f9010 | 2012-05-14 13:13:45 +0000 | [diff] [blame] | 40 | break; |
| 41 | case FUNCMUX_UART1_UAA_UAB: |
| 42 | pinmux_set_func(PINGRP_UAA, PMUX_FUNC_UARTA); |
| 43 | pinmux_set_func(PINGRP_UAB, PMUX_FUNC_UARTA); |
| 44 | pinmux_tristate_disable(PINGRP_UAA); |
| 45 | pinmux_tristate_disable(PINGRP_UAB); |
| 46 | bad_config = 0; |
| 47 | break; |
| 48 | } |
| 49 | if (!bad_config) { |
Simon Glass | 3ba99a3 | 2012-01-11 12:42:22 +0000 | [diff] [blame] | 50 | /* |
| 51 | * Tegra appears to boot with function UARTA pre- |
| 52 | * selected on mux group SDB. If two mux groups are |
| 53 | * both set to the same function, it's unclear which |
| 54 | * group's pins drive the RX signals into the HW. |
| 55 | * For UARTA, SDB certainly overrides group IRTX in |
| 56 | * practice. To solve this, configure some alternative |
| 57 | * function on SDB to avoid the conflict. Also, tri- |
| 58 | * state the group to avoid driving any signal onto it |
| 59 | * until we know what's connected. |
| 60 | */ |
| 61 | pinmux_tristate_enable(PINGRP_SDB); |
| 62 | pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); |
| 63 | } |
Simon Glass | 84a97c5 | 2011-11-28 15:04:38 +0000 | [diff] [blame] | 64 | break; |
| 65 | |
| 66 | case PERIPH_ID_UART2: |
Simon Glass | 43b1a7c | 2012-01-11 12:42:23 +0000 | [diff] [blame] | 67 | if (config == FUNCMUX_UART2_IRDA) { |
Simon Glass | 3ba99a3 | 2012-01-11 12:42:22 +0000 | [diff] [blame] | 68 | pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA); |
| 69 | pinmux_tristate_disable(PINGRP_UAD); |
| 70 | } |
Simon Glass | 84a97c5 | 2011-11-28 15:04:38 +0000 | [diff] [blame] | 71 | break; |
| 72 | |
| 73 | case PERIPH_ID_UART4: |
Simon Glass | 43b1a7c | 2012-01-11 12:42:23 +0000 | [diff] [blame] | 74 | if (config == FUNCMUX_UART4_GMC) { |
Simon Glass | 3ba99a3 | 2012-01-11 12:42:22 +0000 | [diff] [blame] | 75 | pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD); |
| 76 | pinmux_tristate_disable(PINGRP_GMC); |
| 77 | } |
Simon Glass | 84a97c5 | 2011-11-28 15:04:38 +0000 | [diff] [blame] | 78 | break; |
| 79 | |
Simon Glass | d8c03b8 | 2012-01-11 12:42:24 +0000 | [diff] [blame] | 80 | case PERIPH_ID_DVC_I2C: |
| 81 | /* there is only one selection, pinmux_config is ignored */ |
| 82 | if (config == FUNCMUX_DVC_I2CP) { |
| 83 | pinmux_set_func(PINGRP_I2CP, PMUX_FUNC_I2C); |
| 84 | pinmux_tristate_disable(PINGRP_I2CP); |
| 85 | } |
| 86 | break; |
| 87 | |
| 88 | case PERIPH_ID_I2C1: |
| 89 | /* support pinmux_config of 0 for now, */ |
| 90 | if (config == FUNCMUX_I2C1_RM) { |
| 91 | pinmux_set_func(PINGRP_RM, PMUX_FUNC_I2C); |
| 92 | pinmux_tristate_disable(PINGRP_RM); |
| 93 | } |
| 94 | break; |
| 95 | case PERIPH_ID_I2C2: /* I2C2 */ |
| 96 | switch (config) { |
| 97 | case FUNCMUX_I2C2_DDC: /* DDC pin group, select I2C2 */ |
| 98 | pinmux_set_func(PINGRP_DDC, PMUX_FUNC_I2C2); |
| 99 | /* PTA to HDMI */ |
| 100 | pinmux_set_func(PINGRP_PTA, PMUX_FUNC_HDMI); |
| 101 | pinmux_tristate_disable(PINGRP_DDC); |
| 102 | break; |
| 103 | case FUNCMUX_I2C2_PTA: /* PTA pin group, select I2C2 */ |
| 104 | pinmux_set_func(PINGRP_PTA, PMUX_FUNC_I2C2); |
| 105 | /* set DDC_SEL to RSVDx (RSVD2 works for now) */ |
| 106 | pinmux_set_func(PINGRP_DDC, PMUX_FUNC_RSVD2); |
| 107 | pinmux_tristate_disable(PINGRP_PTA); |
| 108 | bad_config = 0; |
| 109 | break; |
| 110 | } |
| 111 | break; |
| 112 | case PERIPH_ID_I2C3: /* I2C3 */ |
| 113 | /* support pinmux_config of 0 for now */ |
| 114 | if (config == FUNCMUX_I2C3_DTF) { |
| 115 | pinmux_set_func(PINGRP_DTF, PMUX_FUNC_I2C3); |
| 116 | pinmux_tristate_disable(PINGRP_DTF); |
| 117 | } |
| 118 | break; |
| 119 | |
Simon Glass | fb1ea63 | 2012-01-11 12:42:25 +0000 | [diff] [blame] | 120 | case PERIPH_ID_SDMMC2: |
| 121 | if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) { |
| 122 | pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2); |
| 123 | pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2); |
| 124 | |
| 125 | pinmux_tristate_disable(PINGRP_DTA); |
| 126 | pinmux_tristate_disable(PINGRP_DTD); |
| 127 | } |
| 128 | break; |
| 129 | |
| 130 | case PERIPH_ID_SDMMC3: |
| 131 | switch (config) { |
| 132 | case FUNCMUX_SDMMC3_SDB_SLXA_8BIT: |
| 133 | pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3); |
| 134 | pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3); |
| 135 | pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3); |
| 136 | pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3); |
| 137 | |
| 138 | pinmux_tristate_disable(PINGRP_SLXA); |
| 139 | pinmux_tristate_disable(PINGRP_SLXC); |
| 140 | pinmux_tristate_disable(PINGRP_SLXD); |
| 141 | pinmux_tristate_disable(PINGRP_SLXK); |
| 142 | /* fall through */ |
| 143 | |
| 144 | case FUNCMUX_SDMMC3_SDB_4BIT: |
| 145 | pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); |
| 146 | pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3); |
| 147 | pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3); |
| 148 | |
| 149 | pinmux_tristate_disable(PINGRP_SDB); |
| 150 | pinmux_tristate_disable(PINGRP_SDC); |
| 151 | pinmux_tristate_disable(PINGRP_SDD); |
| 152 | bad_config = 0; |
| 153 | break; |
| 154 | } |
| 155 | break; |
| 156 | |
| 157 | case PERIPH_ID_SDMMC4: |
| 158 | switch (config) { |
| 159 | case FUNCMUX_SDMMC4_ATC_ATD_8BIT: |
| 160 | pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4); |
| 161 | pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4); |
| 162 | |
| 163 | pinmux_tristate_disable(PINGRP_ATC); |
| 164 | pinmux_tristate_disable(PINGRP_ATD); |
| 165 | break; |
| 166 | |
| 167 | case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT: |
| 168 | pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); |
| 169 | pinmux_tristate_disable(PINGRP_GME); |
| 170 | /* fall through */ |
| 171 | |
| 172 | case FUNCMUX_SDMMC4_ATB_GMA_4_BIT: |
| 173 | pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); |
| 174 | pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); |
| 175 | |
| 176 | pinmux_tristate_disable(PINGRP_ATB); |
| 177 | pinmux_tristate_disable(PINGRP_GMA); |
| 178 | bad_config = 0; |
| 179 | break; |
| 180 | } |
| 181 | break; |
| 182 | |
Simon Glass | 5dc0461 | 2012-04-17 09:01:32 +0000 | [diff] [blame] | 183 | case PERIPH_ID_KBC: |
| 184 | if (config == FUNCMUX_DEFAULT) { |
| 185 | enum pmux_pingrp grp[] = {PINGRP_KBCA, PINGRP_KBCB, |
| 186 | PINGRP_KBCC, PINGRP_KBCD, PINGRP_KBCE, |
| 187 | PINGRP_KBCF}; |
| 188 | int i; |
| 189 | |
| 190 | for (i = 0; i < ARRAY_SIZE(grp); i++) { |
| 191 | pinmux_tristate_disable(grp[i]); |
| 192 | pinmux_set_func(grp[i], PMUX_FUNC_KBC); |
| 193 | pinmux_set_pullupdown(grp[i], PMUX_PULL_UP); |
| 194 | } |
| 195 | |
| 196 | break; |
| 197 | } |
| 198 | |
Simon Glass | 84a97c5 | 2011-11-28 15:04:38 +0000 | [diff] [blame] | 199 | default: |
| 200 | debug("%s: invalid periph_id %d", __func__, id); |
| 201 | return -1; |
| 202 | } |
| 203 | |
Simon Glass | 3ba99a3 | 2012-01-11 12:42:22 +0000 | [diff] [blame] | 204 | if (bad_config) { |
| 205 | debug("%s: invalid config %d for periph_id %d", __func__, |
| 206 | config, id); |
| 207 | return -1; |
| 208 | } |
| 209 | |
Simon Glass | 84a97c5 | 2011-11-28 15:04:38 +0000 | [diff] [blame] | 210 | return 0; |
| 211 | } |