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git01.mediatek.com / filogic / uboot / 96794a767bf2a59a1644c2325ab1b5ba32270a0a / . / configs / zynq_zc702_defconfig
blob: 1d097014f0d3c43ad85dd4937af59cf9dd9bbd0e [file] [log] [blame]
Masahiro Yamada17b3d372015-05-18 15:31:51 +0900[diff] [blame]1CONFIG_ARM=y
Michal Simek3917c4f2016-05-20 14:59:33 +0200[diff] [blame]2CONFIG_SYS_CONFIG_NAME="zynq_zc70x"
Masahiro Yamada17b3d372015-05-18 15:31:51 +0900[diff] [blame]3CONFIG_ARCH_ZYNQ=y
Michal Simek92543872016-12-16 11:57:17 +0100[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x4000000
Michal Simek96794a72017-12-13 10:35:06 +0100[diff] [blame^]5CONFIG_IDENT_STRING=" Xilinx Zynq ZC702"
Michal Simekc7abf8d2017-12-01 13:50:33 +0100[diff] [blame]6CONFIG_SPL_STACK_R_ADDR=0x200000
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]7CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]8CONFIG_DEBUG_UART=y
Masahiro Yamada17b3d372015-05-18 15:31:51 +0900[diff] [blame]9CONFIG_FIT=y
Masahiro Yamada17b3d372015-05-18 15:31:51 +0900[diff] [blame]10CONFIG_FIT_SIGNATURE=y
Jagan Teki4c57e4c2017-01-21 11:48:33 +0100[diff] [blame]11CONFIG_FIT_VERBOSE=y
Lokesh Vutlafbad3702016-10-08 14:41:44 -0400[diff] [blame]12# CONFIG_DISPLAY_CPUINFO is not set
Simon Glassffe19762016-09-12 23:18:22 -0600[diff] [blame]13CONFIG_SPL=y
Michal Simekc7abf8d2017-12-01 13:50:33 +0100[diff] [blame]14CONFIG_SPL_STACK_R=y
Heiko Schocher1d12ba22016-10-06 07:55:15 +0200[diff] [blame]15CONFIG_SPL_OS_BOOT=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]16CONFIG_HUSH_PARSER=y
Siva Durga Prasad Paladugu59d461e2016-01-11 12:01:10 +0530[diff] [blame]17CONFIG_SYS_PROMPT="Zynq> "
Michal Simek12e30a62017-11-02 10:38:16 +0100[diff] [blame]18CONFIG_CMD_BOOTZ=y
Simon Glassa18b9692017-08-04 16:34:57 -0600[diff] [blame]19CONFIG_CMD_THOR_DOWNLOAD=y
Simon Glass4590d4e2017-05-17 03:25:10 -0600[diff] [blame]20CONFIG_CMD_EEPROM=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]21CONFIG_CMD_DFU=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]22# CONFIG_CMD_FLASH is not set
Simon Glass80cb1892017-05-17 03:25:21 -0600[diff] [blame]23CONFIG_CMD_FPGA_LOADBP=y
24CONFIG_CMD_FPGA_LOADFS=y
25CONFIG_CMD_FPGA_LOADMK=y
26CONFIG_CMD_FPGA_LOADP=y
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]27CONFIG_CMD_GPIO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]28CONFIG_CMD_I2C=y
29CONFIG_CMD_MMC=y
30CONFIG_CMD_SF=y
31CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]32# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]33CONFIG_CMD_TFTPPUT=y
34CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]35CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]36CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]37CONFIG_CMD_CACHE=y
38CONFIG_CMD_EXT2=y
39CONFIG_CMD_EXT4=y
40CONFIG_CMD_EXT4_WRITE=y
41CONFIG_CMD_FAT=y
42CONFIG_CMD_FS_GENERIC=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]43CONFIG_ENV_IS_IN_SPI_FLASH=y
Masahiro Yamada88e2e362015-07-17 20:26:06 +0900[diff] [blame]44CONFIG_NET_RANDOM_ETHADDR=y
Nathan Rossidd71c8a2016-01-08 03:00:46 +1000[diff] [blame]45CONFIG_SPL_DM_SEQ_ALIAS=y
Tom Rini265c7da2016-09-19 13:31:30 -0400[diff] [blame]46CONFIG_DFU_MMC=y
47CONFIG_DFU_RAM=y
Michal Simek216f6372017-11-03 15:53:56 +0100[diff] [blame]48CONFIG_FPGA_XILINX=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +0900[diff] [blame]49CONFIG_MMC_SDHCI=y
Michal Simek19abc1d2017-02-10 13:57:35 +0100[diff] [blame]50CONFIG_MMC_SDHCI_ZYNQ=y
Jagan Teki083a2f52015-08-31 17:36:03 +0530[diff] [blame]51CONFIG_SPI_FLASH=y
Michal Simekd4b2f102016-01-12 13:44:29 +0100[diff] [blame]52CONFIG_SPI_FLASH_BAR=y
Michal Simek27ebfbd2017-11-02 10:44:48 +0100[diff] [blame]53CONFIG_SPI_FLASH_MACRONIX=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]54CONFIG_SPI_FLASH_SPANSION=y
55CONFIG_SPI_FLASH_STMICRO=y
56CONFIG_SPI_FLASH_WINBOND=y
Michal Simek3d7285f2015-11-30 14:34:52 +0100[diff] [blame]57CONFIG_ZYNQ_GEM=y
Michal Simek669bd682015-12-01 08:41:17 +0100[diff] [blame]58CONFIG_DEBUG_UART_ZYNQ=y
59CONFIG_DEBUG_UART_BASE=0xe0001000
60CONFIG_DEBUG_UART_CLOCK=50000000
Michal Simekab754532017-11-06 09:16:05 +0100[diff] [blame]61CONFIG_ZYNQ_SERIAL=y
Jagan Tekic6dca132015-08-31 17:38:40 +0530[diff] [blame]62CONFIG_ZYNQ_QSPI=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]63CONFIG_USB=y
Siva Durga Prasad Paladugu42fcc182016-07-22 14:51:51 +0530[diff] [blame]64CONFIG_USB_EHCI_HCD=y
Mateusz Kulikowski533e7b12016-03-31 23:12:19 +0200[diff] [blame]65CONFIG_USB_ULPI_VIEWPORT=y
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]66CONFIG_USB_ULPI=y
Siva Durga Prasad Paladugu052b85f2016-07-22 15:00:26 +0530[diff] [blame]67CONFIG_USB_STORAGE=y
Michal Simekb9c5d132016-07-27 15:08:03 +0200[diff] [blame]68CONFIG_USB_GADGET=y
Maxime Ripard7f78b9d2017-09-07 08:58:08 +0200[diff] [blame]69CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
70CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
71CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]72CONFIG_CI_UDC=y
Sam Protsenko4d2439d2016-04-13 14:20:26 +0300[diff] [blame]73CONFIG_USB_GADGET_DOWNLOAD=y