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git01.mediatek.com / filogic / uboot / 9658024df053ea0a20ad6eaad45c89baa6a731bd / . / board / gdsys / dlvision / dlvision.c
blob: 4ec1cdbc3e2d63f55c4a268a220981dfcdd93552 [file] [log] [blame]
Dirk Eibach96580242009-07-17 14:16:40 +0200[diff] [blame^]1/*
2 * (C) Copyright 2009
3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
26#include <asm/processor.h>
27#include <asm/io.h>
28#include <asm/gpio.h>
29
30enum {
31 HWTYPE_DLVISION_CPU = 0,
32 HWTYPE_DLVISION_CON = 1,
33};
34
35#define HWREV_100 6
36
37int board_early_init_f(void)
38{
39 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
40 mtdcr(uicer, 0x00000000); /* disable all ints */
41 mtdcr(uiccr, 0x00000000); /* set all to be non-critical */
42 mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
43 mtdcr(uictr, 0x10000000); /* set int trigger levels */
44 mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest prio */
45 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
46
47 /*
48 * EBC Configuration Register: set ready timeout to 512 ebc-clks
49 * -> ca. 15 us
50 */
51 mtebc(epcr, 0xa8400000); /* ebc always driven */
52
53 /*
54 * setup io-latches
55 */
56 out_le16((void *)CONFIG_SYS_LATCH_BASE, 0x00f0);
57 out_le16((void *)(CONFIG_SYS_LATCH_BASE + 0x100), 0x0002);
58 out_le16((void *)(CONFIG_SYS_LATCH_BASE + 0x200), 0x0000);
59 return 0;
60}
61
62int misc_init_r(void)
63{
64 /*
65 * set "startup-finished"-gpios
66 */
67 gpio_write_bit(21, 0);
68 gpio_write_bit(22, 1);
69
70 return 0;
71}
72
73/*
74 * Check Board Identity:
75 */
76int checkboard(void)
77{
78 char *s = getenv("serial#");
79 u8 channel2_msr = in_8((void *)CONFIG_UART_BASE + 0x26);
80 u8 channel3_msr = in_8((void *)CONFIG_UART_BASE + 0x36);
81 u8 channel7_msr = in_8((void *)CONFIG_UART_BASE + 0x76);
82 u8 unit_type;
83 u8 local_con;
84 u8 audio;
85 u8 hardware_version;
86
87 printf("Board: ");
88
89 unit_type = (channel2_msr & 0x80) ? 0x01 : 0x00;
90 local_con = (channel2_msr & 0x20) ? 0x01 : 0x00;
91 audio = (channel3_msr & 0x20) ? 0x01 : 0x00;
92 hardware_version =
93 ((channel7_msr & 0x20) ? 0x01 : 0x00)
94 | ((channel7_msr & 0x80) ? 0x02 : 0x00)
95 | ((channel7_msr & 0x40) ? 0x04 : 0x00);
96
97 switch (unit_type) {
98 case HWTYPE_DLVISION_CON:
99 printf("DL-Vision-CON");
100 break;
101
102 case HWTYPE_DLVISION_CPU:
103 printf("DL-Vision-CPU");
104 break;
105
106 default:
107 printf("UnitType %d, unsupported", unit_type);
108 break;
109 }
110
111 if (s != NULL) {
112 puts(", serial# ");
113 puts(s);
114 }
115 puts("\n ");
116
117 switch (hardware_version) {
118 case HWREV_100:
119 printf("HW-Ver 1.00");
120 break;
121
122 default:
123 printf("HW-Ver %d, unsupported",
124 hardware_version);
125 break;
126 }
127
128 if (local_con)
129 printf(", local console");
130
131 if (audio)
132 printf(", audio support");
133
134 puts("\n");
135
136 return 0;
137}