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Patrick Delaunayc5c90692019-11-06 16:16:32 +01001// SPDX-License-Identifier: GPL-2.0+ OR X11
Patrice Chotarde4c6b782017-09-13 18:00:09 +02002/*
3 * Copyright 2017 - Patrice Chotard <patrice.chotard@st.com>
4 *
Patrice Chotarde4c6b782017-09-13 18:00:09 +02005 */
6
7/dts-v1/;
8#include "stm32h743.dtsi"
9#include "stm32h743-pinctrl.dtsi"
10
11/ {
12 model = "STMicroelectronics STM32H743i-Discovery board";
13 compatible = "st,stm32h743i-disco", "st,stm32h743";
14
15 chosen {
16 bootargs = "root=/dev/ram";
17 stdout-path = "serial0:115200n8";
18 };
19
20 memory {
Patrick Delaunayc5c90692019-11-06 16:16:32 +010021 device_type = "memory";
Patrice Chotarde4c6b782017-09-13 18:00:09 +020022 reg = <0xd0000000 0x2000000>;
23 };
24
25 aliases {
26 serial0 = &usart2;
27 };
Patrick Delaunayc5c90692019-11-06 16:16:32 +010028
29 v3v3: regulator-v3v3 {
30 compatible = "regulator-fixed";
31 regulator-name = "v3v3";
32 regulator-min-microvolt = <3300000>;
33 regulator-max-microvolt = <3300000>;
34 regulator-always-on;
35 };
Patrice Chotarde4c6b782017-09-13 18:00:09 +020036};
37
Patrice Chotard044d7af2018-12-06 11:53:39 +010038&clk_hse {
39 clock-frequency = <25000000>;
40};
41
Patrick Delaunayc5c90692019-11-06 16:16:32 +010042&mac {
43 status = "disabled";
44 pinctrl-0 = <&ethernet_rmii>;
45 pinctrl-names = "default";
46 phy-mode = "rmii";
47 phy-handle = <&phy0>;
48
49 mdio0 {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 compatible = "snps,dwmac-mdio";
53 phy0: ethernet-phy@0 {
54 reg = <0>;
55 };
56 };
57};
58
59&sdmmc1 {
60 pinctrl-names = "default", "opendrain", "sleep";
61 pinctrl-0 = <&sdmmc1_b4_pins_a>;
62 pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
63 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
64 broken-cd;
65 st,neg-edge;
66 bus-width = <4>;
67 vmmc-supply = <&v3v3>;
68 status = "okay";
69};
70
Patrice Chotarde4c6b782017-09-13 18:00:09 +020071&usart2 {
72 pinctrl-0 = <&usart2_pins>;
73 pinctrl-names = "default";
74 status = "okay";
Patrice Chotard0dca06e2017-09-13 18:00:11 +020075};