Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 1 | /* |
Patrice Chotard | 789ee0e | 2017-10-23 09:53:58 +0200 | [diff] [blame] | 2 | * Copyright (C) 2016, STMicroelectronics - All Rights Reserved |
| 3 | * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Vikas Manocha | 7b00ff9 | 2017-02-12 10:25:46 -0800 | [diff] [blame] | 9 | #include <clk.h> |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 10 | #include <dm.h> |
| 11 | #include <asm/io.h> |
| 12 | #include <serial.h> |
Toshifumi NISHINAGA | 65bfb9c | 2016-07-08 01:02:24 +0900 | [diff] [blame] | 13 | #include <asm/arch/stm32.h> |
Patrice Chotard | 9e27650 | 2018-01-12 09:23:49 +0100 | [diff] [blame] | 14 | #include "serial_stm32.h" |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 15 | |
| 16 | DECLARE_GLOBAL_DATA_PTR; |
| 17 | |
| 18 | static int stm32_serial_setbrg(struct udevice *dev, int baudrate) |
| 19 | { |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 20 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
| 21 | bool stm32f4 = plat->uart_info->stm32f4; |
| 22 | fdt_addr_t base = plat->base; |
Patrice Chotard | 4809a19 | 2017-07-18 09:29:08 +0200 | [diff] [blame] | 23 | u32 int_div, mantissa, fraction, oversampling; |
Toshifumi NISHINAGA | 65bfb9c | 2016-07-08 01:02:24 +0900 | [diff] [blame] | 24 | |
Patrice Chotard | 4809a19 | 2017-07-18 09:29:08 +0200 | [diff] [blame] | 25 | int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate); |
Patrice Chotard | 3149632 | 2017-06-08 09:26:55 +0200 | [diff] [blame] | 26 | |
| 27 | if (int_div < 16) { |
| 28 | oversampling = 8; |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 29 | setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); |
Patrice Chotard | 3149632 | 2017-06-08 09:26:55 +0200 | [diff] [blame] | 30 | } else { |
| 31 | oversampling = 16; |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 32 | clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); |
Patrice Chotard | 3149632 | 2017-06-08 09:26:55 +0200 | [diff] [blame] | 33 | } |
| 34 | |
| 35 | mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT; |
| 36 | fraction = int_div % oversampling; |
| 37 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 38 | writel(mantissa | fraction, base + BRR_OFFSET(stm32f4)); |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 39 | |
| 40 | return 0; |
| 41 | } |
| 42 | |
| 43 | static int stm32_serial_getc(struct udevice *dev) |
| 44 | { |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 45 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
| 46 | bool stm32f4 = plat->uart_info->stm32f4; |
| 47 | fdt_addr_t base = plat->base; |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 48 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 49 | if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0) |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 50 | return -EAGAIN; |
| 51 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 52 | return readl(base + RDR_OFFSET(stm32f4)); |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 53 | } |
| 54 | |
| 55 | static int stm32_serial_putc(struct udevice *dev, const char c) |
| 56 | { |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 57 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
| 58 | bool stm32f4 = plat->uart_info->stm32f4; |
| 59 | fdt_addr_t base = plat->base; |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 60 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 61 | if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0) |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 62 | return -EAGAIN; |
| 63 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 64 | writel(c, base + TDR_OFFSET(stm32f4)); |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 65 | |
| 66 | return 0; |
| 67 | } |
| 68 | |
| 69 | static int stm32_serial_pending(struct udevice *dev, bool input) |
| 70 | { |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 71 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
| 72 | bool stm32f4 = plat->uart_info->stm32f4; |
| 73 | fdt_addr_t base = plat->base; |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 74 | |
| 75 | if (input) |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 76 | return readl(base + ISR_OFFSET(stm32f4)) & |
| 77 | USART_SR_FLAG_RXNE ? 1 : 0; |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 78 | else |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 79 | return readl(base + ISR_OFFSET(stm32f4)) & |
| 80 | USART_SR_FLAG_TXE ? 0 : 1; |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 81 | } |
| 82 | |
| 83 | static int stm32_serial_probe(struct udevice *dev) |
| 84 | { |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 85 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
Patrice Chotard | 21aad13 | 2017-09-27 15:44:53 +0200 | [diff] [blame] | 86 | struct clk clk; |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 87 | fdt_addr_t base = plat->base; |
Patrice Chotard | 21aad13 | 2017-09-27 15:44:53 +0200 | [diff] [blame] | 88 | int ret; |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 89 | bool stm32f4; |
| 90 | u8 uart_enable_bit; |
| 91 | |
| 92 | plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev); |
| 93 | stm32f4 = plat->uart_info->stm32f4; |
| 94 | uart_enable_bit = plat->uart_info->uart_enable_bit; |
Vikas Manocha | 7b00ff9 | 2017-02-12 10:25:46 -0800 | [diff] [blame] | 95 | |
Vikas Manocha | 7b00ff9 | 2017-02-12 10:25:46 -0800 | [diff] [blame] | 96 | ret = clk_get_by_index(dev, 0, &clk); |
| 97 | if (ret < 0) |
| 98 | return ret; |
| 99 | |
| 100 | ret = clk_enable(&clk); |
| 101 | if (ret) { |
| 102 | dev_err(dev, "failed to enable clock\n"); |
| 103 | return ret; |
| 104 | } |
Vikas Manocha | 7b00ff9 | 2017-02-12 10:25:46 -0800 | [diff] [blame] | 105 | |
Patrice Chotard | 4809a19 | 2017-07-18 09:29:08 +0200 | [diff] [blame] | 106 | plat->clock_rate = clk_get_rate(&clk); |
| 107 | if (plat->clock_rate < 0) { |
| 108 | clk_disable(&clk); |
| 109 | return plat->clock_rate; |
| 110 | }; |
| 111 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 112 | /* Disable uart-> disable overrun-> enable uart */ |
| 113 | clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | |
| 114 | BIT(uart_enable_bit)); |
| 115 | if (plat->uart_info->has_overrun_disable) |
| 116 | setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS); |
Patrice Chotard | 24fc72d | 2017-09-27 15:44:51 +0200 | [diff] [blame] | 117 | if (plat->uart_info->has_fifo) |
| 118 | setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 119 | setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | |
| 120 | BIT(uart_enable_bit)); |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 121 | |
| 122 | return 0; |
| 123 | } |
| 124 | |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 125 | static const struct udevice_id stm32_serial_id[] = { |
Patrice Chotard | b21a69a | 2017-09-27 15:44:52 +0200 | [diff] [blame] | 126 | { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info}, |
Patrice Chotard | 24fc72d | 2017-09-27 15:44:51 +0200 | [diff] [blame] | 127 | { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info}, |
| 128 | { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info}, |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 129 | {} |
| 130 | }; |
| 131 | |
| 132 | static int stm32_serial_ofdata_to_platdata(struct udevice *dev) |
| 133 | { |
| 134 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 135 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 136 | plat->base = devfdt_get_addr(dev); |
| 137 | if (plat->base == FDT_ADDR_T_NONE) |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 138 | return -EINVAL; |
| 139 | |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 140 | return 0; |
| 141 | } |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 142 | |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 143 | static const struct dm_serial_ops stm32_serial_ops = { |
| 144 | .putc = stm32_serial_putc, |
| 145 | .pending = stm32_serial_pending, |
| 146 | .getc = stm32_serial_getc, |
| 147 | .setbrg = stm32_serial_setbrg, |
| 148 | }; |
| 149 | |
| 150 | U_BOOT_DRIVER(serial_stm32) = { |
Patrice Chotard | 9e27650 | 2018-01-12 09:23:49 +0100 | [diff] [blame] | 151 | .name = "serial_stm32", |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 152 | .id = UCLASS_SERIAL, |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 153 | .of_match = of_match_ptr(stm32_serial_id), |
| 154 | .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata), |
| 155 | .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata), |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 156 | .ops = &stm32_serial_ops, |
| 157 | .probe = stm32_serial_probe, |
| 158 | .flags = DM_FLAG_PRE_RELOC, |
| 159 | }; |