blob: c367b3ef9f246dbe421b269fc8e5f4d1b6aa5010 [file] [log] [blame]
wdenkfe8c2802002-11-03 00:38:21 +00001/*
wdenk1ebf41e2004-01-02 14:00:00 +00002 * (C) Copyright 2000-2004
wdenkfe8c2802002-11-03 00:38:21 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
28#include <devices.h>
wdenkfe8c2802002-11-03 00:38:21 +000029#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
wdenk359733b2003-03-31 17:27:09 +000032#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
wdenkbe9c1cb2004-02-24 02:00:03 +000035#ifdef CONFIG_MPC5xxx
wdenk21136db2003-07-16 21:53:01 +000036#include <mpc5xxx.h>
37#endif
wdenkfe8c2802002-11-03 00:38:21 +000038#if (CONFIG_COMMANDS & CFG_CMD_IDE)
39#include <ide.h>
40#endif
41#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
42#include <scsi.h>
43#endif
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
wdenk7ac16102004-08-01 22:48:16 +000051#include <serial.h>
wdenkfe8c2802002-11-03 00:38:21 +000052#ifdef CFG_ALLOC_DPRAM
Jon Loeligerf5ad3782005-07-23 10:37:35 -050053#if !defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +000054#include <commproc.h>
55#endif
wdenk541a76d2003-05-03 15:50:43 +000056#endif
wdenkfe8c2802002-11-03 00:38:21 +000057#include <version.h>
58#if defined(CONFIG_BAB7xx)
59#include <w83c553f.h>
60#endif
61#include <dtt.h>
62#if defined(CONFIG_POST)
63#include <post.h>
64#endif
wdenk56f94be2002-11-05 16:35:14 +000065#if defined(CONFIG_LOGBUFFER)
66#include <logbuff.h>
67#endif
wdenk9c53f402003-10-15 23:53:47 +000068#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
69#include <asm/cache.h>
70#endif
wdenkb983fa22004-01-16 00:30:56 +000071#ifdef CONFIG_PS2KBD
72#include <keyboard.h>
73#endif
wdenkfe8c2802002-11-03 00:38:21 +000074
75#if (CONFIG_COMMANDS & CFG_CMD_DOC)
76void doc_init (void);
77#endif
78#if defined(CONFIG_HARD_I2C) || \
79 defined(CONFIG_SOFT_I2C)
80#include <i2c.h>
81#endif
stroese1b7b4d42003-05-23 11:16:49 +000082#if (CONFIG_COMMANDS & CFG_CMD_NAND)
83void nand_init (void);
84#endif
wdenkfe8c2802002-11-03 00:38:21 +000085
86static char *failed = "*** failed ***\n";
87
wdenk9c07bf62004-04-10 20:43:50 +000088#if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
wdenkfe8c2802002-11-03 00:38:21 +000089extern flash_info_t flash_info[];
wdenk9c07bf62004-04-10 20:43:50 +000090#endif
wdenkfe8c2802002-11-03 00:38:21 +000091
92#include <environment.h>
Wolfgang Denk6405a152006-03-31 18:32:53 +020093
Wolfgang Denkf4a70e42005-08-30 14:13:23 +020094DECLARE_GLOBAL_DATA_PTR;
wdenkfe8c2802002-11-03 00:38:21 +000095
wdenka09491a2004-04-08 22:31:29 +000096#if defined(CFG_ENV_IS_EMBEDDED)
97#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
98#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
wdenk3902d702004-04-15 18:22:41 +000099 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
wdenka09491a2004-04-08 22:31:29 +0000100 defined(CFG_ENV_IS_IN_NVRAM)
wdenkfe8c2802002-11-03 00:38:21 +0000101#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
102#else
103#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
104#endif
105
wdenkb9a83a92003-05-30 12:48:29 +0000106extern ulong __init_end;
107extern ulong _end;
wdenkb9a83a92003-05-30 12:48:29 +0000108ulong monitor_flash_len;
109
wdenk57b2d802003-06-27 21:31:46 +0000110#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
111#include <bedbug/type.h>
112#endif
113
wdenkfe8c2802002-11-03 00:38:21 +0000114/*
115 * Begin and End of memory area for malloc(), and current "brk"
116 */
117static ulong mem_malloc_start = 0;
118static ulong mem_malloc_end = 0;
119static ulong mem_malloc_brk = 0;
120
121/************************************************************************
122 * Utilities *
123 ************************************************************************
124 */
125
126/*
127 * The Malloc area is immediately below the monitor copy in DRAM
128 */
129static void mem_malloc_init (void)
130{
wdenkfe8c2802002-11-03 00:38:21 +0000131 ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
132
133 mem_malloc_end = dest_addr;
134 mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
135 mem_malloc_brk = mem_malloc_start;
136
137 memset ((void *) mem_malloc_start,
138 0,
139 mem_malloc_end - mem_malloc_start);
140}
141
142void *sbrk (ptrdiff_t increment)
143{
144 ulong old = mem_malloc_brk;
145 ulong new = old + increment;
146
147 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
148 return (NULL);
149 }
150 mem_malloc_brk = new;
151 return ((void *) old);
152}
153
154char *strmhz (char *buf, long hz)
155{
156 long l, n;
157 long m;
158
159 n = hz / 1000000L;
160 l = sprintf (buf, "%ld", n);
161 m = (hz % 1000000L) / 1000L;
162 if (m != 0)
163 sprintf (buf + l, ".%03ld", m);
164 return (buf);
165}
166
wdenkfe8c2802002-11-03 00:38:21 +0000167/*
168 * All attempts to come up with a "common" initialization sequence
169 * that works for all boards and architectures failed: some of the
170 * requirements are just _too_ different. To get rid of the resulting
171 * mess of board dependend #ifdef'ed code we now make the whole
172 * initialization sequence configurable to the user.
173 *
174 * The requirements for any new initalization function is simple: it
175 * receives a pointer to the "global data" structure as it's only
176 * argument, and returns an integer return code, where 0 means
177 * "continue" and != 0 means "fatal error, hang the system".
178 */
179typedef int (init_fnc_t) (void);
180
181/************************************************************************
182 * Init Utilities *
183 ************************************************************************
184 * Some of this code should be moved into the core functions,
185 * but let's get it working (again) first...
186 */
187
188static int init_baudrate (void)
189{
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200190 char tmp[64]; /* long enough for environment variables */
wdenkfe8c2802002-11-03 00:38:21 +0000191 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
192
193 gd->baudrate = (i > 0)
194 ? (int) simple_strtoul (tmp, NULL, 10)
195 : CONFIG_BAUDRATE;
wdenkfe8c2802002-11-03 00:38:21 +0000196 return (0);
197}
198
199/***********************************************************************/
200
Stefan Roese09554022005-11-30 13:06:40 +0100201#ifdef CONFIG_ADD_RAM_INFO
202void board_add_ram_info(int);
203#endif
204
wdenkfe8c2802002-11-03 00:38:21 +0000205static int init_func_ram (void)
206{
wdenkfe8c2802002-11-03 00:38:21 +0000207#ifdef CONFIG_BOARD_TYPES
208 int board_type = gd->board_type;
209#else
210 int board_type = 0; /* use dummy arg */
211#endif
212 puts ("DRAM: ");
213
214 if ((gd->ram_size = initdram (board_type)) > 0) {
Stefan Roese09554022005-11-30 13:06:40 +0100215 print_size (gd->ram_size, "");
216#ifdef CONFIG_ADD_RAM_INFO
217 board_add_ram_info(0);
218#endif
219 putc('\n');
wdenkfe8c2802002-11-03 00:38:21 +0000220 return (0);
221 }
222 puts (failed);
223 return (1);
224}
225
226/***********************************************************************/
227
228#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
229static int init_func_i2c (void)
230{
231 puts ("I2C: ");
232 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
233 puts ("ready\n");
234 return (0);
235}
236#endif
237
238/***********************************************************************/
239
240#if defined(CONFIG_WATCHDOG)
241static int init_func_watchdog_init (void)
242{
243 puts (" Watchdog enabled\n");
244 WATCHDOG_RESET ();
245 return (0);
246}
247# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
248
249static int init_func_watchdog_reset (void)
250{
251 WATCHDOG_RESET ();
252 return (0);
253}
254# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
255#else
256# define INIT_FUNC_WATCHDOG_INIT /* undef */
257# define INIT_FUNC_WATCHDOG_RESET /* undef */
258#endif /* CONFIG_WATCHDOG */
259
260/************************************************************************
261 * Initialization sequence *
262 ************************************************************************
263 */
264
265init_fnc_t *init_sequence[] = {
266
wdenkda55c6e2004-01-20 23:12:12 +0000267#if defined(CONFIG_BOARD_EARLY_INIT_F)
268 board_early_init_f,
wdenkfe8c2802002-11-03 00:38:21 +0000269#endif
wdenkb50cde52004-01-24 20:25:54 +0000270
wdenk20bddb32004-09-28 17:59:53 +0000271#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
wdenkfe8c2802002-11-03 00:38:21 +0000272 get_clocks, /* get CPU and bus clocks (etc.) */
wdenkc78bf132004-04-24 23:23:30 +0000273#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
274 adjust_sdram_tbs_8xx,
275#endif
wdenkfe8c2802002-11-03 00:38:21 +0000276 init_timebase,
wdenkb50cde52004-01-24 20:25:54 +0000277#endif
wdenkfe8c2802002-11-03 00:38:21 +0000278#ifdef CFG_ALLOC_DPRAM
Jon Loeligerf5ad3782005-07-23 10:37:35 -0500279#if !defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +0000280 dpram_init,
281#endif
wdenk541a76d2003-05-03 15:50:43 +0000282#endif
wdenkfe8c2802002-11-03 00:38:21 +0000283#if defined(CONFIG_BOARD_POSTCLK_INIT)
284 board_postclk_init,
285#endif
286 env_init,
wdenk20bddb32004-09-28 17:59:53 +0000287#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
wdenkb50cde52004-01-24 20:25:54 +0000288 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
289 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
290 init_timebase,
291#endif
wdenkfe8c2802002-11-03 00:38:21 +0000292 init_baudrate,
293 serial_init,
294 console_init_f,
295 display_options,
296#if defined(CONFIG_8260)
297 prt_8260_rsr,
298 prt_8260_clks,
299#endif /* CONFIG_8260 */
Eran Liberty9095d4a2005-07-28 10:08:46 -0500300
301#if defined(CONFIG_MPC83XX)
302 print_clock_conf,
303#endif
304
wdenkfe8c2802002-11-03 00:38:21 +0000305 checkcpu,
wdenkbe9c1cb2004-02-24 02:00:03 +0000306#if defined(CONFIG_MPC5xxx)
wdenk21136db2003-07-16 21:53:01 +0000307 prt_mpc5xxx_clks,
wdenkbe9c1cb2004-02-24 02:00:03 +0000308#endif /* CONFIG_MPC5xxx */
wdenk337f5652004-10-28 00:09:35 +0000309#if defined(CONFIG_MPC8220)
310 prt_mpc8220_clks,
311#endif
wdenkfe8c2802002-11-03 00:38:21 +0000312 checkboard,
313 INIT_FUNC_WATCHDOG_INIT
wdenkda55c6e2004-01-20 23:12:12 +0000314#if defined(CONFIG_MISC_INIT_F)
wdenkfe8c2802002-11-03 00:38:21 +0000315 misc_init_f,
316#endif
317 INIT_FUNC_WATCHDOG_RESET
318#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
319 init_func_i2c,
320#endif
321#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
322 dtt_init,
323#endif
wdenkc08f1582003-04-27 22:52:51 +0000324#ifdef CONFIG_POST
325 post_init_f,
326#endif
wdenkfe8c2802002-11-03 00:38:21 +0000327 INIT_FUNC_WATCHDOG_RESET
328 init_func_ram,
329#if defined(CFG_DRAM_TEST)
330 testdram,
331#endif /* CFG_DRAM_TEST */
332 INIT_FUNC_WATCHDOG_RESET
333
334 NULL, /* Terminate this list */
335};
336
337/************************************************************************
338 *
339 * This is the first part of the initialization sequence that is
340 * implemented in C, but still running from ROM.
341 *
342 * The main purpose is to provide a (serial) console interface as
343 * soon as possible (so we can see any error messages), and to
344 * initialize the RAM so that we can relocate the monitor code to
345 * RAM.
346 *
347 * Be aware of the restrictions: global data is read-only, BSS is not
348 * initialized, and stack space is limited to a few kB.
349 *
350 ************************************************************************
351 */
352
353void board_init_f (ulong bootflag)
354{
wdenkfe8c2802002-11-03 00:38:21 +0000355 bd_t *bd;
356 ulong len, addr, addr_sp;
Wolfgang Denk3135c542005-08-26 01:36:03 +0200357 ulong *s;
wdenkfe8c2802002-11-03 00:38:21 +0000358 gd_t *id;
359 init_fnc_t **init_fnc_ptr;
360#ifdef CONFIG_PRAM
361 int i;
362 ulong reg;
363 uchar tmp[64]; /* long enough for environment variables */
364#endif
365
366 /* Pointer is writable since we allocated a register for it */
367 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
wdenk3337af42004-07-01 20:28:03 +0000368 /* compiler optimization barrier needed for GCC >= 3.4 */
369 __asm__ __volatile__("": : :"memory");
wdenkfe8c2802002-11-03 00:38:21 +0000370
Jon Loeligerf5ad3782005-07-23 10:37:35 -0500371#if !defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +0000372 /* Clear initial global data */
373 memset ((void *) gd, 0, sizeof (gd_t));
374#endif
375
376 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
377 if ((*init_fnc_ptr) () != 0) {
378 hang ();
379 }
380 }
381
382 /*
383 * Now that we have DRAM mapped and working, we can
384 * relocate the code and continue running from DRAM.
385 *
386 * Reserve memory at end of RAM for (top down in that order):
wdenk57b2d802003-06-27 21:31:46 +0000387 * - kernel log buffer
wdenkfe8c2802002-11-03 00:38:21 +0000388 * - protected RAM
389 * - LCD framebuffer
390 * - monitor code
391 * - board info struct
392 */
wdenkb9a83a92003-05-30 12:48:29 +0000393 len = (ulong)&_end - CFG_MONITOR_BASE;
wdenkfe8c2802002-11-03 00:38:21 +0000394
395#ifndef CONFIG_VERY_BIG_RAM
396 addr = CFG_SDRAM_BASE + gd->ram_size;
397#else
398 /* only allow stack below 256M */
399 addr = CFG_SDRAM_BASE +
400 (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
401#endif
402
wdenk9dfa8d12002-12-08 09:53:23 +0000403#ifdef CONFIG_LOGBUFFER
404 /* reserve kernel log buffer */
405 addr -= (LOGBUFF_RESERVE);
wdenk3086a972003-06-28 23:11:04 +0000406 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
wdenk9dfa8d12002-12-08 09:53:23 +0000407#endif
408
wdenkfe8c2802002-11-03 00:38:21 +0000409#ifdef CONFIG_PRAM
410 /*
411 * reserve protected RAM
412 */
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200413 i = getenv_r ("pram", (char *)tmp, sizeof (tmp));
414 reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
wdenkfe8c2802002-11-03 00:38:21 +0000415 addr -= (reg << 10); /* size is in kB */
wdenk3086a972003-06-28 23:11:04 +0000416 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
wdenkfe8c2802002-11-03 00:38:21 +0000417#endif /* CONFIG_PRAM */
418
419 /* round down to next 4 kB limit */
420 addr &= ~(4096 - 1);
wdenk3086a972003-06-28 23:11:04 +0000421 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
wdenkfe8c2802002-11-03 00:38:21 +0000422
423#ifdef CONFIG_LCD
424 /* reserve memory for LCD display (always full pages) */
425 addr = lcd_setmem (addr);
426 gd->fb_base = addr;
427#endif /* CONFIG_LCD */
428
429#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
430 /* reserve memory for video display (always full pages) */
431 addr = video_setmem (addr);
432 gd->fb_base = addr;
433#endif /* CONFIG_VIDEO */
434
435 /*
436 * reserve memory for U-Boot code, data & bss
wdenk4e112c12003-06-03 23:54:09 +0000437 * round down to next 4 kB limit
wdenkfe8c2802002-11-03 00:38:21 +0000438 */
439 addr -= len;
wdenk4e112c12003-06-03 23:54:09 +0000440 addr &= ~(4096 - 1);
Wolfgang Denk29dcbd42005-10-05 00:00:54 +0200441#ifdef CONFIG_E500
442 /* round down to next 64 kB limit so that IVPR stays aligned */
443 addr &= ~(65536 - 1);
444#endif
wdenkfe8c2802002-11-03 00:38:21 +0000445
wdenk3086a972003-06-28 23:11:04 +0000446 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
wdenkfe8c2802002-11-03 00:38:21 +0000447
wdenk452cfd62002-11-19 11:04:11 +0000448#ifdef CONFIG_AMIGAONEG3SE
449 gd->relocaddr = addr;
450#endif
451
wdenkfe8c2802002-11-03 00:38:21 +0000452 /*
453 * reserve memory for malloc() arena
454 */
455 addr_sp = addr - TOTAL_MALLOC_LEN;
wdenk3086a972003-06-28 23:11:04 +0000456 debug ("Reserving %dk for malloc() at: %08lx\n",
wdenkfe8c2802002-11-03 00:38:21 +0000457 TOTAL_MALLOC_LEN >> 10, addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000458
459 /*
460 * (permanently) allocate a Board Info struct
461 * and a permanent copy of the "global" data
462 */
463 addr_sp -= sizeof (bd_t);
464 bd = (bd_t *) addr_sp;
465 gd->bd = bd;
wdenk3086a972003-06-28 23:11:04 +0000466 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
wdenkfe8c2802002-11-03 00:38:21 +0000467 sizeof (bd_t), addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000468 addr_sp -= sizeof (gd_t);
469 id = (gd_t *) addr_sp;
wdenk3086a972003-06-28 23:11:04 +0000470 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
wdenkfe8c2802002-11-03 00:38:21 +0000471 sizeof (gd_t), addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000472
473 /*
474 * Finally, we set up a new (bigger) stack.
475 *
476 * Leave some safety gap for SP, force alignment on 16 byte boundary
477 * Clear initial stack frame
478 */
479 addr_sp -= 16;
480 addr_sp &= ~0xF;
Wolfgang Denk3135c542005-08-26 01:36:03 +0200481 s = (ulong *)addr_sp;
482 *s-- = 0;
483 *s-- = 0;
484 addr_sp = (ulong)s;
wdenk3086a972003-06-28 23:11:04 +0000485 debug ("Stack Pointer at: %08lx\n", addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000486
487 /*
488 * Save local variables to board info struct
489 */
490
wdenkda55c6e2004-01-20 23:12:12 +0000491 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
wdenkfe8c2802002-11-03 00:38:21 +0000492 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
493
494#ifdef CONFIG_IP860
wdenkda55c6e2004-01-20 23:12:12 +0000495 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
496 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
wdenk337f5652004-10-28 00:09:35 +0000497#elif defined CONFIG_MPC8220
498 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */
499 bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */
wdenkfe8c2802002-11-03 00:38:21 +0000500#else
wdenkda55c6e2004-01-20 23:12:12 +0000501 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
502 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
wdenkfe8c2802002-11-03 00:38:21 +0000503#endif
504
wdenk9c53f402003-10-15 23:53:47 +0000505#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
Jon Loeliger5c8aa972006-04-26 17:58:56 -0500506 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
wdenkfe8c2802002-11-03 00:38:21 +0000507 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
508#endif
wdenkbe9c1cb2004-02-24 02:00:03 +0000509#if defined(CONFIG_MPC5xxx)
wdenk21136db2003-07-16 21:53:01 +0000510 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
wdenk337f5652004-10-28 00:09:35 +0000511#endif
Eran Liberty9095d4a2005-07-28 10:08:46 -0500512#if defined(CONFIG_MPC83XX)
513 bd->bi_immrbar = CFG_IMMRBAR;
514#endif
wdenk337f5652004-10-28 00:09:35 +0000515#if defined(CONFIG_MPC8220)
516 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
517 bd->bi_inpfreq = gd->inp_clk;
518 bd->bi_pcifreq = gd->pci_clk;
519 bd->bi_vcofreq = gd->vco_clk;
520 bd->bi_pevfreq = gd->pev_clk;
521 bd->bi_flbfreq = gd->flb_clk;
522
523 /* store bootparam to sram (backward compatible), here? */
524 {
wdenk20dd2fa2004-11-21 00:06:33 +0000525 u32 *sram = (u32 *)CFG_SRAM_BASE;
526 *sram++ = gd->ram_size;
527 *sram++ = gd->bus_clk;
528 *sram++ = gd->inp_clk;
529 *sram++ = gd->cpu_clk;
530 *sram++ = gd->vco_clk;
531 *sram++ = gd->flb_clk;
532 *sram++ = 0xb8c3ba11; /* boot signature */
wdenk337f5652004-10-28 00:09:35 +0000533 }
wdenk21136db2003-07-16 21:53:01 +0000534#endif
wdenkfe8c2802002-11-03 00:38:21 +0000535
536 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
537
538 WATCHDOG_RESET ();
539 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
540 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
Jon Loeligerf5ad3782005-07-23 10:37:35 -0500541#if defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +0000542 bd->bi_cpmfreq = gd->cpm_clk;
543 bd->bi_brgfreq = gd->brg_clk;
544 bd->bi_sccfreq = gd->scc_clk;
545 bd->bi_vco = gd->vco_out;
Jon Loeligerf5ad3782005-07-23 10:37:35 -0500546#endif /* CONFIG_CPM2 */
wdenkbe9c1cb2004-02-24 02:00:03 +0000547#if defined(CONFIG_MPC5xxx)
wdenk21136db2003-07-16 21:53:01 +0000548 bd->bi_ipbfreq = gd->ipb_clk;
549 bd->bi_pcifreq = gd->pci_clk;
wdenkbe9c1cb2004-02-24 02:00:03 +0000550#endif /* CONFIG_MPC5xxx */
wdenkfe8c2802002-11-03 00:38:21 +0000551 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
552
553#ifdef CFG_EXTBDINFO
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200554 strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
555 strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
wdenkfe8c2802002-11-03 00:38:21 +0000556
557 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
558 bd->bi_plb_busfreq = gd->bus_clk;
Stefan Roeseb30f2a12005-08-08 12:42:22 +0200559#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
wdenkfe8c2802002-11-03 00:38:21 +0000560 bd->bi_pci_busfreq = get_PCI_freq ();
wdenkf16b5162004-03-23 21:43:07 +0000561 bd->bi_opbfreq = get_OPB_freq ();
wdenke537b3b2004-02-23 23:54:43 +0000562#elif defined(CONFIG_XILINX_ML300)
563 bd->bi_pci_busfreq = get_PCI_freq ();
wdenkfe8c2802002-11-03 00:38:21 +0000564#endif
565#endif
566
wdenk3086a972003-06-28 23:11:04 +0000567 debug ("New Stack Pointer is: %08lx\n", addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000568
569 WATCHDOG_RESET ();
570
571#ifdef CONFIG_POST
572 post_bootmode_init();
wdenkca9bc762003-07-15 07:45:49 +0000573 post_run (NULL, POST_ROM | post_bootmode_get(0));
wdenkfe8c2802002-11-03 00:38:21 +0000574#endif
575
576 WATCHDOG_RESET();
577
wdenk874ac262003-07-24 23:38:38 +0000578 memcpy (id, (void *)gd, sizeof (gd_t));
wdenkfe8c2802002-11-03 00:38:21 +0000579
580 relocate_code (addr_sp, id, addr);
581
582 /* NOTREACHED - relocate_code() does not return */
583}
584
wdenkfe8c2802002-11-03 00:38:21 +0000585/************************************************************************
586 *
587 * This is the next part if the initialization sequence: we are now
588 * running from RAM and have a "normal" C environment, i. e. global
589 * data can be written, BSS has been cleared, the stack size in not
590 * that critical any more, etc.
591 *
592 ************************************************************************
593 */
wdenkfe8c2802002-11-03 00:38:21 +0000594void board_init_r (gd_t *id, ulong dest_addr)
595{
wdenkfe8c2802002-11-03 00:38:21 +0000596 cmd_tbl_t *cmdtp;
597 char *s, *e;
598 bd_t *bd;
599 int i;
600 extern void malloc_bin_reloc (void);
601#ifndef CFG_ENV_IS_NOWHERE
602 extern char * env_name_spec;
603#endif
604
605#ifndef CFG_NO_FLASH
606 ulong flash_size;
607#endif
608
609 gd = id; /* initialize RAM version of global data */
610 bd = gd->bd;
611
612 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
613
wdenk3086a972003-06-28 23:11:04 +0000614 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
wdenkfe8c2802002-11-03 00:38:21 +0000615
616 WATCHDOG_RESET ();
617
wdenkda55c6e2004-01-20 23:12:12 +0000618#if defined(CONFIG_BOARD_EARLY_INIT_R)
619 board_early_init_r ();
620#endif
621
wdenkfe8c2802002-11-03 00:38:21 +0000622 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
wdenk57b2d802003-06-27 21:31:46 +0000623
wdenkb9a83a92003-05-30 12:48:29 +0000624 monitor_flash_len = (ulong)&__init_end - dest_addr;
wdenkfe8c2802002-11-03 00:38:21 +0000625
wdenk7ac16102004-08-01 22:48:16 +0000626#ifdef CONFIG_SERIAL_MULTI
627 serial_initialize();
628#endif
629
wdenkfe8c2802002-11-03 00:38:21 +0000630 /*
631 * We have to relocate the command table manually
632 */
wdenk57b2d802003-06-27 21:31:46 +0000633 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
wdenkfe8c2802002-11-03 00:38:21 +0000634 ulong addr;
wdenkfe8c2802002-11-03 00:38:21 +0000635 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
636#if 0
637 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
638 cmdtp->name, (ulong) (cmdtp->cmd), addr);
639#endif
640 cmdtp->cmd =
641 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
642
643 addr = (ulong)(cmdtp->name) + gd->reloc_off;
644 cmdtp->name = (char *)addr;
645
646 if (cmdtp->usage) {
647 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
648 cmdtp->usage = (char *)addr;
649 }
650#ifdef CFG_LONGHELP
651 if (cmdtp->help) {
652 addr = (ulong)(cmdtp->help) + gd->reloc_off;
653 cmdtp->help = (char *)addr;
654 }
655#endif
656 }
657 /* there are some other pointer constants we must deal with */
658#ifndef CFG_ENV_IS_NOWHERE
659 env_name_spec += gd->reloc_off;
660#endif
661
662 WATCHDOG_RESET ();
663
wdenk56f94be2002-11-05 16:35:14 +0000664#ifdef CONFIG_LOGBUFFER
wdenk9dfa8d12002-12-08 09:53:23 +0000665 logbuff_init_ptrs ();
wdenk56f94be2002-11-05 16:35:14 +0000666#endif
wdenkfe8c2802002-11-03 00:38:21 +0000667#ifdef CONFIG_POST
wdenk9dfa8d12002-12-08 09:53:23 +0000668 post_output_backlog ();
wdenkfe8c2802002-11-03 00:38:21 +0000669 post_reloc ();
670#endif
671
672 WATCHDOG_RESET();
673
Kumar Galad5d94d62006-02-10 15:40:06 -0600674#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
675 defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
wdenkfe8c2802002-11-03 00:38:21 +0000676 icache_enable (); /* it's time to enable the instruction cache */
677#endif
678
Haiying Wang237c5ad2006-05-10 09:38:06 -0500679#if defined(CFG_INIT_RAM_LOCK) && (defined(CONFIG_E500) || defined(CONFIG_MPC86xx))
wdenkda55c6e2004-01-20 23:12:12 +0000680 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
wdenk9c53f402003-10-15 23:53:47 +0000681#endif
682
wdenkef5fe752003-03-12 10:41:04 +0000683#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
wdenkfe8c2802002-11-03 00:38:21 +0000684 /*
wdenkef5fe752003-03-12 10:41:04 +0000685 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
686 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
687 * bridge there.
wdenkfe8c2802002-11-03 00:38:21 +0000688 */
689 pci_init ();
wdenkef5fe752003-03-12 10:41:04 +0000690#endif
691#if defined(CONFIG_BAB7xx)
wdenkfe8c2802002-11-03 00:38:21 +0000692 /*
693 * Initialise the ISA bridge
694 */
695 initialise_w83c553f ();
696#endif
697
698 asm ("sync ; isync");
699
700 /*
701 * Setup trap handlers
702 */
703 trap_init (dest_addr);
704
705#if !defined(CFG_NO_FLASH)
706 puts ("FLASH: ");
707
708 if ((flash_size = flash_init ()) > 0) {
wdenk84650f52003-08-30 00:05:50 +0000709# ifdef CFG_FLASH_CHECKSUM
wdenkfe8c2802002-11-03 00:38:21 +0000710 print_size (flash_size, "");
711 /*
712 * Compute and print flash CRC if flashchecksum is set to 'y'
713 *
714 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
715 */
716 s = getenv ("flashchecksum");
717 if (s && (*s == 'y')) {
718 printf (" CRC: %08lX",
wdenka09491a2004-04-08 22:31:29 +0000719 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
720 );
wdenkfe8c2802002-11-03 00:38:21 +0000721 }
722 putc ('\n');
wdenk84650f52003-08-30 00:05:50 +0000723# else /* !CFG_FLASH_CHECKSUM */
wdenkfe8c2802002-11-03 00:38:21 +0000724 print_size (flash_size, "\n");
wdenk84650f52003-08-30 00:05:50 +0000725# endif /* CFG_FLASH_CHECKSUM */
wdenkfe8c2802002-11-03 00:38:21 +0000726 } else {
727 puts (failed);
728 hang ();
729 }
730
731 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
732 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
wdenka09491a2004-04-08 22:31:29 +0000733# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
734 /* flash mapped at end of memory map */
735 bd->bi_flashoffset = TEXT_BASE + flash_size;
wdenk84650f52003-08-30 00:05:50 +0000736# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
wdenkb9a83a92003-05-30 12:48:29 +0000737 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
wdenk84650f52003-08-30 00:05:50 +0000738# else
wdenkfe8c2802002-11-03 00:38:21 +0000739 bd->bi_flashoffset = 0;
wdenk84650f52003-08-30 00:05:50 +0000740# endif
741#else /* CFG_NO_FLASH */
wdenkfe8c2802002-11-03 00:38:21 +0000742
743 bd->bi_flashsize = 0;
744 bd->bi_flashstart = 0;
745 bd->bi_flashoffset = 0;
746#endif /* !CFG_NO_FLASH */
747
748 WATCHDOG_RESET ();
749
750 /* initialize higher level parts of CPU like time base and timers */
751 cpu_init_r ();
752
753 WATCHDOG_RESET ();
754
755 /* initialize malloc() area */
756 mem_malloc_init ();
757 malloc_bin_reloc ();
758
759#ifdef CONFIG_SPI
760# if !defined(CFG_ENV_IS_IN_EEPROM)
761 spi_init_f ();
762# endif
763 spi_init_r ();
764#endif
765
766 /* relocate environment function pointers etc. */
767 env_relocate ();
768
769 /*
770 * Fill in missing fields of bd_info.
wdenk57b2d802003-06-27 21:31:46 +0000771 * We do this here, where we have "normal" access to the
772 * environment; we used to do this still running from ROM,
773 * where had to use getenv_r(), which can be pretty slow when
774 * the environment is in EEPROM.
wdenkfe8c2802002-11-03 00:38:21 +0000775 */
wdenk78924a72004-04-18 21:45:42 +0000776
777#if defined(CFG_EXTBDINFO)
778#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
779#if defined(CONFIG_I2CFAST)
780 /*
781 * set bi_iic_fast for linux taking environment variable
782 * "i2cfast" into account
783 */
784 {
785 char *s = getenv ("i2cfast");
786 if (s && ((*s == 'y') || (*s == 'Y'))) {
787 bd->bi_iic_fast[0] = 1;
788 bd->bi_iic_fast[1] = 1;
789 } else {
790 bd->bi_iic_fast[0] = 0;
791 bd->bi_iic_fast[1] = 0;
792 }
793 }
794#else
795 bd->bi_iic_fast[0] = 0;
796 bd->bi_iic_fast[1] = 0;
797#endif /* CONFIG_I2CFAST */
798#endif /* CONFIG_405GP, CONFIG_405EP */
799#endif /* CFG_EXTBDINFO */
800
wdenkfe8c2802002-11-03 00:38:21 +0000801 s = getenv ("ethaddr");
802#if defined (CONFIG_MBX) || defined (CONFIG_RPXCLASSIC) || defined(CONFIG_IAD210)
803 if (s == NULL)
804 board_get_enetaddr (bd->bi_enetaddr);
805 else
806#endif
807 for (i = 0; i < 6; ++i) {
808 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
809 if (s)
810 s = (*e) ? e + 1 : e;
811 }
812#ifdef CONFIG_HERMES
813 if ((gd->board_type >> 16) == 2)
814 bd->bi_ethspeed = gd->board_type & 0xFFFF;
815 else
816 bd->bi_ethspeed = 0xFFFF;
817#endif
818
819#ifdef CONFIG_NX823
820 load_sernum_ethaddr ();
821#endif
822
wdenk54070ab2004-12-31 09:32:47 +0000823#ifdef CONFIG_HAS_ETH1
wdenkfe8c2802002-11-03 00:38:21 +0000824 /* handle the 2nd ethernet address */
825
826 s = getenv ("eth1addr");
827
828 for (i = 0; i < 6; ++i) {
829 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
830 if (s)
831 s = (*e) ? e + 1 : e;
832 }
833#endif
wdenk54070ab2004-12-31 09:32:47 +0000834#ifdef CONFIG_HAS_ETH2
wdenkfe8c2802002-11-03 00:38:21 +0000835 /* handle the 3rd ethernet address */
836
837 s = getenv ("eth2addr");
Stefan Roese5ff4c3f2005-08-15 12:31:23 +0200838#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
wdenk544e9732004-02-06 23:19:44 +0000839 if (s == NULL)
840 board_get_enetaddr(bd->bi_enet2addr);
841 else
842#endif
wdenkfe8c2802002-11-03 00:38:21 +0000843 for (i = 0; i < 6; ++i) {
844 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
845 if (s)
846 s = (*e) ? e + 1 : e;
847 }
848#endif
849
wdenk54070ab2004-12-31 09:32:47 +0000850#ifdef CONFIG_HAS_ETH3
wdenk544e9732004-02-06 23:19:44 +0000851 /* handle 4th ethernet address */
852 s = getenv("eth3addr");
Stefan Roese5ff4c3f2005-08-15 12:31:23 +0200853#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
wdenk544e9732004-02-06 23:19:44 +0000854 if (s == NULL)
855 board_get_enetaddr(bd->bi_enet3addr);
856 else
857#endif
858 for (i = 0; i < 6; ++i) {
859 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
860 if (s)
861 s = (*e) ? e + 1 : e;
862 }
863#endif
wdenkfe8c2802002-11-03 00:38:21 +0000864
865#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
wdenke07ec1b2004-05-12 22:54:36 +0000866 defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
wdenkfe8c2802002-11-03 00:38:21 +0000867 load_sernum_ethaddr ();
868#endif
869 /* IP Address */
870 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
871
872 WATCHDOG_RESET ();
873
wdenkf8c590b2004-06-01 21:08:17 +0000874#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
wdenkfe8c2802002-11-03 00:38:21 +0000875 /*
876 * Do pci configuration
877 */
878 pci_init ();
879#endif
880
881/** leave this here (after malloc(), environment and PCI are working) **/
882 /* Initialize devices */
883 devices_init ();
884
wdenk874ac262003-07-24 23:38:38 +0000885 /* Initialize the jump table for applications */
886 jumptable_init ();
wdenkfe8c2802002-11-03 00:38:21 +0000887
888 /* Initialize the console (after the relocation and devices init) */
889 console_init_r ();
wdenkfe8c2802002-11-03 00:38:21 +0000890
891#if defined(CONFIG_CCM) || \
892 defined(CONFIG_COGENT) || \
893 defined(CONFIG_CPCI405) || \
894 defined(CONFIG_EVB64260) || \
wdenk56f94be2002-11-05 16:35:14 +0000895 defined(CONFIG_KUP4K) || \
wdenk65faef92004-03-25 19:29:38 +0000896 defined(CONFIG_KUP4X) || \
wdenkfe8c2802002-11-03 00:38:21 +0000897 defined(CONFIG_LWMON) || \
898 defined(CONFIG_PCU_E) || \
899 defined(CONFIG_W7O) || \
900 defined(CONFIG_MISC_INIT_R)
901 /* miscellaneous platform dependent initialisations */
902 misc_init_r ();
903#endif
904
905#ifdef CONFIG_HERMES
906 if (bd->bi_ethspeed != 0xFFFF)
907 hermes_start_lxt980 ((int) bd->bi_ethspeed);
908#endif
909
wdenkfe8c2802002-11-03 00:38:21 +0000910#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
911 WATCHDOG_RESET ();
912 puts ("KGDB: ");
913 kgdb_init ();
914#endif
915
wdenk3086a972003-06-28 23:11:04 +0000916 debug ("U-Boot relocated to %08lx\n", dest_addr);
wdenkfe8c2802002-11-03 00:38:21 +0000917
918 /*
919 * Enable Interrupts
920 */
921 interrupt_init ();
922
923 /* Must happen after interrupts are initialized since
924 * an irq handler gets installed
925 */
wdenkc35ba4e2004-03-14 22:25:36 +0000926#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
wdenkfe8c2802002-11-03 00:38:21 +0000927 serial_buffered_init();
928#endif
929
930#ifdef CONFIG_STATUS_LED
931 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
932#endif
933
934 udelay (20);
935
936 set_timer (0);
937
wdenkfe8c2802002-11-03 00:38:21 +0000938 /* Initialize from environment */
939 if ((s = getenv ("loadaddr")) != NULL) {
940 load_addr = simple_strtoul (s, NULL, 16);
941 }
942#if (CONFIG_COMMANDS & CFG_CMD_NET)
943 if ((s = getenv ("bootfile")) != NULL) {
944 copy_filename (BootFile, s, sizeof (BootFile));
945 }
946#endif /* CFG_CMD_NET */
947
948 WATCHDOG_RESET ();
949
950#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
951 WATCHDOG_RESET ();
952 puts ("SCSI: ");
953 scsi_init ();
954#endif
955
956#if (CONFIG_COMMANDS & CFG_CMD_DOC)
957 WATCHDOG_RESET ();
958 puts ("DOC: ");
959 doc_init ();
960#endif
961
stroese1b7b4d42003-05-23 11:16:49 +0000962#if (CONFIG_COMMANDS & CFG_CMD_NAND)
963 WATCHDOG_RESET ();
stroesed3491b42004-12-16 17:53:17 +0000964 puts ("NAND: ");
stroese1b7b4d42003-05-23 11:16:49 +0000965 nand_init(); /* go init the NAND */
966#endif
967
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200968#if (CONFIG_COMMANDS & CFG_CMD_NET)
969#if defined(CONFIG_NET_MULTI)
wdenkfe8c2802002-11-03 00:38:21 +0000970 WATCHDOG_RESET ();
971 puts ("Net: ");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200972#endif
wdenkfe8c2802002-11-03 00:38:21 +0000973 eth_initialize (bd);
974#endif
975
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200976#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
977 defined(CONFIG_CCM) || \
978 defined(CONFIG_ELPT860) || \
979 defined(CONFIG_EP8260) || \
980 defined(CONFIG_IP860) || \
981 defined(CONFIG_IVML24) || \
982 defined(CONFIG_IVMS8) || \
983 defined(CONFIG_MPC8260ADS) || \
984 defined(CONFIG_MPC8266ADS) || \
985 defined(CONFIG_MPC8560ADS) || \
986 defined(CONFIG_PCU_E) || \
987 defined(CONFIG_RPXSUPER) || \
988 defined(CONFIG_STXGP3) || \
989 defined(CONFIG_SPD823TS) || \
990 defined(CONFIG_RESET_PHY_R) )
991
992 WATCHDOG_RESET ();
993 debug ("Reset Ethernet PHY\n");
994 reset_phy ();
995#endif
996
wdenkfe8c2802002-11-03 00:38:21 +0000997#ifdef CONFIG_POST
wdenkca9bc762003-07-15 07:45:49 +0000998 post_run (NULL, POST_RAM | post_bootmode_get(0));
wdenkfe8c2802002-11-03 00:38:21 +0000999#endif
1000
1001#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
1002 WATCHDOG_RESET ();
1003 puts ("PCMCIA:");
1004 pcmcia_init ();
1005#endif
1006
1007#if (CONFIG_COMMANDS & CFG_CMD_IDE)
1008 WATCHDOG_RESET ();
1009# ifdef CONFIG_IDE_8xx_PCCARD
1010 puts ("PCMCIA:");
1011# else
1012 puts ("IDE: ");
1013#endif
1014 ide_init ();
1015#endif /* CFG_CMD_IDE */
1016
1017#ifdef CONFIG_LAST_STAGE_INIT
1018 WATCHDOG_RESET ();
1019 /*
1020 * Some parts can be only initialized if all others (like
1021 * Interrupts) are up and running (i.e. the PC-style ISA
1022 * keyboard).
1023 */
1024 last_stage_init ();
1025#endif
1026
1027#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
1028 WATCHDOG_RESET ();
1029 bedbug_init ();
1030#endif
1031
wdenk9dfa8d12002-12-08 09:53:23 +00001032#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
wdenkfe8c2802002-11-03 00:38:21 +00001033 /*
1034 * Export available size of memory for Linux,
1035 * taking into account the protected RAM at top of memory
1036 */
1037 {
1038 ulong pram;
wdenkfe8c2802002-11-03 00:38:21 +00001039 uchar memsz[32];
wdenk9dfa8d12002-12-08 09:53:23 +00001040#ifdef CONFIG_PRAM
1041 char *s;
wdenkfe8c2802002-11-03 00:38:21 +00001042
1043 if ((s = getenv ("pram")) != NULL) {
1044 pram = simple_strtoul (s, NULL, 10);
1045 } else {
1046 pram = CONFIG_PRAM;
1047 }
wdenk9dfa8d12002-12-08 09:53:23 +00001048#else
1049 pram=0;
1050#endif
1051#ifdef CONFIG_LOGBUFFER
1052 /* Also take the logbuffer into account (pram is in kB) */
1053 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
1054#endif
Wolfgang Denk7fb52662005-10-13 16:45:02 +02001055 sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1056 setenv ("mem", (char *)memsz);
wdenkfe8c2802002-11-03 00:38:21 +00001057 }
1058#endif
1059
wdenkb983fa22004-01-16 00:30:56 +00001060#ifdef CONFIG_PS2KBD
1061 puts ("PS/2: ");
1062 kbd_init();
1063#endif
1064
wdenkc08f1582003-04-27 22:52:51 +00001065#ifdef CONFIG_MODEM_SUPPORT
1066 {
1067 extern int do_mdm_init;
1068 do_mdm_init = gd->do_mdm_init;
1069 }
1070#endif
1071
wdenkfe8c2802002-11-03 00:38:21 +00001072 /* Initialization complete - start the monitor */
1073
1074 /* main_loop() can return to retry autoboot, if so just run it again. */
1075 for (;;) {
1076 WATCHDOG_RESET ();
1077 main_loop ();
1078 }
1079
1080 /* NOTREACHED - no way out of command loop except booting */
1081}
1082
1083void hang (void)
1084{
1085 puts ("### ERROR ### Please RESET the board ###\n");
wdenke97d3d92004-02-23 22:22:28 +00001086#ifdef CONFIG_SHOW_BOOT_PROGRESS
1087 show_boot_progress(-30);
1088#endif
wdenkfe8c2802002-11-03 00:38:21 +00001089 for (;;);
1090}
1091
wdenkc08f1582003-04-27 22:52:51 +00001092#ifdef CONFIG_MODEM_SUPPORT
1093/* called from main loop (common/main.c) */
Wolfgang Denk7fb52662005-10-13 16:45:02 +02001094/* 'inline' - We have to do it fast */
1095static inline void mdm_readline(char *buf, int bufsiz)
1096{
1097 char c;
1098 char *p;
1099 int n;
1100
1101 n = 0;
1102 p = buf;
1103 for(;;) {
1104 c = serial_getc();
1105
1106 /* dbg("(%c)", c); */
1107
1108 switch(c) {
1109 case '\r':
1110 break;
1111 case '\n':
1112 *p = '\0';
1113 return;
1114
1115 default:
1116 if(n++ > bufsiz) {
1117 *p = '\0';
1118 return; /* sanity check */
1119 }
1120 *p = c;
1121 p++;
1122 break;
1123 }
1124 }
1125}
1126
wdenkc08f1582003-04-27 22:52:51 +00001127extern void dbg(const char *fmt, ...);
1128int mdm_init (void)
1129{
1130 char env_str[16];
1131 char *init_str;
1132 int i;
1133 extern char console_buffer[];
wdenkc08f1582003-04-27 22:52:51 +00001134 extern void enable_putc(void);
1135 extern int hwflow_onoff(int);
1136
1137 enable_putc(); /* enable serial_putc() */
1138
1139#ifdef CONFIG_HWFLOW
1140 init_str = getenv("mdm_flow_control");
1141 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1142 hwflow_onoff (1);
1143 else
1144 hwflow_onoff(-1);
1145#endif
1146
1147 for (i = 1;;i++) {
1148 sprintf(env_str, "mdm_init%d", i);
1149 if ((init_str = getenv(env_str)) != NULL) {
1150 serial_puts(init_str);
1151 serial_puts("\n");
1152 for(;;) {
1153 mdm_readline(console_buffer, CFG_CBSIZE);
1154 dbg("ini%d: [%s]", i, console_buffer);
1155
1156 if ((strcmp(console_buffer, "OK") == 0) ||
1157 (strcmp(console_buffer, "ERROR") == 0)) {
1158 dbg("ini%d: cmd done", i);
1159 break;
1160 } else /* in case we are originating call ... */
1161 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1162 dbg("ini%d: connect", i);
1163 return 0;
1164 }
1165 }
1166 } else
1167 break; /* no init string - stop modem init */
1168
1169 udelay(100000);
1170 }
1171
1172 udelay(100000);
1173
1174 /* final stage - wait for connect */
1175 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1176 message from modem */
1177 mdm_readline(console_buffer, CFG_CBSIZE);
1178 dbg("ini_f: [%s]", console_buffer);
1179 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1180 dbg("ini_f: connected");
1181 return 0;
1182 }
1183 }
1184
1185 return 0;
1186}
1187
wdenkc08f1582003-04-27 22:52:51 +00001188#endif
1189
wdenkfe8c2802002-11-03 00:38:21 +00001190#if 0 /* We could use plain global data, but the resulting code is bigger */
1191/*
1192 * Pointer to initial global data area
1193 *
1194 * Here we initialize it.
1195 */
1196#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1197#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1198DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1199#endif /* 0 */
1200
1201/************************************************************************/